Matthew Qin | e8b71a4 | 2015-06-26 17:12:32 +0800 | [diff] [blame] | 1 | /* Copyright (c) 2015, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <spmi.h> |
| 30 | #include <platform/iomap.h> |
| 31 | #include <pm_vib.h> |
| 32 | |
| 33 | #define HAPTIC_BASE (PMI_ADDR_BASE+ 0xC000) |
| 34 | #define QPNP_HAP_EN_CTL_REG (HAPTIC_BASE + 0x46) |
| 35 | #define QPNP_HAP_EN_CTL2_REG (HAPTIC_BASE + 0x48) |
| 36 | #define QPNP_HAP_ACT_TYPE_REG (HAPTIC_BASE + 0x4C) |
| 37 | #define QPNP_HAP_WAV_SHAPE_REG (HAPTIC_BASE + 0x4D) |
| 38 | #define QPNP_HAP_PLAY_MODE_REG (HAPTIC_BASE + 0x4E) |
| 39 | #define QPNP_HAP_LRA_AUTO_RES_REG (HAPTIC_BASE + 0x4F) |
| 40 | #define QPNP_HAP_VMAX_REG (HAPTIC_BASE + 0x51) |
| 41 | #define QPNP_HAP_ILIM_REG (HAPTIC_BASE + 0x52) |
| 42 | #define QPNP_HAP_SC_DEB_REG (HAPTIC_BASE + 0x53) |
| 43 | #define QPNP_HAP_RATE_CFG1_REG (HAPTIC_BASE + 0x54) |
| 44 | #define QPNP_HAP_RATE_CFG2_REG (HAPTIC_BASE + 0x55) |
| 45 | #define QPNP_HAP_INT_PWM_REG (HAPTIC_BASE + 0x56) |
| 46 | #define QPNP_HAP_PWM_CAP_REG (HAPTIC_BASE + 0x58) |
| 47 | #define QPNP_HAP_BRAKE_REG (HAPTIC_BASE + 0x5C) |
| 48 | #define QPNP_HAP_PLAY_REG (HAPTIC_BASE + 0x70) |
| 49 | |
| 50 | #define QPNP_HAP_ACT_TYPE_MASK 0x01 |
| 51 | #define QPNP_HAP_PLAY_MODE_MASK 0x3F |
| 52 | #define QPNP_HAP_DIRECT 0x0 |
| 53 | #define QPNP_HAP_VMAX_MASK 0x3F |
| 54 | #define QPNP_HAP_VMAX 0x22 |
| 55 | #define QPNP_HAP_ILIM_MASK 0x01 |
| 56 | #define QPNP_HAP_ILIM 0x01 |
| 57 | #define QPNP_HAP_SC_DEB_MASK 0x07 |
| 58 | #define QPNP_HAP_SC_DEB_8CLK 0x01 |
| 59 | #define QPNP_HAP_INT_PWM_MASK 0x03 |
| 60 | #define QPNP_HAP_INT_PWM_505KHZ 0x01 |
| 61 | #define QPNP_HAP_WAV_SHAPE_MASK 0x01 |
| 62 | #define QPNP_HAP_WAV_SHAPE_SQUARE 0x01 |
| 63 | #define QPNP_HAP_PWM_CAP_MASK 0x03 |
| 64 | #define QPNP_HAP_PWM_CAP_13PF 0x01 |
| 65 | #define QPNP_HAP_RATE_CFG1_MASK 0xFF |
| 66 | #define QPNP_HAP_RATE_CFG1_7_0 0x1C |
| 67 | #define QPNP_HAP_RATE_CFG2_MASK 0x0F |
| 68 | #define QPNP_HAP_RATE_CFG2_11_8 0x04 |
| 69 | #define QPNP_HAP_EN_BRAKE_EN_MASK 0x01 |
| 70 | #define QPNP_HAP_EN_BRAKING_EN 0x01 |
| 71 | #define QPNP_HAP_BRAKE_VMAX_MASK 0xFF |
| 72 | #define QPNP_HAP_BRAKE_VMAX 0xF |
| 73 | #define QPNP_HAP_ERM 0x1 |
| 74 | #define QPNP_HAP_PLAY_MASK 0x80 |
| 75 | #define QPNP_HAP_PLAY_EN 0x80 |
| 76 | #define QPNP_HAP_MASK 0x80 |
| 77 | #define QPNP_HAP_EN 0x80 |
| 78 | #define QPNP_HAP_PLAY_DIS 0x00 |
| 79 | #define QPNP_HAP_DIS 0x00 |
| 80 | #define QPNP_HAP_BRAKE_MASK 0xFE |
| 81 | #define QPNP_HAP_LRA_AUTO_DISABLE 0x00 |
| 82 | #define QPNP_HAP_LRA_AUTO_MASK 0x70 |
| 83 | |
| 84 | /* Turn on vibrator */ |
| 85 | void pm_vib_turn_on(void) |
| 86 | { |
| 87 | /* Configure the ACTUATOR TYPE register as ERM*/ |
| 88 | pmic_spmi_reg_mask_write(QPNP_HAP_ACT_TYPE_REG, |
| 89 | QPNP_HAP_ACT_TYPE_MASK, QPNP_HAP_ERM); |
| 90 | |
| 91 | /* Disable auto resonance for ERM */ |
| 92 | pmic_spmi_reg_mask_write(QPNP_HAP_LRA_AUTO_RES_REG, |
| 93 | QPNP_HAP_LRA_AUTO_MASK, QPNP_HAP_LRA_AUTO_DISABLE); |
| 94 | |
| 95 | /* Configure the PLAY MODE register as direct*/ |
| 96 | pmic_spmi_reg_mask_write(QPNP_HAP_PLAY_MODE_REG, |
| 97 | QPNP_HAP_PLAY_MODE_MASK, QPNP_HAP_DIRECT); |
| 98 | |
| 99 | /* Configure the VMAX register */ |
| 100 | pmic_spmi_reg_mask_write(QPNP_HAP_VMAX_REG, |
| 101 | QPNP_HAP_VMAX_MASK, QPNP_HAP_VMAX); |
| 102 | |
| 103 | /* Sets current limit to 800mA*/ |
| 104 | pmic_spmi_reg_mask_write(QPNP_HAP_ILIM_REG, |
| 105 | QPNP_HAP_ILIM_MASK, QPNP_HAP_ILIM); |
| 106 | |
| 107 | /* Configure the short circuit debounce register as DEB_8CLK*/ |
| 108 | pmic_spmi_reg_mask_write(QPNP_HAP_SC_DEB_REG, |
| 109 | QPNP_HAP_SC_DEB_MASK, QPNP_HAP_SC_DEB_8CLK); |
| 110 | |
| 111 | /* Configure the INTERNAL_PWM register as 505KHZ and 13PF*/ |
| 112 | pmic_spmi_reg_mask_write(QPNP_HAP_INT_PWM_REG, |
| 113 | QPNP_HAP_INT_PWM_MASK, QPNP_HAP_INT_PWM_505KHZ); |
| 114 | pmic_spmi_reg_mask_write(QPNP_HAP_PWM_CAP_REG, |
| 115 | QPNP_HAP_PWM_CAP_MASK, QPNP_HAP_PWM_CAP_13PF); |
| 116 | |
| 117 | /* Configure the WAVE SHAPE register as SQUARE*/ |
| 118 | pmic_spmi_reg_mask_write(QPNP_HAP_WAV_SHAPE_REG, |
| 119 | QPNP_HAP_WAV_SHAPE_MASK, QPNP_HAP_WAV_SHAPE_SQUARE); |
| 120 | |
| 121 | /* Configure RATE_CFG1 and RATE_CFG2 registers for haptic rate. */ |
| 122 | pmic_spmi_reg_mask_write(QPNP_HAP_RATE_CFG1_REG, |
| 123 | QPNP_HAP_RATE_CFG1_MASK, QPNP_HAP_RATE_CFG1_7_0); |
| 124 | pmic_spmi_reg_mask_write(QPNP_HAP_RATE_CFG2_REG, |
| 125 | QPNP_HAP_RATE_CFG2_MASK, QPNP_HAP_RATE_CFG2_11_8); |
| 126 | |
| 127 | /* Configure BRAKE register, PATTERN1 & PATTERN2 as VMAX. */ |
| 128 | pmic_spmi_reg_mask_write(QPNP_HAP_EN_CTL2_REG, |
| 129 | QPNP_HAP_EN_BRAKE_EN_MASK, QPNP_HAP_EN_BRAKING_EN); |
| 130 | pmic_spmi_reg_mask_write(QPNP_HAP_BRAKE_REG, |
| 131 | QPNP_HAP_BRAKE_VMAX_MASK, QPNP_HAP_BRAKE_VMAX); |
| 132 | |
| 133 | /* Enable control register */ |
| 134 | pmic_spmi_reg_mask_write(QPNP_HAP_EN_CTL_REG, |
| 135 | QPNP_HAP_PLAY_MASK, QPNP_HAP_PLAY_EN); |
| 136 | |
| 137 | /* Enable play register */ |
| 138 | pmic_spmi_reg_mask_write(QPNP_HAP_PLAY_REG, QPNP_HAP_MASK, QPNP_HAP_EN); |
| 139 | } |
| 140 | |
| 141 | /* Turn off vibrator */ |
| 142 | void pm_vib_turn_off(void) |
| 143 | { |
| 144 | /* Disable control register */ |
| 145 | pmic_spmi_reg_mask_write(QPNP_HAP_EN_CTL_REG, |
| 146 | QPNP_HAP_PLAY_MASK, QPNP_HAP_PLAY_DIS); |
| 147 | |
| 148 | /* Disable play register */ |
| 149 | pmic_spmi_reg_mask_write(QPNP_HAP_PLAY_REG, QPNP_HAP_MASK, QPNP_HAP_DIS); |
| 150 | } |