blob: e78e2712d689d915e36d79256a8ab01404c67d53 [file] [log] [blame]
Travis Geiselbrecht1d0df692008-09-01 02:26:09 -07001/*
2 * Copyright (c) 2008 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24.globl platform_early_init
25platform_early_init:
26 stmdb sp!, {lr}
27
28/* enable the NRST reset pin */
29 ldr r1, =0xfffffd08
30 ldr r0, =0xa5000401
31 str r0, [r1]
32
33/* disable watchdog */
34 ldr r1, =0xfffffd44
35 ldr r0, =0x3fff8fff
36 str r0, [r1]
37
38 bl init_clock
39 bl init_48mhz_clock
40
41/* copy the .data section from ROM to RAM */
42 ldr r0, =__rodata_end
43 ldr r1, =__data_start
44 ldr r2, =__bss_start
45__data_loop:
46 cmp r1, r2
47 ldrlt r3, [r0], #4
48 strlt r3, [r1], #4
49 blt __data_loop
50
51 bl mux_init
52 bl ser_init
53 bl platform_init_interrupts
54
55 ldmia sp!, {lr}
56 bx lr