Channagoud Kadabi | eb6e9e7 | 2015-06-13 10:48:30 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2012,2015 The Linux Foundation. All rights reserved. |
Deepa Dinamani | e9ded13 | 2012-11-27 15:03:38 -0800 | [diff] [blame] | 2 | * |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
Deepa Dinamani | e9ded13 | 2012-11-27 15:03:38 -0800 | [diff] [blame] | 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifndef __PLATFORM_MSM_SHARED_BAM_H |
| 30 | #define __PLATFORM_MSM_SHARED_BAM_H |
| 31 | |
| 32 | #include <stdint.h> |
| 33 | #include <compiler.h> |
| 34 | |
Aparna Mallavarapu | 31a4dd8 | 2014-04-22 20:09:32 +0530 | [diff] [blame] | 35 | #if BAM_V170 |
| 36 | #define BAM_IRQ_SRCS(x, n) (0x00003000 + 0x1000 * (n) + (x)) |
| 37 | #define BAM_IRQ_SRCS_MSK(x, n) (0x00003004 + 0x1000 * (n) + (x)) |
| 38 | #define BAM_IRQ_SRCS_UNMASKED(x) (0x00003018 + (x)) |
| 39 | #define BAM_TRUST_REG(x) (0x00002000 + (x)) |
| 40 | #define BAM_P_CTRLn(n, x) (0x00013000 + 0x1000 * (n) + (x)) |
| 41 | #define BAM_P_RSTn(n, x) (0x00013000 + 0x4 + 0x1000 * (n) + (x)) |
| 42 | #define BAM_P_IRQ_STTSn(n, x) (0x00013000 + 0x10 + 0x1000 * (n) + (x)) |
| 43 | #define BAM_P_IRQ_CLRn(n, x) (0x00013000 + 0x14 + 0x1000 * (n) + (x)) |
| 44 | #define BAM_P_IRQ_ENn(n, x) (0x00013000 + 0x18 + 0x1000 * (n) + (x)) |
| 45 | #define BAM_P_TRUST_REGn(n, x) (0x2020 + 0x4* (n) + (x)) |
| 46 | #define BAM_P_SW_OFSTSn(n, x) (0x00013800 + 0x1000 * (n) + (x)) |
| 47 | #define BAM_P_EVNT_REGn(n, x) (0x00013818 + 0x1000 * (n) + (x)) |
| 48 | #define BAM_P_DESC_FIFO_ADDRn(n, x) (0x0001381C + 0x1000 * (n) + (x)) |
| 49 | #define BAM_P_FIFO_SIZESn(n, x) (0x00013820 + 0x1000 * (n) + (x)) |
| 50 | #else |
| 51 | #define BAM_IRQ_SRCS(x, n) (0x00000800 + (0x80 * (n)) + (x)) |
| 52 | #define BAM_IRQ_SRCS_MSK(x, n) (0x00000804 + (0x80 * (n)) + (x)) |
| 53 | #define BAM_IRQ_SRCS_UNMASKED(x) (0x00000030 + (x)) |
| 54 | #define BAM_TRUST_REG(x) (0x00000070 + (x)) |
| 55 | #define BAM_P_CTRLn(n, x) (0x00001000 + 0x1000 * (n) + (x)) |
| 56 | #define BAM_P_RSTn(n, x) (0x00001000 + 0x4 + 0x1000 * (n) + (x)) |
| 57 | #define BAM_P_IRQ_STTSn(n, x) (0x00001000 + 0x10 + 0x1000 * (n) + (x)) |
| 58 | #define BAM_P_IRQ_CLRn(n, x) (0x00001000 + 0x14 + 0x1000 * (n) + (x)) |
| 59 | #define BAM_P_IRQ_ENn(n, x) (0x00001000 + 0x18 + 0x1000 * (n) + (x)) |
| 60 | #define BAM_P_TRUST_REGn(n, x) (0x00001000 + 0x30 + 0x1000 * (n) + (x)) |
| 61 | #define BAM_P_SW_OFSTSn(n, x) (0x00001800 + 0x1000 * (n) + (x)) |
| 62 | #define BAM_P_EVNT_REGn(n, x) (0x00001818 + 0x1000 * (n) + (x)) |
| 63 | #define BAM_P_DESC_FIFO_ADDRn(n, x) (0x0000181C + 0x1000 * (n) + (x)) |
| 64 | #define BAM_P_FIFO_SIZESn(n, x) (0x00001820 + 0x1000 * (n) + (x)) |
| 65 | #endif |
| 66 | |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 67 | #define BAM_DESC_SIZE 8 |
| 68 | #define BAM_CE_SIZE 16 |
| 69 | #define BAM_MAX_DESC_DATA_LEN 0xFFFF |
Deepa Dinamani | 62df2c7 | 2012-12-19 17:17:58 -0800 | [diff] [blame] | 70 | #define BAM_NDP_MAX_DESC_DATA_LEN 0x7FFF |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 71 | #define BAM_DATA_READ 0 |
| 72 | #define BAM_DATA_WRITE 1 |
| 73 | |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 74 | #define COUNT_TRESHOLD_MASK 0xFF |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 75 | #define BAM_IRQ_MASK (1 << 31) |
| 76 | #define P_IRQ_MASK (1) |
| 77 | |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 78 | #define BAM_IRQ_STTS(x) (0x00000014 + (x)) |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 79 | |
| 80 | #define BAM_IRQ_EN_REG(x) (0x001C + (x)) |
| 81 | #define BAM_TIMER_EN_MASK (1 << 4) |
| 82 | /* Available only in BAM-Lite */ |
| 83 | #define BAM_EMPTY_EN_MASK (1 << 3) |
| 84 | #define BAM_ERROR_EN_MASK (1 << 2) |
| 85 | /* Available only in BAM */ |
| 86 | #define BAM_HRESP_ERR_EN_MASK (1 << 1) |
| 87 | |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 88 | #define BAM_EE_MASK (7 << 0) |
| 89 | #define BAM_RESET_BLK_MASK (1 << 7) |
| 90 | #define BAM_LOCK_EE_CTRL_MASK (1 << 13) |
| 91 | |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 92 | #define P_SYS_MODE_MASK (1 << 5) |
| 93 | /* 1: Producer mode 0: Consumer mode */ |
| 94 | #define P_DIRECTION_SHIFT 3 |
Deepa Dinamani | a0407ea | 2013-07-09 12:51:45 -0700 | [diff] [blame] | 95 | #define P_LOCK_GRP_SHIFT 16 |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 96 | #define P_ENABLE (1 << 1) |
| 97 | |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 98 | #define P_DESC_FIFO_PEER_OFST_MASK 0xFF |
| 99 | |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 100 | |
| 101 | /* Flags for descriptors */ |
| 102 | #define BAM_DESC_INT_FLAG (1 << 7) |
| 103 | #define BAM_DESC_EOT_FLAG (1 << 6) |
| 104 | #define BAM_DESC_EOB_FLAG (1 << 5) |
| 105 | #define BAM_DESC_NWD_FLAG (1 << 4) |
| 106 | #define BAM_DESC_CMD_FLAG (1 << 3) |
| 107 | #define BAM_DESC_LOCK_FLAG (1 << 2) |
| 108 | #define BAM_DESC_UNLOCK_FLAG (1 << 1) |
| 109 | |
Aparna Mallavarapu | 31a4dd8 | 2014-04-22 20:09:32 +0530 | [diff] [blame] | 110 | /* Pipe Interrupt masks */ |
| 111 | enum p_int_type |
| 112 | { |
| 113 | P_PRCSD_DESC_EN_MASK = 1, |
| 114 | P_OUT_OF_DESC_EN_MASK = (1 << 3), |
| 115 | P_ERR_EN_MASK = (1 << 4), |
| 116 | P_TRNSFR_END_EN_MASK = (1 << 5) |
| 117 | }; |
| 118 | |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 119 | enum bam_ce_cmd_t{ |
| 120 | CE_WRITE_TYPE = 0, |
| 121 | CE_READ_TYPE = 1 |
| 122 | }; |
| 123 | |
| 124 | /* result type */ |
| 125 | typedef enum { |
| 126 | BAM_RESULT_SUCCESS = 0, |
| 127 | BAM_RESULT_FAILURE = 1, |
| 128 | BAM_RESULT_TIMEOUT = 2 |
| 129 | } bam_result_t; |
| 130 | |
| 131 | |
| 132 | /* Enum to define the BAM type: |
| 133 | * BAM2BAM:Producer BAM to Consumer BAM. |
| 134 | * SYS2BAM:Producer System to Consumer BAM. |
| 135 | * BAM2SYS:Producer BAM to Consumer System. |
| 136 | */ |
| 137 | enum bam_transaction_type { |
| 138 | SYS2BAM, |
| 139 | BAM2SYS, |
| 140 | BAM2BAM, |
| 141 | }; |
| 142 | |
| 143 | /* Enum to define BAM mode: |
| 144 | * SPS:Use BAM pipes. |
| 145 | * DIRECT:Pipes are disabled. |
| 146 | * LEGACY:BAM is not used. |
| 147 | */ |
| 148 | enum bam_mode { |
| 149 | SPS, |
| 150 | DIRECT, |
| 151 | LEGACY, |
| 152 | }; |
| 153 | |
| 154 | /* Enum to define BAM pipe states: |
| 155 | * ENABLED:Producer and Consumer pipes are enabled. |
| 156 | * HALT:Consumer pipe is halted. (Preferred type) |
| 157 | * FULL_HALT:Both Producer and Consumer pipes are halted. |
| 158 | */ |
| 159 | enum bam_pipe_state { |
| 160 | ENABLED, |
| 161 | HALT, |
| 162 | FULL_HALT, |
| 163 | }; |
| 164 | |
| 165 | enum bam_type { |
| 166 | BAM_LITE, |
| 167 | BAM, |
| 168 | }; |
| 169 | |
| 170 | /* Structure to define BAM descriptors that describe the data |
| 171 | * descriptors written to the data FIFO. |
| 172 | * addr:Descriptor address. |
| 173 | * size:Each descriptor is 8 bytes. Size of the descriptor fifo must |
| 174 | * contain an integer number of Descriptors. |
| 175 | */ |
| 176 | struct bam_desc { |
| 177 | uint32_t addr; |
| 178 | uint16_t size; |
| 179 | uint8_t reserved; |
| 180 | uint8_t flags; |
| 181 | } __PACKED; |
| 182 | |
| 183 | struct bam_desc_fifo { |
| 184 | struct bam_desc *head; |
| 185 | struct bam_desc *current; |
| 186 | uint16_t size; |
| 187 | uint16_t offset; |
| 188 | }; |
| 189 | |
| 190 | /* Structure to define BAM pipes |
| 191 | * pipe_state: BAM pipe states. |
| 192 | * trans_type: BAM tranaction type. |
| 193 | * evt_gen_threshold: This register configures the threshold value for |
| 194 | * Read/Write event generation by the BAM |
| 195 | * towards another BAM. |
| 196 | * fifo: Circular fifo associated with this pipe. |
| 197 | * num_pipe: Number of pipes used in this bam. |
| 198 | * pipe: Pipe number for this pipe. |
| 199 | * spi_num: SPI number for the BAM interrupt. |
| 200 | * int_mode: Specifies the pipe mode. |
| 201 | * 1: Interrupt mode |
| 202 | * 0: Polling mode |
| 203 | */ |
| 204 | struct bam_pipe { |
| 205 | enum bam_pipe_state state; |
| 206 | enum bam_transaction_type trans_type; |
| 207 | struct bam_desc_fifo fifo; |
| 208 | uint16_t evt_gen_threshold; |
| 209 | uint8_t pipe_num; |
| 210 | uint8_t spi_num; |
| 211 | uint8_t int_mode; |
| 212 | uint8_t initialized; |
Deepa Dinamani | a0407ea | 2013-07-09 12:51:45 -0700 | [diff] [blame] | 213 | uint8_t lock_grp; |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 214 | }; |
| 215 | |
| 216 | /* Structure to define a BAM instance being used |
| 217 | * base:Base address for the BAM. |
| 218 | * type:BAM type. |
| 219 | * mode:BAM mode. |
| 220 | * pipe_pair:The pipe pairs to be used to access the BAM. |
| 221 | * threshold:This Register holds a threshold value for the |
| 222 | * counter summing the Size of the Descriptors Provided. |
Deepa Dinamani | e9ded13 | 2012-11-27 15:03:38 -0800 | [diff] [blame] | 223 | * ee:Execution Environment for the BAM. |
| 224 | * desc_len: Max desc length for the current BAM. |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 225 | */ |
| 226 | struct bam_instance { |
| 227 | uint32_t base; |
| 228 | enum bam_type type; |
| 229 | enum bam_mode mode; |
| 230 | uint8_t num_of_pipes; |
| 231 | struct bam_pipe pipe[3]; |
| 232 | uint16_t threshold; |
Deepa Dinamani | e9ded13 | 2012-11-27 15:03:38 -0800 | [diff] [blame] | 233 | uint32_t ee; |
| 234 | uint16_t max_desc_len; |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 235 | void (*callback)(int); |
| 236 | }; |
| 237 | |
| 238 | /* Command element(CE) structure*/ |
| 239 | struct cmd_element { |
| 240 | uint32_t addr_n_cmd; |
| 241 | uint32_t reg_data; |
| 242 | uint32_t reg_mask; |
| 243 | uint32_t reserve; |
| 244 | } __PACKED; |
| 245 | |
| 246 | void bam_init(struct bam_instance *bam); |
| 247 | void bam_sys_pipe_init(struct bam_instance *bam, |
| 248 | uint8_t pipe_num); |
Deepa Dinamani | e5ccd6c | 2012-08-16 11:41:06 -0700 | [diff] [blame] | 249 | int bam_pipe_fifo_init(struct bam_instance *bam, |
| 250 | uint8_t pipe_num); |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 251 | struct cmd_element* bam_add_cmd_element(struct cmd_element *ptr, |
| 252 | uint32_t addr, |
| 253 | uint32_t data, |
| 254 | enum bam_ce_cmd_t cmd_type); |
| 255 | int bam_add_desc(struct bam_instance *bam, |
| 256 | unsigned int pipe_num, |
| 257 | unsigned char *data_ptr, |
Deepa Dinamani | e5ccd6c | 2012-08-16 11:41:06 -0700 | [diff] [blame] | 258 | unsigned int data_len, |
| 259 | unsigned flags); |
| 260 | int bam_add_one_desc(struct bam_instance *bam, |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 261 | unsigned int pipe_num, |
| 262 | unsigned char*, |
| 263 | uint32_t len, |
| 264 | uint8_t flags); |
| 265 | void bam_sys_gen_event(struct bam_instance *bam, |
| 266 | uint8_t pipe_num, |
| 267 | unsigned int num_desc); |
| 268 | int bam_wait_for_interrupt(struct bam_instance *bam, |
| 269 | uint8_t pipe_num, |
| 270 | enum p_int_type interrupt); |
Deepa Dinamani | e5ccd6c | 2012-08-16 11:41:06 -0700 | [diff] [blame] | 271 | void bam_read_offset_update(struct bam_instance *bam, unsigned int pipe_num); |
Deepa Dinamani | 87feab8 | 2012-10-04 14:28:05 -0700 | [diff] [blame] | 272 | void bam_pipe_reset(struct bam_instance *bam, |
| 273 | uint8_t pipe_num); |
Deepa Dinamani | 9d470af | 2012-06-29 18:27:17 -0700 | [diff] [blame] | 274 | |
| 275 | #endif |