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Shashank Mittal23b8f422010-04-16 19:27:21 -07001/* Copyright (c) 2008, Google Inc.
2 * All rights reserved.
3 *
4 * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * * Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in
13 * the documentation and/or other materials provided with the
14 * distribution.
15 * * Neither the name of Google, Inc. nor the names of its contributors
16 * may be used to endorse or promote products derived from this
17 * software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
22 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
23 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
25 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
26 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
27 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
29 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 */
32
33#ifndef _PLATFORM_MSM8X60_IOMAP_H_
34#define _PLATFORM_MSM8X60_IOMAP_H_
35
36#define MSM_UART3_BASE 0xA9C00000
37
38#define MSM_VIC_BASE 0x02080000
39#define MSM_TMR_BASE 0x02000000
40#define MSM_GPT_BASE (MSM_TMR_BASE + 0x04)
41#define MSM_CSR_BASE 0x02081000
42#define MSM_GCC_BASE 0x02082000
43#define MSM_ACC0_BASE 0x02041000
44#define MSM_ACC1_BASE 0x02051000
45
46
47#define MSM_GIC_CPU_BASE 0x02081000
48#define MSM_GIC_DIST_BASE 0x02080000
49
50#define MSM_SDC1_BASE 0x12400000
Shashank Mittal23b8f422010-04-16 19:27:21 -070051
Subbaraman Narayanamurthy34d71172010-09-13 13:54:36 -070052#define MSM_SHARED_BASE 0x40000000
Subbaraman Narayanamurthyf9b6e0d2010-09-08 16:51:43 -070053
54#define SURF_DEBUG_LED_ADDR 0x1D000202
55
56#define GPIO_CFG133_ADDR 0x00801850
57#define GPIO_CFG135_ADDR 0x00801870
58#define GPIO_CFG136_ADDR 0x00801880
59#define GPIO_CFG137_ADDR 0x00801890
60#define GPIO_CFG138_ADDR 0x008018A0
61#define GPIO_CFG139_ADDR 0x008018B0
62#define GPIO_CFG140_ADDR 0x008018C0
63#define GPIO_CFG141_ADDR 0x008018D0
64#define GPIO_CFG142_ADDR 0x008018E0
65#define GPIO_CFG143_ADDR 0x008018F0
66#define GPIO_CFG144_ADDR 0x00801900
67#define GPIO_CFG145_ADDR 0x00801910
68#define GPIO_CFG146_ADDR 0x00801920
69#define GPIO_CFG147_ADDR 0x00801930
70#define GPIO_CFG148_ADDR 0x00801940
71#define GPIO_CFG149_ADDR 0x00801950
72#define GPIO_CFG150_ADDR 0x00801960
73#define GPIO_CFG151_ADDR 0x00801970
74#define GPIO_CFG152_ADDR 0x00801980
75#define GPIO_CFG153_ADDR 0x00801990
76#define GPIO_CFG154_ADDR 0x008019A0
77#define GPIO_CFG155_ADDR 0x008019B0
78#define GPIO_CFG156_ADDR 0x008019C0
79#define GPIO_CFG157_ADDR 0x008019D0
80#define GPIO_CFG158_ADDR 0x008019E0
81
82#define EBI2_CHIP_SELECT_CFG0 0x1A100000
83#define EBI2_XMEM_CS3_CFG1 0x1A110034
Shashank Mittal23b8f422010-04-16 19:27:21 -070084#endif