Travis Geiselbrecht | 1d0df69 | 2008-09-01 02:26:09 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008 Travis Geiselbrecht |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining |
| 5 | * a copy of this software and associated documentation files |
| 6 | * (the "Software"), to deal in the Software without restriction, |
| 7 | * including without limitation the rights to use, copy, modify, merge, |
| 8 | * publish, distribute, sublicense, and/or sell copies of the Software, |
| 9 | * and to permit persons to whom the Software is furnished to do so, |
| 10 | * subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be |
| 13 | * included in all copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 16 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 17 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| 18 | * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY |
| 19 | * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 20 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 21 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | */ |
| 23 | .globl init_48mhz_clock |
| 24 | |
| 25 | #define PMC_MCKR 0x30 |
| 26 | #define PMC_SR 0x68 |
| 27 | |
| 28 | #define PMC_MCKRDY 0x08 |
| 29 | #define PMC_PRES_DIV2 0x04 |
| 30 | #define PMC_CSS_PLL 0x03 |
| 31 | |
| 32 | /* BUG? |
| 33 | ** |
| 34 | ** If I try to exit by bx lr, lr is corrupted somewhere in here. |
| 35 | ** No clue why. FIQ USB wedge not playing nice? Am I cheating |
| 36 | ** with my CPSR calls? |
| 37 | */ |
| 38 | init_48mhz_clock: |
| 39 | ldr r1, =0xfffffc00 |
| 40 | mov r2, lr |
| 41 | |
| 42 | // turn on /2 prescaler |
| 43 | mov r0, #PMC_PRES_DIV2 |
| 44 | str r0, [r1, #PMC_MCKR] |
| 45 | wait_for_clock1: |
| 46 | ldr r0, [r1, #PMC_SR] |
| 47 | tst r0, #PMC_MCKRDY |
| 48 | beq wait_for_clock1 |
| 49 | |
| 50 | // switch to pll clock |
| 51 | mov r0, #(PMC_PRES_DIV2 | PMC_CSS_PLL) |
| 52 | str r0, [r1, #PMC_MCKR] |
| 53 | wait_for_clock2: |
| 54 | ldr r0, [r1, #PMC_SR] |
| 55 | tst r0, #PMC_MCKRDY |
| 56 | beq wait_for_clock2 |
| 57 | |
| 58 | bx r2 |