Ujwal Patel | 42c4cae | 2013-12-18 20:40:38 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are met: |
| 5 | * * Redistributions of source code must retain the above copyright |
| 6 | * notice, this list of conditions and the following disclaimer. |
| 7 | * * Redistributions in binary form must reproduce the above copyright |
| 8 | * notice, this list of conditions and the following disclaimer in the |
| 9 | * documentation and/or other materials provided with the distribution. |
| 10 | * * Neither the name of The Linux Foundation nor |
| 11 | * the names of its contributors may be used to endorse or promote |
| 12 | * products derived from this software without specific prior written |
| 13 | * permission. |
| 14 | * |
| 15 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 16 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 17 | * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 18 | * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
| 19 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| 20 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 21 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
| 22 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 23 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
| 24 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| 25 | * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 26 | */ |
| 27 | |
| 28 | #include <mdp5.h> |
| 29 | #include <debug.h> |
| 30 | #include <reg.h> |
| 31 | #include <target/display.h> |
| 32 | #include <platform/timer.h> |
| 33 | #include <platform/iomap.h> |
| 34 | #include <dev/lcdc.h> |
| 35 | #include <dev/fbcon.h> |
| 36 | #include <bits.h> |
| 37 | #include <msm_panel.h> |
| 38 | #include <mipi_dsi.h> |
| 39 | #include <err.h> |
| 40 | #include <clock.h> |
Siddhartha Agrawal | 8d69082 | 2013-01-28 12:18:58 -0800 | [diff] [blame] | 41 | #include <scm.h> |
| 42 | |
| 43 | int restore_secure_cfg(uint32_t id); |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 44 | |
| 45 | static int mdp_rev; |
| 46 | |
| 47 | void mdp_set_revision(int rev) |
| 48 | { |
| 49 | mdp_rev = rev; |
| 50 | } |
| 51 | |
| 52 | int mdp_get_revision() |
| 53 | { |
| 54 | return mdp_rev; |
| 55 | } |
| 56 | |
Siddhartha Agrawal | 1a87c5d | 2013-03-06 19:07:53 -0800 | [diff] [blame] | 57 | uint32_t mdss_mdp_intf_offset() |
| 58 | { |
| 59 | uint32_t mdss_mdp_intf_off; |
| 60 | uint32_t mdss_mdp_rev = readl(MDP_HW_REV); |
| 61 | |
Chandan Uddaraju | aab5851 | 2013-06-25 17:47:39 -0700 | [diff] [blame] | 62 | if (mdss_mdp_rev >= MDSS_MDP_HW_REV_102) |
Siddhartha Agrawal | 1a87c5d | 2013-03-06 19:07:53 -0800 | [diff] [blame] | 63 | mdss_mdp_intf_off = 0; |
Aravind Venkateswaran | d78d159 | 2013-06-19 15:39:54 -0700 | [diff] [blame] | 64 | else |
Chandan Uddaraju | aab5851 | 2013-06-25 17:47:39 -0700 | [diff] [blame] | 65 | mdss_mdp_intf_off = 0xEC00; |
Siddhartha Agrawal | 1a87c5d | 2013-03-06 19:07:53 -0800 | [diff] [blame] | 66 | |
| 67 | return mdss_mdp_intf_off; |
| 68 | } |
| 69 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 70 | void mdp_clk_gating_ctrl(void) |
| 71 | { |
| 72 | writel(0x40000000, MDP_CLK_CTRL0); |
| 73 | udelay(20); |
| 74 | writel(0x40000040, MDP_CLK_CTRL0); |
| 75 | writel(0x40000000, MDP_CLK_CTRL1); |
| 76 | writel(0x00400000, MDP_CLK_CTRL3); |
| 77 | udelay(20); |
| 78 | writel(0x00404000, MDP_CLK_CTRL3); |
| 79 | writel(0x40000000, MDP_CLK_CTRL4); |
| 80 | } |
| 81 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 82 | static void mdss_source_pipe_config(struct fbcon_config *fb, struct msm_panel_info |
Siddhartha Agrawal | d389339 | 2013-06-11 15:32:19 -0700 | [diff] [blame] | 83 | *pinfo, uint32_t pipe_base) |
| 84 | { |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 85 | uint32_t src_size, out_size, stride, pipe_swap; |
Siddhartha Agrawal | 6ef1e22 | 2013-06-12 18:24:58 -0700 | [diff] [blame] | 86 | uint32_t fb_off = 0; |
Siddhartha Agrawal | d389339 | 2013-06-11 15:32:19 -0700 | [diff] [blame] | 87 | |
| 88 | /* write active region size*/ |
| 89 | src_size = (fb->height << 16) + fb->width; |
| 90 | out_size = src_size; |
| 91 | |
| 92 | if (pinfo->lcdc.dual_pipe) { |
| 93 | out_size = (fb->height << 16) + (fb->width / 2); |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 94 | pipe_swap = (pinfo->lcdc.pipe_swap == TRUE) ? 1 : 0; |
| 95 | |
| 96 | if (pipe_swap && ((pipe_base == MDP_VP_0_RGB_0_BASE) || |
| 97 | (pipe_base == MDP_VP_0_DMA_0_BASE))) |
Siddhartha Agrawal | 6ef1e22 | 2013-06-12 18:24:58 -0700 | [diff] [blame] | 98 | fb_off = (pinfo->xres / 2); |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 99 | else if (!pipe_swap && ((pipe_base == MDP_VP_0_RGB_1_BASE) || |
| 100 | (pipe_base == MDP_VP_0_DMA_1_BASE))) |
Siddhartha Agrawal | 6ef1e22 | 2013-06-12 18:24:58 -0700 | [diff] [blame] | 101 | fb_off = (pinfo->xres / 2); |
Siddhartha Agrawal | d389339 | 2013-06-11 15:32:19 -0700 | [diff] [blame] | 102 | } |
| 103 | |
| 104 | stride = (fb->stride * fb->bpp/8); |
| 105 | |
| 106 | writel(fb->base, pipe_base + PIPE_SSPP_SRC0_ADDR); |
| 107 | writel(stride, pipe_base + PIPE_SSPP_SRC_YSTRIDE); |
| 108 | writel(src_size, pipe_base + PIPE_SSPP_SRC_IMG_SIZE); |
| 109 | writel(out_size, pipe_base + PIPE_SSPP_SRC_SIZE); |
| 110 | writel(out_size, pipe_base + PIPE_SSPP_SRC_OUT_SIZE); |
Siddhartha Agrawal | 6ef1e22 | 2013-06-12 18:24:58 -0700 | [diff] [blame] | 111 | writel(fb_off, pipe_base + PIPE_SSPP_SRC_XY); |
Siddhartha Agrawal | d389339 | 2013-06-11 15:32:19 -0700 | [diff] [blame] | 112 | writel(0x00, pipe_base + PIPE_SSPP_OUT_XY); |
| 113 | |
| 114 | /* Tight Packing 3bpp 0-Alpha 8-bit R B G */ |
| 115 | writel(0x0002243F, pipe_base + PIPE_SSPP_SRC_FORMAT); |
| 116 | writel(0x00020001, pipe_base + PIPE_SSPP_SRC_UNPACK_PATTERN); |
| 117 | writel(0x00, pipe_base + PIPE_SSPP_SRC_OP_MODE); |
| 118 | } |
| 119 | |
Siddhartha Agrawal | 703153e | 2013-05-23 19:35:36 -0700 | [diff] [blame] | 120 | static void mdss_vbif_setup() |
| 121 | { |
| 122 | int access_secure = restore_secure_cfg(SECURE_DEVICE_MDSS); |
Aravind Venkateswaran | d78d159 | 2013-06-19 15:39:54 -0700 | [diff] [blame] | 123 | uint32_t mdp_hw_rev = readl(MDP_HW_REV); |
Siddhartha Agrawal | 703153e | 2013-05-23 19:35:36 -0700 | [diff] [blame] | 124 | |
| 125 | /* TZ returns an errornous ret val even if the VBIF registers were |
| 126 | * successfully unlocked. Ignore TZ return value till it's fixed */ |
| 127 | if (!access_secure || 1) { |
| 128 | dprintf(SPEW, "MDSS VBIF registers unlocked by TZ.\n"); |
Siddhartha Agrawal | 703153e | 2013-05-23 19:35:36 -0700 | [diff] [blame] | 129 | |
Ujwal Patel | 42c4cae | 2013-12-18 20:40:38 -0800 | [diff] [blame] | 130 | /* Force VBIF Clocks on */ |
| 131 | if (mdp_hw_rev < MDSS_MDP_HW_REV_103) |
| 132 | writel(0x1, VBIF_VBIF_DDR_FORCE_CLK_ON); |
| 133 | |
| 134 | /* |
| 135 | * Following configuration is needed because on some versions, |
| 136 | * recommended reset values are not stored. |
| 137 | */ |
| 138 | if (MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, |
| 139 | MDSS_MDP_HW_REV_100)) { |
Siddhartha Agrawal | 703153e | 2013-05-23 19:35:36 -0700 | [diff] [blame] | 140 | writel(0x00000707, VBIF_VBIF_DDR_OUT_MAX_BURST); |
| 141 | writel(0x00000030, VBIF_VBIF_DDR_ARB_CTRL ); |
| 142 | writel(0x00000001, VBIF_VBIF_DDR_RND_RBN_QOS_ARB); |
| 143 | writel(0x00000FFF, VBIF_VBIF_DDR_OUT_AOOO_AXI_EN); |
| 144 | writel(0x0FFF0FFF, VBIF_VBIF_DDR_OUT_AX_AOOO); |
| 145 | writel(0x22222222, VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF0); |
| 146 | writel(0x00002222, VBIF_VBIF_DDR_AXI_AMEMTYPE_CONF1); |
Ujwal Patel | 42c4cae | 2013-12-18 20:40:38 -0800 | [diff] [blame] | 147 | } else if (MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, |
| 148 | MDSS_MDP_HW_REV_101)) { |
Aravind Venkateswaran | d78d159 | 2013-06-19 15:39:54 -0700 | [diff] [blame] | 149 | writel(0x00000707, VBIF_VBIF_DDR_OUT_MAX_BURST); |
| 150 | writel(0x00000003, VBIF_VBIF_DDR_ARB_CTRL); |
Siddhartha Agrawal | 703153e | 2013-05-23 19:35:36 -0700 | [diff] [blame] | 151 | } |
| 152 | } |
| 153 | } |
| 154 | |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 155 | static uint32_t mdss_smp_alloc(uint32_t client_id, uint32_t smp_cnt, |
| 156 | uint32_t fixed_smp_cnt, uint32_t free_smp_offset) |
Siddhartha Agrawal | 76574f8 | 2013-05-23 19:33:01 -0700 | [diff] [blame] | 157 | { |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 158 | uint32_t i, j; |
| 159 | uint32_t reg_val = 0; |
Siddhartha Agrawal | 76574f8 | 2013-05-23 19:33:01 -0700 | [diff] [blame] | 160 | |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 161 | for (i = fixed_smp_cnt, j = 0; i < smp_cnt; i++) { |
| 162 | /* max 3 MMB per register */ |
| 163 | reg_val |= client_id << (((j++) % 3) * 8); |
| 164 | if ((j % 3) == 0) { |
| 165 | writel(reg_val, MMSS_MDP_SMP_ALLOC_W_BASE + |
| 166 | free_smp_offset); |
| 167 | writel(reg_val, MMSS_MDP_SMP_ALLOC_R_BASE + |
| 168 | free_smp_offset); |
| 169 | reg_val = 0; |
| 170 | free_smp_offset += 4; |
| 171 | } |
Siddhartha Agrawal | 76574f8 | 2013-05-23 19:33:01 -0700 | [diff] [blame] | 172 | } |
| 173 | |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 174 | if (j % 3) { |
| 175 | writel(reg_val, MMSS_MDP_SMP_ALLOC_W_BASE + free_smp_offset); |
| 176 | writel(reg_val, MMSS_MDP_SMP_ALLOC_R_BASE + free_smp_offset); |
| 177 | free_smp_offset += 4; |
| 178 | } |
Siddhartha Agrawal | 76574f8 | 2013-05-23 19:33:01 -0700 | [diff] [blame] | 179 | |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 180 | return free_smp_offset; |
| 181 | } |
| 182 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 183 | static void mdss_smp_setup(struct msm_panel_info *pinfo, uint32_t left_pipe, |
| 184 | uint32_t right_pipe) |
| 185 | |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 186 | { |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 187 | uint32_t left_sspp_client_id, right_sspp_client_id; |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 188 | uint32_t bpp = 3, free_smp_offset = 0, xres = MDSS_MAX_LINE_BUF_WIDTH; |
| 189 | uint32_t smp_cnt, smp_size = 4096, fixed_smp_cnt = 0; |
| 190 | uint32_t mdss_mdp_rev = readl(MDP_HW_REV); |
| 191 | |
| 192 | if ((mdss_mdp_rev >= MDSS_MDP_HW_REV_103) && |
| 193 | (mdss_mdp_rev < MDSS_MDP_HW_REV_200)) { |
| 194 | smp_size = 8192; |
| 195 | fixed_smp_cnt = 2; |
| 196 | free_smp_offset = 0xC; |
| 197 | } |
| 198 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 199 | if (pinfo->use_dma_pipe) |
| 200 | right_sspp_client_id = 0xD; /* 13 */ |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 201 | else |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 202 | right_sspp_client_id = 0x11; /* 17 */ |
| 203 | |
| 204 | if (MDSS_IS_MAJOR_MINOR_MATCHING(mdss_mdp_rev, MDSS_MDP_HW_REV_101)) |
| 205 | left_sspp_client_id = (pinfo->use_dma_pipe) ? 0x4 : 0x07; /* 4 or 7 */ |
| 206 | else |
| 207 | left_sspp_client_id = (pinfo->use_dma_pipe) ? 0xA : 0x10; /* 10 or 16 */ |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 208 | |
| 209 | /* Each pipe driving half the screen */ |
| 210 | if (pinfo->lcdc.dual_pipe) |
| 211 | xres /= 2; |
| 212 | |
| 213 | /* bpp = bytes per pixel of input image */ |
| 214 | smp_cnt = (xres * bpp * 2) + smp_size - 1; |
| 215 | smp_cnt /= smp_size; |
Siddhartha Agrawal | 76574f8 | 2013-05-23 19:33:01 -0700 | [diff] [blame] | 216 | |
| 217 | if (smp_cnt > 4) { |
| 218 | dprintf(CRITICAL, "ERROR: %s: Out of SMP's, cnt=%d! \n", __func__, |
| 219 | smp_cnt); |
| 220 | ASSERT(0); /* Max 4 SMPs can be allocated per client */ |
| 221 | } |
| 222 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 223 | writel(smp_cnt * 0x40, left_pipe + REQPRIORITY_FIFO_WATERMARK0); |
| 224 | writel(smp_cnt * 0x80, left_pipe + REQPRIORITY_FIFO_WATERMARK1); |
| 225 | writel(smp_cnt * 0xc0, left_pipe + REQPRIORITY_FIFO_WATERMARK2); |
Siddhartha Agrawal | 76574f8 | 2013-05-23 19:33:01 -0700 | [diff] [blame] | 226 | |
| 227 | if (pinfo->lcdc.dual_pipe) { |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 228 | writel(smp_cnt * 0x40, right_pipe + REQPRIORITY_FIFO_WATERMARK0); |
| 229 | writel(smp_cnt * 0x80, right_pipe + REQPRIORITY_FIFO_WATERMARK1); |
| 230 | writel(smp_cnt * 0xc0, right_pipe + REQPRIORITY_FIFO_WATERMARK2); |
Siddhartha Agrawal | 76574f8 | 2013-05-23 19:33:01 -0700 | [diff] [blame] | 231 | } |
| 232 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 233 | free_smp_offset = mdss_smp_alloc(left_sspp_client_id, smp_cnt, |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 234 | fixed_smp_cnt, free_smp_offset); |
| 235 | if (pinfo->lcdc.dual_pipe) |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 236 | mdss_smp_alloc(right_sspp_client_id, smp_cnt, fixed_smp_cnt, |
Ujwal Patel | 0b7743b | 2013-12-18 23:32:36 -0800 | [diff] [blame] | 237 | free_smp_offset); |
Siddhartha Agrawal | 76574f8 | 2013-05-23 19:33:01 -0700 | [diff] [blame] | 238 | } |
| 239 | |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 240 | void mdss_intf_tg_setup(struct msm_panel_info *pinfo, uint32_t intf_base) |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 241 | { |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 242 | uint32_t hsync_period, vsync_period; |
| 243 | uint32_t hsync_start_x, hsync_end_x; |
| 244 | uint32_t display_hctl, active_hctl, hsync_ctl, display_vstart, display_vend; |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 245 | uint32_t mdss_mdp_intf_off; |
Siddhartha Agrawal | d359f14 | 2013-06-12 19:16:08 -0700 | [diff] [blame] | 246 | uint32_t adjust_xres = 0; |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 247 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 248 | struct lcdc_panel_info *lcdc = NULL; |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 249 | |
| 250 | if (pinfo == NULL) |
| 251 | return ERR_INVALID_ARGS; |
| 252 | |
| 253 | lcdc = &(pinfo->lcdc); |
| 254 | if (lcdc == NULL) |
| 255 | return ERR_INVALID_ARGS; |
| 256 | |
Siddhartha Agrawal | d359f14 | 2013-06-12 19:16:08 -0700 | [diff] [blame] | 257 | adjust_xres = pinfo->xres; |
Kuogee Hsieh | ad69c3c | 2013-08-01 14:34:29 -0700 | [diff] [blame] | 258 | if (pinfo->lcdc.split_display) { |
Siddhartha Agrawal | d359f14 | 2013-06-12 19:16:08 -0700 | [diff] [blame] | 259 | adjust_xres /= 2; |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 260 | if (intf_base == MDP_INTF_1_BASE) { |
Dhaval Patel | cbdfdf8 | 2014-01-03 17:33:39 -0800 | [diff] [blame] | 261 | writel(BIT(8), MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL); |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 262 | writel(0x0, MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL); |
| 263 | writel(0x1, MDP_REG_SPLIT_DISPLAY_EN); |
| 264 | } |
| 265 | } |
| 266 | |
| 267 | mdss_mdp_intf_off = intf_base + mdss_mdp_intf_offset(); |
| 268 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 269 | hsync_period = lcdc->h_pulse_width + |
| 270 | lcdc->h_back_porch + |
Siddhartha Agrawal | d359f14 | 2013-06-12 19:16:08 -0700 | [diff] [blame] | 271 | adjust_xres + lcdc->xres_pad + lcdc->h_front_porch; |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 272 | vsync_period = (lcdc->v_pulse_width + |
| 273 | lcdc->v_back_porch + |
| 274 | pinfo->yres + lcdc->yres_pad + |
| 275 | lcdc->v_front_porch); |
| 276 | |
| 277 | hsync_start_x = |
| 278 | lcdc->h_pulse_width + |
| 279 | lcdc->h_back_porch; |
| 280 | hsync_end_x = |
| 281 | hsync_period - lcdc->h_front_porch - 1; |
| 282 | |
| 283 | display_vstart = (lcdc->v_pulse_width + |
| 284 | lcdc->v_back_porch) |
| 285 | * hsync_period + lcdc->hsync_skew; |
| 286 | display_vend = ((vsync_period - lcdc->v_front_porch) * hsync_period) |
| 287 | +lcdc->hsync_skew - 1; |
| 288 | |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 289 | if (intf_base == MDP_INTF_0_BASE) { /* eDP */ |
| 290 | display_vstart += lcdc->h_pulse_width + lcdc->h_back_porch; |
| 291 | display_vend -= lcdc->h_front_porch; |
| 292 | } |
| 293 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 294 | hsync_ctl = (hsync_period << 16) | lcdc->h_pulse_width; |
| 295 | display_hctl = (hsync_end_x << 16) | hsync_start_x; |
| 296 | |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 297 | writel(hsync_ctl, MDP_HSYNC_CTL + mdss_mdp_intf_off); |
| 298 | writel(vsync_period*hsync_period, MDP_VSYNC_PERIOD_F0 + |
| 299 | mdss_mdp_intf_off); |
| 300 | writel(0x00, MDP_VSYNC_PERIOD_F1 + mdss_mdp_intf_off); |
| 301 | writel(lcdc->v_pulse_width*hsync_period, |
| 302 | MDP_VSYNC_PULSE_WIDTH_F0 + |
| 303 | mdss_mdp_intf_off); |
| 304 | writel(0x00, MDP_VSYNC_PULSE_WIDTH_F1 + mdss_mdp_intf_off); |
| 305 | writel(display_hctl, MDP_DISPLAY_HCTL + mdss_mdp_intf_off); |
| 306 | writel(display_vstart, MDP_DISPLAY_V_START_F0 + |
| 307 | mdss_mdp_intf_off); |
| 308 | writel(0x00, MDP_DISPLAY_V_START_F1 + mdss_mdp_intf_off); |
| 309 | writel(display_vend, MDP_DISPLAY_V_END_F0 + |
| 310 | mdss_mdp_intf_off); |
| 311 | writel(0x00, MDP_DISPLAY_V_END_F1 + mdss_mdp_intf_off); |
| 312 | writel(0x00, MDP_ACTIVE_HCTL + mdss_mdp_intf_off); |
| 313 | writel(0x00, MDP_ACTIVE_V_START_F0 + mdss_mdp_intf_off); |
| 314 | writel(0x00, MDP_ACTIVE_V_START_F1 + mdss_mdp_intf_off); |
| 315 | writel(0x00, MDP_ACTIVE_V_END_F0 + mdss_mdp_intf_off); |
| 316 | writel(0x00, MDP_ACTIVE_V_END_F1 + mdss_mdp_intf_off); |
| 317 | writel(0xFF, MDP_UNDERFFLOW_COLOR + mdss_mdp_intf_off); |
| 318 | |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 319 | if (intf_base == MDP_INTF_0_BASE) /* eDP */ |
| 320 | writel(0x212A, MDP_PANEL_FORMAT + mdss_mdp_intf_off); |
| 321 | else |
| 322 | writel(0x213F, MDP_PANEL_FORMAT + mdss_mdp_intf_off); |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 323 | } |
| 324 | |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 325 | void mdss_layer_mixer_setup(struct fbcon_config *fb, struct msm_panel_info |
| 326 | *pinfo) |
| 327 | { |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 328 | uint32_t mdp_rgb_size, height, width, val; |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 329 | |
Dhaval Patel | 0386811 | 2013-10-25 10:25:06 -0700 | [diff] [blame] | 330 | height = fb->height; |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 331 | width = fb->width; |
| 332 | |
| 333 | if (pinfo->lcdc.dual_pipe) |
| 334 | width /= 2; |
| 335 | |
| 336 | /* write active region size*/ |
| 337 | mdp_rgb_size = (height << 16) | width; |
| 338 | |
| 339 | writel(mdp_rgb_size, MDP_VP_0_MIXER_0_BASE + LAYER_0_OUT_SIZE); |
| 340 | writel(0x00, MDP_VP_0_MIXER_0_BASE + LAYER_0_OP_MODE); |
| 341 | writel(0x100, MDP_VP_0_MIXER_0_BASE + LAYER_0_BLEND_OP); |
| 342 | writel(0xFF, MDP_VP_0_MIXER_0_BASE + LAYER_0_BLEND0_FG_ALPHA); |
| 343 | writel(0x100, MDP_VP_0_MIXER_0_BASE + LAYER_1_BLEND_OP); |
| 344 | writel(0xFF, MDP_VP_0_MIXER_0_BASE + LAYER_1_BLEND0_FG_ALPHA); |
| 345 | writel(0x100, MDP_VP_0_MIXER_0_BASE + LAYER_2_BLEND_OP); |
| 346 | writel(0xFF, MDP_VP_0_MIXER_0_BASE + LAYER_2_BLEND0_FG_ALPHA); |
| 347 | writel(0x100, MDP_VP_0_MIXER_0_BASE + LAYER_3_BLEND_OP); |
| 348 | writel(0xFF, MDP_VP_0_MIXER_0_BASE + LAYER_3_BLEND0_FG_ALPHA); |
| 349 | |
| 350 | /* Baselayer for layer mixer 0 */ |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 351 | if (pinfo->use_dma_pipe) |
| 352 | writel(0x0040000, MDP_CTL_0_BASE + CTL_LAYER_0); |
| 353 | else |
| 354 | writel(0x0000200, MDP_CTL_0_BASE + CTL_LAYER_0); |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 355 | |
| 356 | if (pinfo->lcdc.dual_pipe) { |
| 357 | writel(mdp_rgb_size, MDP_VP_0_MIXER_1_BASE + LAYER_0_OUT_SIZE); |
| 358 | writel(0x00, MDP_VP_0_MIXER_1_BASE + LAYER_0_OP_MODE); |
| 359 | writel(0x100, MDP_VP_0_MIXER_1_BASE + LAYER_0_BLEND_OP); |
| 360 | writel(0xFF, MDP_VP_0_MIXER_1_BASE + LAYER_0_BLEND0_FG_ALPHA); |
| 361 | writel(0x100, MDP_VP_0_MIXER_1_BASE + LAYER_1_BLEND_OP); |
| 362 | writel(0xFF, MDP_VP_0_MIXER_1_BASE + LAYER_1_BLEND0_FG_ALPHA); |
| 363 | writel(0x100, MDP_VP_0_MIXER_1_BASE + LAYER_2_BLEND_OP); |
| 364 | writel(0xFF, MDP_VP_0_MIXER_1_BASE + LAYER_2_BLEND0_FG_ALPHA); |
| 365 | writel(0x100, MDP_VP_0_MIXER_1_BASE + LAYER_3_BLEND_OP); |
| 366 | writel(0xFF, MDP_VP_0_MIXER_1_BASE + LAYER_3_BLEND0_FG_ALPHA); |
| 367 | |
Kuogee Hsieh | ad69c3c | 2013-08-01 14:34:29 -0700 | [diff] [blame] | 368 | /* Baselayer for layer mixer 1 */ |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 369 | val = pinfo->use_dma_pipe ? 0x200000 : 0x1000; |
Kuogee Hsieh | ad69c3c | 2013-08-01 14:34:29 -0700 | [diff] [blame] | 370 | if (pinfo->lcdc.split_display) |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 371 | writel(val, MDP_CTL_1_BASE + CTL_LAYER_1); |
Kuogee Hsieh | ad69c3c | 2013-08-01 14:34:29 -0700 | [diff] [blame] | 372 | else |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 373 | writel(val, MDP_CTL_0_BASE + CTL_LAYER_1); |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 374 | } |
| 375 | } |
| 376 | |
Dhaval Patel | d6c54b5 | 2014-01-03 16:55:15 -0800 | [diff] [blame] | 377 | void mdss_qos_remapper_setup(void) |
| 378 | { |
| 379 | uint32_t mdp_hw_rev = readl(MDP_HW_REV); |
| 380 | uint32_t map; |
| 381 | |
| 382 | if (MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, MDSS_MDP_HW_REV_100) || |
| 383 | MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, |
| 384 | MDSS_MDP_HW_REV_102)) |
| 385 | map = 0xE9; |
| 386 | else if (MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, |
| 387 | MDSS_MDP_HW_REV_101)) |
| 388 | map = 0xA5; |
| 389 | else if (MDSS_IS_MAJOR_MINOR_MATCHING(mdp_hw_rev, |
| 390 | MDSS_MDP_HW_REV_103)) |
| 391 | map = 0xFA; |
| 392 | else |
| 393 | return; |
| 394 | |
| 395 | writel(map, MDP_QOS_REMAPPER_CLASS_0); |
| 396 | } |
| 397 | |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 398 | int mdp_dsi_video_config(struct msm_panel_info *pinfo, |
| 399 | struct fbcon_config *fb) |
| 400 | { |
| 401 | int ret = NO_ERROR; |
| 402 | struct lcdc_panel_info *lcdc = NULL; |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 403 | uint32_t intf_sel = 0x100; |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 404 | uint32_t left_pipe, right_pipe; |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 405 | |
| 406 | mdss_intf_tg_setup(pinfo, MDP_INTF_1_BASE); |
| 407 | |
| 408 | if (pinfo->mipi.dual_dsi) |
| 409 | mdss_intf_tg_setup(pinfo, MDP_INTF_2_BASE); |
Siddhartha Agrawal | 1a87c5d | 2013-03-06 19:07:53 -0800 | [diff] [blame] | 410 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 411 | mdp_clk_gating_ctrl(); |
| 412 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 413 | if (pinfo->use_dma_pipe) { |
| 414 | left_pipe = MDP_VP_0_DMA_0_BASE; |
| 415 | right_pipe = MDP_VP_0_DMA_1_BASE; |
| 416 | } else { |
| 417 | left_pipe = MDP_VP_0_RGB_0_BASE; |
| 418 | right_pipe = MDP_VP_0_RGB_1_BASE; |
| 419 | } |
| 420 | |
Siddhartha Agrawal | 703153e | 2013-05-23 19:35:36 -0700 | [diff] [blame] | 421 | mdss_vbif_setup(); |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 422 | mdss_smp_setup(pinfo, left_pipe, right_pipe); |
Siddhartha Agrawal | b1b5a1f | 2013-04-17 19:53:41 -0700 | [diff] [blame] | 423 | |
Dhaval Patel | d6c54b5 | 2014-01-03 16:55:15 -0800 | [diff] [blame] | 424 | mdss_qos_remapper_setup(); |
Siddhartha Agrawal | b1b5a1f | 2013-04-17 19:53:41 -0700 | [diff] [blame] | 425 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 426 | mdss_source_pipe_config(fb, pinfo, left_pipe); |
| 427 | |
Siddhartha Agrawal | d389339 | 2013-06-11 15:32:19 -0700 | [diff] [blame] | 428 | if (pinfo->lcdc.dual_pipe) |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 429 | mdss_source_pipe_config(fb, pinfo, right_pipe); |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 430 | |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 431 | mdss_layer_mixer_setup(fb, pinfo); |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 432 | |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 433 | writel(0x1F20, MDP_CTL_0_BASE + CTL_TOP); |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 434 | |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 435 | if (pinfo->mipi.dual_dsi) { |
| 436 | writel(0x1F30, MDP_CTL_1_BASE + CTL_TOP); |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 437 | intf_sel |= BIT(16); /* INTF 2 enable */ |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 438 | } |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 439 | |
| 440 | writel(intf_sel, MDP_DISP_INTF_SEL); |
| 441 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 442 | writel(0x1111, MDP_VIDEO_INTF_UNDERFLOW_CTL); |
| 443 | writel(0x01, MDP_UPPER_NEW_ROI_PRIOR_RO_START); |
| 444 | writel(0x01, MDP_LOWER_NEW_ROI_PRIOR_TO_START); |
| 445 | |
| 446 | return 0; |
| 447 | } |
| 448 | |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 449 | int mdp_edp_config(struct msm_panel_info *pinfo, struct fbcon_config *fb) |
| 450 | { |
| 451 | int ret = NO_ERROR; |
| 452 | struct lcdc_panel_info *lcdc = NULL; |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 453 | uint32_t left_pipe, right_pipe; |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 454 | |
| 455 | mdss_intf_tg_setup(pinfo, MDP_INTF_0_BASE); |
| 456 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 457 | if (pinfo->use_dma_pipe) { |
| 458 | left_pipe = MDP_VP_0_DMA_0_BASE; |
| 459 | right_pipe = MDP_VP_0_DMA_1_BASE; |
| 460 | } else { |
| 461 | left_pipe = MDP_VP_0_RGB_0_BASE; |
| 462 | right_pipe = MDP_VP_0_RGB_1_BASE; |
| 463 | } |
| 464 | |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 465 | mdp_clk_gating_ctrl(); |
| 466 | |
| 467 | mdss_vbif_setup(); |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 468 | mdss_smp_setup(pinfo, left_pipe, right_pipe); |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 469 | |
Dhaval Patel | d6c54b5 | 2014-01-03 16:55:15 -0800 | [diff] [blame] | 470 | mdss_qos_remapper_setup(); |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 471 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 472 | mdss_source_pipe_config(fb, pinfo, left_pipe); |
Kuogee Hsieh | ad69c3c | 2013-08-01 14:34:29 -0700 | [diff] [blame] | 473 | if (pinfo->lcdc.dual_pipe) |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 474 | mdss_source_pipe_config(fb, pinfo, right_pipe); |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 475 | |
| 476 | mdss_layer_mixer_setup(fb, pinfo); |
| 477 | |
Kuogee Hsieh | ad69c3c | 2013-08-01 14:34:29 -0700 | [diff] [blame] | 478 | if (pinfo->lcdc.dual_pipe) |
| 479 | writel(0x181F10, MDP_CTL_0_BASE + CTL_TOP); |
| 480 | else |
| 481 | writel(0x1F10, MDP_CTL_0_BASE + CTL_TOP); |
| 482 | |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 483 | writel(0x9, MDP_DISP_INTF_SEL); |
| 484 | writel(0x1111, MDP_VIDEO_INTF_UNDERFLOW_CTL); |
| 485 | writel(0x01, MDP_UPPER_NEW_ROI_PRIOR_RO_START); |
| 486 | writel(0x01, MDP_LOWER_NEW_ROI_PRIOR_TO_START); |
| 487 | |
| 488 | return 0; |
| 489 | } |
| 490 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 491 | int mdp_dsi_cmd_config(struct msm_panel_info *pinfo, |
| 492 | struct fbcon_config *fb) |
| 493 | { |
Dhaval Patel | 8ea8884 | 2014-01-03 17:29:22 -0800 | [diff] [blame] | 494 | uint32_t intf_sel = BIT(8); |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 495 | int ret = NO_ERROR; |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 496 | uint32_t left_pipe, right_pipe; |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 497 | |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 498 | struct lcdc_panel_info *lcdc = NULL; |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 499 | uint32_t mdss_mdp_intf_off = 0; |
| 500 | |
| 501 | if (pinfo == NULL) |
| 502 | return ERR_INVALID_ARGS; |
| 503 | |
| 504 | lcdc = &(pinfo->lcdc); |
| 505 | if (lcdc == NULL) |
| 506 | return ERR_INVALID_ARGS; |
| 507 | |
Dhaval Patel | 8ea8884 | 2014-01-03 17:29:22 -0800 | [diff] [blame] | 508 | if (pinfo->lcdc.split_display) { |
| 509 | writel(0x102, MDP_REG_SPLIT_DISPLAY_UPPER_PIPE_CTL); |
| 510 | writel(0x2, MDP_REG_SPLIT_DISPLAY_LOWER_PIPE_CTL); |
| 511 | writel(0x1, MDP_REG_SPLIT_DISPLAY_EN); |
| 512 | } |
| 513 | |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 514 | mdss_mdp_intf_off = mdss_mdp_intf_offset(); |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 515 | |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 516 | mdp_clk_gating_ctrl(); |
| 517 | |
Dhaval Patel | 8ea8884 | 2014-01-03 17:29:22 -0800 | [diff] [blame] | 518 | if (pinfo->mipi.dual_dsi) |
| 519 | intf_sel |= BIT(16); /* INTF 2 enable */ |
| 520 | |
| 521 | writel(intf_sel, MDP_DISP_INTF_SEL); |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 522 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 523 | if (pinfo->use_dma_pipe) { |
| 524 | left_pipe = MDP_VP_0_DMA_0_BASE; |
| 525 | right_pipe = MDP_VP_0_DMA_1_BASE; |
| 526 | } else { |
| 527 | left_pipe = MDP_VP_0_RGB_0_BASE; |
| 528 | right_pipe = MDP_VP_0_RGB_1_BASE; |
| 529 | } |
| 530 | |
Siddhartha Agrawal | 703153e | 2013-05-23 19:35:36 -0700 | [diff] [blame] | 531 | mdss_vbif_setup(); |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 532 | mdss_smp_setup(pinfo, left_pipe, right_pipe); |
Dhaval Patel | d6c54b5 | 2014-01-03 16:55:15 -0800 | [diff] [blame] | 533 | mdss_qos_remapper_setup(); |
| 534 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 535 | mdss_source_pipe_config(fb, pinfo, left_pipe); |
| 536 | |
Dhaval Patel | 8ea8884 | 2014-01-03 17:29:22 -0800 | [diff] [blame] | 537 | if (pinfo->lcdc.dual_pipe) |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 538 | mdss_source_pipe_config(fb, pinfo, right_pipe); |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 539 | |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 540 | mdss_layer_mixer_setup(fb, pinfo); |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 541 | |
Siddhartha Agrawal | f0b41a2 | 2013-05-23 20:32:20 -0700 | [diff] [blame] | 542 | writel(0x213F, MDP_INTF_1_BASE + MDP_PANEL_FORMAT + mdss_mdp_intf_off); |
Dhaval Patel | 8ea8884 | 2014-01-03 17:29:22 -0800 | [diff] [blame] | 543 | writel(0x21f20, MDP_CTL_0_BASE + CTL_TOP); |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 544 | |
Dhaval Patel | 8ea8884 | 2014-01-03 17:29:22 -0800 | [diff] [blame] | 545 | if (pinfo->mipi.dual_dsi) { |
| 546 | writel(0x213F, MDP_INTF_2_BASE + MDP_PANEL_FORMAT + mdss_mdp_intf_off); |
| 547 | writel(0x21F30, MDP_CTL_1_BASE + CTL_TOP); |
| 548 | } |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 549 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 550 | return ret; |
| 551 | } |
| 552 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 553 | int mdp_dsi_video_on(struct msm_panel_info *pinfo) |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 554 | { |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 555 | if (pinfo->use_dma_pipe) { |
| 556 | writel(0x22840, MDP_CTL_0_BASE + CTL_FLUSH); |
| 557 | writel(0x25080, MDP_CTL_1_BASE + CTL_FLUSH); |
| 558 | } else { |
| 559 | writel(0x22048, MDP_CTL_0_BASE + CTL_FLUSH); |
| 560 | writel(0x24090, MDP_CTL_1_BASE + CTL_FLUSH); |
| 561 | } |
Siddhartha Agrawal | 1a87c5d | 2013-03-06 19:07:53 -0800 | [diff] [blame] | 562 | writel(0x01, MDP_INTF_1_TIMING_ENGINE_EN + mdss_mdp_intf_offset()); |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 563 | |
| 564 | return NO_ERROR; |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 565 | } |
| 566 | |
| 567 | int mdp_dsi_video_off() |
| 568 | { |
| 569 | if(!target_cont_splash_screen()) |
| 570 | { |
Siddhartha Agrawal | 1a87c5d | 2013-03-06 19:07:53 -0800 | [diff] [blame] | 571 | writel(0x00000000, MDP_INTF_1_TIMING_ENGINE_EN + |
| 572 | mdss_mdp_intf_offset()); |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 573 | mdelay(60); |
| 574 | /* Ping-Pong done Tear Check Read/Write */ |
| 575 | /* Underrun(Interface 0/1/2/3) VSYNC Interrupt Enable */ |
| 576 | writel(0xFF777713, MDP_INTR_CLEAR); |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 577 | } |
| 578 | |
Siddhartha Agrawal | 6a59822 | 2013-02-17 18:33:27 -0800 | [diff] [blame] | 579 | writel(0x00000000, MDP_INTR_EN); |
| 580 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 581 | return NO_ERROR; |
| 582 | } |
| 583 | |
| 584 | int mdp_dsi_cmd_off() |
| 585 | { |
Siddhartha Agrawal | 7dc3aa9 | 2013-04-21 16:04:26 -0700 | [diff] [blame] | 586 | if(!target_cont_splash_screen()) |
| 587 | { |
| 588 | /* Ping-Pong done Tear Check Read/Write */ |
| 589 | /* Underrun(Interface 0/1/2/3) VSYNC Interrupt Enable */ |
| 590 | writel(0xFF777713, MDP_INTR_CLEAR); |
| 591 | } |
| 592 | writel(0x00000000, MDP_INTR_EN); |
| 593 | |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 594 | return NO_ERROR; |
| 595 | } |
| 596 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 597 | int mdp_dma_on(struct msm_panel_info *pinfo) |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 598 | { |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 599 | if (pinfo->use_dma_pipe) { |
| 600 | writel(0x22840, MDP_CTL_0_BASE + CTL_FLUSH); |
| 601 | writel(0x25080, MDP_CTL_1_BASE + CTL_FLUSH); |
| 602 | } else { |
| 603 | writel(0x22048, MDP_CTL_0_BASE + CTL_FLUSH); |
| 604 | writel(0x24090, MDP_CTL_1_BASE + CTL_FLUSH); |
| 605 | } |
Siddhartha Agrawal | d32ba68 | 2013-06-18 12:37:41 -0700 | [diff] [blame] | 606 | writel(0x01, MDP_CTL_0_BASE + CTL_START); |
Siddhartha Agrawal | 7e2e215 | 2013-01-23 17:06:58 -0800 | [diff] [blame] | 607 | return NO_ERROR; |
| 608 | } |
| 609 | |
| 610 | void mdp_disable(void) |
| 611 | { |
| 612 | |
| 613 | } |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 614 | |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 615 | int mdp_edp_on(struct msm_panel_info *pinfo) |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 616 | { |
Jayant Shekhar | 3ecc0f8 | 2014-03-27 13:30:41 +0530 | [diff] [blame] | 617 | if (pinfo->use_dma_pipe) |
| 618 | writel(0x22840, MDP_CTL_0_BASE + CTL_FLUSH); |
| 619 | else |
| 620 | writel(0x22048, MDP_CTL_0_BASE + CTL_FLUSH); |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 621 | writel(0x01, MDP_INTF_0_TIMING_ENGINE_EN + mdss_mdp_intf_offset()); |
| 622 | return NO_ERROR; |
| 623 | } |
| 624 | |
| 625 | int mdp_edp_off(void) |
| 626 | { |
| 627 | if (!target_cont_splash_screen()) { |
| 628 | |
| 629 | writel(0x00000000, MDP_INTF_0_TIMING_ENGINE_EN + |
| 630 | mdss_mdp_intf_offset()); |
| 631 | mdelay(60); |
| 632 | /* Ping-Pong done Tear Check Read/Write */ |
| 633 | /* Underrun(Interface 0/1/2/3) VSYNC Interrupt Enable */ |
| 634 | writel(0xFF777713, MDP_INTR_CLEAR); |
| 635 | writel(0x00000000, MDP_INTR_EN); |
| 636 | } |
| 637 | |
Kuogee Hsieh | ad69c3c | 2013-08-01 14:34:29 -0700 | [diff] [blame] | 638 | writel(0x00000000, MDP_INTR_EN); |
| 639 | |
Asaf Penso | afb8eb7 | 2013-07-07 18:17:59 +0300 | [diff] [blame] | 640 | return NO_ERROR; |
| 641 | } |