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Ajay Dudani232ce812009-12-02 00:14:11 -08001/*
2 * Copyright (c) 2008, Google Inc.
3 * All rights reserved.
4 *
Shashank Mittal37040832010-08-24 15:57:57 -07005 * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved.
6 *
Ajay Dudani232ce812009-12-02 00:14:11 -08007 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in
14 * the documentation and/or other materials provided with the
15 * distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
20 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
21 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
23 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
24 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
25 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
27 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 * SUCH DAMAGE.
29 */
30
31#include <debug.h>
32#include <stdlib.h>
33#include <reg.h>
34#include <platform/iomap.h>
35#include <dev/fbcon.h>
Chandan Uddaraju07644852010-07-14 12:07:11 -070036#include <target/display.h>
Ajay Dudani232ce812009-12-02 00:14:11 -080037
Shashank Mittal402d0972010-09-29 10:09:52 -070038#if PLATFORM_MSM7X30
Shashank Mittal37040832010-08-24 15:57:57 -070039#define MSM_MDP_BASE1 0xA3F00000
40#define LCDC_BASE 0xC0000
Shashank Mittal402d0972010-09-29 10:09:52 -070041#elif PLATFORM_MSM8X60
42#define MSM_MDP_BASE1 0x05100000
43#define LCDC_BASE 0xC0000
44#define LCDC_FB_ADDR 0x43E00000
Shashank Mittal37040832010-08-24 15:57:57 -070045#else
Ajay Dudani232ce812009-12-02 00:14:11 -080046#define MSM_MDP_BASE1 0xAA200000
Shashank Mittal37040832010-08-24 15:57:57 -070047#define LCDC_BASE 0xE0000
48#endif
Ajay Dudani232ce812009-12-02 00:14:11 -080049
50#define LCDC_PIXCLK_IN_PS 26
51#define LCDC_FB_PHYS 0x16600000
52#define LCDC_FB_BPP 16
53
Ajay Dudani232ce812009-12-02 00:14:11 -080054#define BIT(x) (1<<(x))
55#define DMA_DSTC0G_8BITS (BIT(1)|BIT(0))
56#define DMA_DSTC1B_8BITS (BIT(3)|BIT(2))
57#define DMA_DSTC2R_8BITS (BIT(5)|BIT(4))
58#define CLR_G 0x0
59#define CLR_B 0x1
60#define CLR_R 0x2
61#define MDP_GET_PACK_PATTERN(a,x,y,z,bit) (((a)<<(bit*3))|((x)<<(bit*2))|((y)<<bit)|(z))
62#define DMA_PACK_ALIGN_LSB 0
63#define DMA_PACK_PATTERN_RGB \
64 (MDP_GET_PACK_PATTERN(0,CLR_R,CLR_G,CLR_B,2)<<8)
65#define DMA_DITHER_EN BIT(24)
66#define DMA_OUT_SEL_LCDC BIT(20)
67#define DMA_IBUF_FORMAT_RGB565 BIT(25)
68
Ajay Dudani5b1d0452010-11-11 19:07:30 -080069#define MDP_RGB_SIZE ((LCDC_FB_HEIGHT<<16) + LCDC_FB_WIDTH)
70#define MDP_RGB_565_FORMAT (BIT(14) | (1<<9) | (0<<8) | (0<<6) | (1<<4) | (1<<2) | (2<<0))
71
Ajay Dudani232ce812009-12-02 00:14:11 -080072static struct fbcon_config fb_cfg = {
73 .height = LCDC_FB_HEIGHT,
74 .width = LCDC_FB_WIDTH,
75 .stride = LCDC_FB_WIDTH,
76 .format = FB_FORMAT_RGB565,
77 .bpp = LCDC_FB_BPP,
78 .update_start = NULL,
79 .update_done = NULL,
80};
81
82void lcdc_clock_init(unsigned rate);
83
84struct fbcon_config *lcdc_init(void)
85{
86 dprintf(INFO, "lcdc_init(): panel is %d x %d\n", fb_cfg.width, fb_cfg.height);
Shashank Mittal402d0972010-09-29 10:09:52 -070087#if PLATFORM_MSM8X60
88 fb_cfg.base = LCDC_FB_ADDR;
89#else
Ajay Dudani232ce812009-12-02 00:14:11 -080090 fb_cfg.base =
91 memalign(4096, fb_cfg.width * fb_cfg.height * (fb_cfg.bpp / 8));
Shashank Mittal402d0972010-09-29 10:09:52 -070092#endif
Ajay Dudani232ce812009-12-02 00:14:11 -080093
Ajay Dudani232ce812009-12-02 00:14:11 -080094 writel((unsigned) fb_cfg.base, MSM_MDP_BASE1 + 0x90008);
95
96 writel((fb_cfg.height << 16) | fb_cfg.width, MSM_MDP_BASE1 + 0x90004);
97 writel(fb_cfg.width * fb_cfg.bpp / 8, MSM_MDP_BASE1 + 0x9000c);
98 writel(0, MSM_MDP_BASE1 + 0x90010);
99
100 writel(DMA_PACK_ALIGN_LSB|DMA_PACK_PATTERN_RGB|DMA_DITHER_EN|DMA_OUT_SEL_LCDC|
101 DMA_IBUF_FORMAT_RGB565|DMA_DSTC0G_8BITS|DMA_DSTC1B_8BITS|DMA_DSTC2R_8BITS,
102 MSM_MDP_BASE1 + 0x90000);
103
104 int hsync_period = LCDC_HSYNC_PULSE_WIDTH_DCLK + LCDC_HSYNC_BACK_PORCH_DCLK + fb_cfg.width + LCDC_HSYNC_FRONT_PORCH_DCLK;
105 int vsync_period = (LCDC_VSYNC_PULSE_WIDTH_LINES + LCDC_VSYNC_BACK_PORCH_LINES + fb_cfg.height + LCDC_VSYNC_FRONT_PORCH_LINES) * hsync_period;
106 int hsync_start_x = LCDC_HSYNC_PULSE_WIDTH_DCLK + LCDC_HSYNC_BACK_PORCH_DCLK;
107 int hsync_end_x = hsync_period - LCDC_HSYNC_FRONT_PORCH_DCLK - 1;
108 int display_hctl = (hsync_end_x << 16) | hsync_start_x;
109 int display_vstart= (LCDC_VSYNC_PULSE_WIDTH_LINES + LCDC_VSYNC_BACK_PORCH_LINES) * hsync_period + LCDC_HSYNC_SKEW_DCLK;
110 int display_vend = vsync_period - (LCDC_VSYNC_FRONT_PORCH_LINES * hsync_period) + LCDC_HSYNC_SKEW_DCLK - 1;
111
Shashank Mittal37040832010-08-24 15:57:57 -0700112 writel((hsync_period << 16) | LCDC_HSYNC_PULSE_WIDTH_DCLK, MSM_MDP_BASE1 + LCDC_BASE + 0x4);
113 writel(vsync_period, MSM_MDP_BASE1 + LCDC_BASE + 0x8);
114 writel(LCDC_VSYNC_PULSE_WIDTH_LINES * hsync_period, MSM_MDP_BASE1 + LCDC_BASE + 0xc);
115 writel(display_hctl, MSM_MDP_BASE1 + LCDC_BASE + 0x10);
116 writel(display_vstart, MSM_MDP_BASE1 + LCDC_BASE + 0x14);
117 writel(display_vend, MSM_MDP_BASE1 + LCDC_BASE + 0x18);
Ajay Dudani5b1d0452010-11-11 19:07:30 -0800118
Shashank Mittal37040832010-08-24 15:57:57 -0700119#if MDP4
120 writel(0xf, MSM_MDP_BASE1 + LCDC_BASE + 0x28);
Shashank Mittal37040832010-08-24 15:57:57 -0700121 writel(0xff, MSM_MDP_BASE1 + LCDC_BASE + 0x2c);
122 writel(LCDC_HSYNC_SKEW_DCLK, MSM_MDP_BASE1 + LCDC_BASE + 0x30);
Shashank Mittal37040832010-08-24 15:57:57 -0700123 writel(0x3, MSM_MDP_BASE1 + LCDC_BASE + 0x38);
Shashank Mittal37040832010-08-24 15:57:57 -0700124 writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x1c);
125 writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x20);
126 writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x24);
Ajay Dudani5b1d0452010-11-11 19:07:30 -0800127
128 /* setting for single layer direct out mode for rgb565 source */
129 writel(0x100, MSM_MDP_BASE1 + 0x10100);
130 writel(MDP_RGB_SIZE, MSM_MDP_BASE1 + 0x40000);
131 writel(MDP_RGB_SIZE, MSM_MDP_BASE1 + 0x40008);
132 writel(fb_cfg.base, MSM_MDP_BASE1 + 0x40010);
133 writel(fb_cfg.width * fb_cfg.bpp / 8, MSM_MDP_BASE1 + 0x40040);
134 writel(0x00, MSM_MDP_BASE1 + 0x41008);
135 writel(MDP_RGB_565_FORMAT, MSM_MDP_BASE1 + 0x40050);
136 writel(0x1, MSM_MDP_BASE1 + 0x10004);
137 writel(0x1, MSM_MDP_BASE1 + 0x10014);
138
139 /* register flush and enable LCDC */
140 writel(0x11, MSM_MDP_BASE1 + 0x18000);
141 writel(0x1, MSM_MDP_BASE1 + LCDC_BASE + 0x0);
142
143#else
144 writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x28);
145 writel(0xff, MSM_MDP_BASE1 + LCDC_BASE + 0x2c);
146 writel(LCDC_HSYNC_SKEW_DCLK, MSM_MDP_BASE1 + LCDC_BASE + 0x30);
147 writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x38);
148 writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x1c);
149 writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x20);
150 writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x24);
Shashank Mittal37040832010-08-24 15:57:57 -0700151 writel(1, MSM_MDP_BASE1 + LCDC_BASE + 0x0);
Ajay Dudani5b1d0452010-11-11 19:07:30 -0800152#endif
Ajay Dudani232ce812009-12-02 00:14:11 -0800153
154 return &fb_cfg;
155}
Shashank Mittal4f99a882010-02-01 13:58:50 -0800156
Shashank Mittalc648e712010-10-06 18:37:42 -0700157void lcdc_shutdown(void)
158{
159 writel(0, MSM_MDP_BASE1 + LCDC_BASE + 0x0);
160}
161