blob: 0a2e05858aea7b1bd5d4d0cafb1720b5f1a375a0 [file] [log] [blame]
Travis Geiselbrecht1d0df692008-09-01 02:26:09 -07001/*
2 * Copyright (c) 2008 Travis Geiselbrecht
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining
5 * a copy of this software and associated documentation files
6 * (the "Software"), to deal in the Software without restriction,
7 * including without limitation the rights to use, copy, modify, merge,
8 * publish, distribute, sublicense, and/or sell copies of the Software,
9 * and to permit persons to whom the Software is furnished to do so,
10 * subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be
13 * included in all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
16 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
17 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
18 * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
19 * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
20 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
21 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23#include <stdarg.h>
24#include <reg.h>
25#include <debug.h>
26#include <printf.h>
27#include <kernel/thread.h>
28#include <platform/debug.h>
29#include <arch/ops.h>
30#include <platform/integrator.h>
31
32static void write_uart_reg(int uart, int reg, unsigned char data)
33{
34 unsigned long base;
35 int mul = 4;
36
37 switch(uart) {
38 case 0: base = INTEGRATOR_UART0_REG_BASE; break;
39 case 1: base = INTEGRATOR_UART1_REG_BASE; break;
40 default: return;
41 }
42
43 *(volatile unsigned char *)(base + reg * mul) = data;
44}
45
46static unsigned char read_uart_reg(int uart, int reg)
47{
48 unsigned long base;
49 int mul = 4;
50
51 switch(uart) {
52 case 0: base = INTEGRATOR_UART0_REG_BASE; break;
53 case 1: base = INTEGRATOR_UART1_REG_BASE; break;
54 default: return 0;
55 }
56
57 return *(volatile unsigned char *)(base + reg * mul);
58}
59
60static int uart_init(void)
61{
62#if 0
63 /* clear the tx & rx fifo and disable */
64 write_uart_reg(0, UART_FCR, 0x6);
65#endif
66
67 return 0;
68}
69
70static int uart_putc(int port, char c )
71{
72 write_uart_reg(0, PL011_UARTDR, c);
73#if 0
74 while (!(read_uart_reg(port, UART_LSR) & (1<<6))) // wait for the shift register to empty
75 ;
76 write_uart_reg(port, UART_THR, c);
77#endif
78 return 0;
79}
80
81static int uart_getc(int port, bool wait) /* returns -1 if no data available */
82{
83#if 0
84 if (wait) {
85 while (!(read_uart_reg(port, UART_LSR) & (1<<0))) // wait for data to show up in the rx fifo
86 ;
87 } else {
88 if (!(read_uart_reg(port, UART_LSR) & (1<<0)))
89 return -1;
90 }
91 return read_uart_reg(port, UART_RHR);
92#endif
93 return -1;
94}
95
Travis Geiselbrechteb946052008-09-07 22:32:49 -070096void _dputc(char c)
Travis Geiselbrecht1d0df692008-09-01 02:26:09 -070097{
98 uart_putc(0, c);
99}
100
101int dgetc(char *c)
102{
103 int result = uart_getc(0, false);
104
105 if (result < 0)
106 return -1;
107
108 *c = result;
109 return 0;
110}
111
112void debug_dump_regs(void)
113{
114 PANIC_UNIMPLEMENTED;
115}
116
Travis Geiselbrechteb946052008-09-07 22:32:49 -0700117void platform_halt(void)
Travis Geiselbrecht1d0df692008-09-01 02:26:09 -0700118{
Travis Geiselbrechteb946052008-09-07 22:32:49 -0700119 dprintf(ALWAYS, "HALT: spinning forever...\n");
Travis Geiselbrecht1d0df692008-09-01 02:26:09 -0700120 for(;;);
121}
122
123void debug_dump_memory_bytes(void *mem, int len)
124{
125 PANIC_UNIMPLEMENTED;
126}
127
128void debug_dump_memory_halfwords(void *mem, int len)
129{
130 PANIC_UNIMPLEMENTED;
131}
132
133void debug_dump_memory_words(void *mem, int len)
134{
135 PANIC_UNIMPLEMENTED;
136}
137
138void debug_set_trace_level(int trace_type, int level)
139{
140 PANIC_UNIMPLEMENTED;
141}
142
143uint32_t debug_cycle_count()
144{
145 PANIC_UNIMPLEMENTED;
146}