Subbaraman Narayanamurthy | f17b4ae | 2011-02-16 20:19:56 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2 |
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| 3 | * Redistribution and use in source and binary forms, with or without
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| 4 | * modification, are permitted provided that the following conditions are
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| 5 | * met:
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| 6 | * * Redistributions of source code must retain the above copyright
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| 7 | * notice, this list of conditions and the following disclaimer.
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| 8 | * * Redistributions in binary form must reproduce the above
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| 9 | * copyright notice, this list of conditions and the following
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| 10 | * disclaimer in the documentation and/or other materials provided
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| 11 | * with the distribution.
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| 12 | * * Neither the name of Code Aurora Forum, Inc. nor the names of its
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| 13 | * contributors may be used to endorse or promote products derived
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| 14 | * from this software without specific prior written permission.
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| 15 | *
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| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 27 | */
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| 28 |
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| 29 | #include <string.h>
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| 30 | #include <stdlib.h>
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| 31 | #include <debug.h>
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| 32 | #include <reg.h>
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| 33 | #include "mmc.h"
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Kinson Chik | f1a4351 | 2011-07-14 11:28:39 -0700 | [diff] [blame] | 34 | #include <partition_parser.h>
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 35 | #include <platform/iomap.h>
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Greg Grisco | d625055 | 2011-06-29 14:40:23 -0700 | [diff] [blame] | 36 | #include <platform/timer.h> |
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 37 |
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Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 38 | #if MMC_BOOT_ADM
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| 39 | #include "adm.h"
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| 40 | #endif
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| 41 |
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 42 | #ifndef NULL
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| 43 | #define NULL 0
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| 44 | #endif
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| 45 |
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Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 46 | #define MMC_BOOT_DATA_READ 0
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| 47 | #define MMC_BOOT_DATA_WRITE 1
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| 48 |
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| 49 |
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| 50 | static unsigned int mmc_boot_fifo_data_transfer(unsigned int* data_ptr,
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| 51 | unsigned int data_len,
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| 52 | unsigned char direction);
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| 53 |
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| 54 | static unsigned int mmc_boot_fifo_read(unsigned int* data_ptr,
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| 55 | unsigned int data_len);
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| 56 |
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| 57 | static unsigned int mmc_boot_fifo_write(unsigned int* data_ptr,
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| 58 | unsigned int data_len);
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| 59 |
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Subbaraman Narayanamurthy | c95b5b1 | 2010-08-31 13:19:48 -0700 | [diff] [blame] | 60 | #define ROUND_TO_PAGE(x,y) (((x) + (y)) & (~(y)))
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| 61 |
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 62 | /* data access time unit in ns */
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| 63 | static const unsigned int taac_unit[] =
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| 64 | { 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000 };
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| 65 | /* data access time value x 10 */
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| 66 | static const unsigned int taac_value[] =
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| 67 | { 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80 };
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| 68 |
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| 69 | /* data transfer rate in kbit/s */
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| 70 | static const unsigned int xfer_rate_unit[] =
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| 71 | { 100, 1000, 10000, 100000, 0, 0, 0, 0 };
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| 72 | /* data transfer rate value x 10*/
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| 73 | static const unsigned int xfer_rate_value[] =
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| 74 | { 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80 };
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| 75 |
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 76 |
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Subbaraman Narayanamurthy | 4b43c35 | 2010-09-24 13:20:52 -0700 | [diff] [blame] | 77 | unsigned char mmc_slot = 0;
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| 78 | unsigned int mmc_boot_mci_base = 0;
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| 79 |
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Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 80 | static unsigned char ext_csd_buf[512];
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| 81 | static unsigned char wp_status_buf[8];
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| 82 |
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 83 | int mmc_clock_enable_disable(unsigned id, unsigned enable);
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| 84 | int mmc_clock_get_rate(unsigned id);
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| 85 | int mmc_clock_set_rate(unsigned id, unsigned rate);
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 86 |
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| 87 | struct mmc_boot_host mmc_host;
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| 88 | struct mmc_boot_card mmc_card;
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Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 89 |
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Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 90 | static unsigned int mmc_wp(unsigned int addr, unsigned int size,
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| 91 | unsigned char set_clear_wp);
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| 92 | static unsigned int mmc_boot_send_ext_cmd (struct mmc_boot_card* card,
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| 93 | unsigned char* buf);
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| 94 | static unsigned int mmc_boot_read_reg(struct mmc_boot_card *card,
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| 95 | unsigned int data_len,
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| 96 | unsigned int command, unsigned int addr,
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| 97 | unsigned int *out);
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 98 |
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| 99 | unsigned int SWAP_ENDIAN(unsigned int val)
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| 100 | {
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| 101 | return ((val & 0xFF) << 24) |
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| 102 | (((val >> 8) & 0xFF) << 16) |
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| 103 | (((val >> 16) & 0xFF) << 8) |
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| 104 | (val >> 24);
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| 105 | }
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| 106 |
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 107 |
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| 108 | /* Sets a timeout for read operation.
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| 109 | */
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| 110 | static unsigned int mmc_boot_set_read_timeout( struct mmc_boot_host* host,
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| 111 | struct mmc_boot_card* card )
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| 112 | {
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| 113 | unsigned int timeout_ns = 0;
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| 114 |
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| 115 | if( ( host == NULL ) || ( card == NULL ) )
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| 116 | {
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| 117 | return MMC_BOOT_E_INVAL;
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| 118 | }
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| 119 |
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Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 120 | if( (card->type == MMC_BOOT_TYPE_MMCHC) || (card->type == MMC_BOOT_TYPE_SDHC) )
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 121 | {
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| 122 | card->rd_timeout_ns = 100000000;
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| 123 | }
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Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 124 | else if( (card->type == MMC_BOOT_TYPE_STD_SD) || (card->type == MMC_BOOT_TYPE_STD_MMC) )
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 125 | {
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| 126 | timeout_ns = 10 * ( (card->csd.taac_ns ) +
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| 127 | ( card->csd.nsac_clk_cycle / (host->mclk_rate/1000000000)));
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Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 128 | card->rd_timeout_ns = timeout_ns;
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 129 | }
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| 130 | else
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| 131 | {
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| 132 | return MMC_BOOT_E_NOT_SUPPORTED;
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| 133 | }
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| 134 |
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Ajay Dudani | b06c05f | 2011-05-12 14:46:10 -0700 | [diff] [blame] | 135 | dprintf(SPEW, " Read timeout set: %d ns\n", card->rd_timeout_ns );
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 136 |
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| 137 | return MMC_BOOT_E_SUCCESS;
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| 138 | }
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| 139 |
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| 140 | /* Sets a timeout for write operation.
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| 141 | */
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| 142 | static unsigned int mmc_boot_set_write_timeout( struct mmc_boot_host* host,
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| 143 | struct mmc_boot_card* card )
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| 144 | {
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| 145 | unsigned int timeout_ns = 0;
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| 146 |
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| 147 | if( ( host == NULL ) || ( card == NULL ) )
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| 148 | {
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| 149 | return MMC_BOOT_E_INVAL;
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| 150 | }
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| 151 |
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Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 152 | if( (card->type == MMC_BOOT_TYPE_MMCHC) || (card->type == MMC_BOOT_TYPE_SDHC) )
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 153 | {
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| 154 | card->wr_timeout_ns = 100000000;
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| 155 | }
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Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 156 | else if( card->type == MMC_BOOT_TYPE_STD_SD || (card->type == MMC_BOOT_TYPE_STD_MMC) )
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 157 | {
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| 158 | timeout_ns = 10 * ( ( card->csd.taac_ns ) +
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| 159 | ( card->csd.nsac_clk_cycle / ( host->mclk_rate/1000000000 ) ) );
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| 160 | timeout_ns = timeout_ns << card->csd.r2w_factor;
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Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 161 | card->wr_timeout_ns = timeout_ns;
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 162 | }
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| 163 | else
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| 164 | {
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| 165 | return MMC_BOOT_E_NOT_SUPPORTED;
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| 166 | }
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| 167 |
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Ajay Dudani | b06c05f | 2011-05-12 14:46:10 -0700 | [diff] [blame] | 168 | dprintf(SPEW, " Write timeout set: %d ns\n", card->wr_timeout_ns );
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 169 |
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| 170 | return MMC_BOOT_E_SUCCESS;
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| 171 | }
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| 172 |
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| 173 |
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| 174 | /*
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| 175 | * Decodes CSD response received from the card. Note that we have defined only
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| 176 | * few of the CSD elements in csd structure. We'll only decode those values.
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| 177 | */
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| 178 | static unsigned int mmc_boot_decode_and_save_csd( struct mmc_boot_card* card,
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| 179 | unsigned int* raw_csd )
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| 180 | {
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| 181 | unsigned int mmc_sizeof = 0;
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| 182 | unsigned int mmc_unit = 0;
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| 183 | unsigned int mmc_value = 0;
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| 184 | unsigned int mmc_temp = 0;
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| 185 |
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| 186 | struct mmc_boot_csd mmc_csd;
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| 187 |
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| 188 | if( ( card == NULL ) || ( raw_csd == NULL ) )
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| 189 | {
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| 190 | return MMC_BOOT_E_INVAL;
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| 191 | }
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| 192 |
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 193 | mmc_sizeof = sizeof(unsigned int) * 8;
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| 194 |
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| 195 | mmc_csd.cmmc_structure = UNPACK_BITS( raw_csd, 126, 2, mmc_sizeof );
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| 196 |
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Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 197 | if( (card->type == MMC_BOOT_TYPE_SDHC) || (card->type == MMC_BOOT_TYPE_STD_SD))
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 198 | {
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Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 199 | /* Parse CSD according to SD card spec. */
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| 200 |
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| 201 | /* CSD register is little bit differnet for CSD version 2.0 High Capacity
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| 202 | * and CSD version 1.0/2.0 Standard memory cards. In Version 2.0 some of
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| 203 | * the fields have fixed values and it's not necessary for host to refer
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| 204 | * these fields in CSD sent by card */
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| 205 |
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| 206 | if( mmc_csd.cmmc_structure == 1)
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| 207 | {
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| 208 | /* CSD Version 2.0 */
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| 209 | mmc_csd.card_cmd_class = UNPACK_BITS( raw_csd, 84, 12, mmc_sizeof );
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| 210 | mmc_csd.write_blk_len = 512; /* Fixed value is 9 = 2^9 = 512 */
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| 211 | mmc_csd.read_blk_len = 512; /* Fixed value is 9 = 512 */
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| 212 | mmc_csd.r2w_factor = 0x2; /* Fixed value: 010b */
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| 213 | mmc_csd.c_size_mult = 0; /* not there in version 2.0 */
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| 214 | mmc_csd.c_size = UNPACK_BITS( raw_csd, 48, 22, mmc_sizeof );
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| 215 | mmc_csd.nsac_clk_cycle = UNPACK_BITS( raw_csd, 104, 8, mmc_sizeof) * 100;
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| 216 |
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| 217 | //TODO: Investigate the nsac and taac. Spec suggests not using this for timeouts.
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| 218 |
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| 219 | mmc_unit = UNPACK_BITS( raw_csd, 112, 3, mmc_sizeof );
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| 220 | mmc_value = UNPACK_BITS( raw_csd, 115, 4, mmc_sizeof );
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| 221 | mmc_csd.taac_ns = ( taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
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| 222 |
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| 223 | mmc_csd.erase_blk_len = 1;
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| 224 | mmc_csd.read_blk_misalign = 0;
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| 225 | mmc_csd.write_blk_misalign = 0;
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| 226 | mmc_csd.read_blk_partial = 0;
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| 227 | mmc_csd.write_blk_partial = 0;
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| 228 |
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| 229 | mmc_unit = UNPACK_BITS( raw_csd, 96, 3, mmc_sizeof );
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| 230 | mmc_value = UNPACK_BITS( raw_csd, 99, 4, mmc_sizeof );
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| 231 | mmc_csd.tran_speed = ( xfer_rate_value[mmc_value] * xfer_rate_unit[mmc_unit]) / 10;
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| 232 |
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| 233 | mmc_csd.wp_grp_size = 0x0;
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| 234 | mmc_csd.wp_grp_enable = 0x0;
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| 235 | mmc_csd.perm_wp = UNPACK_BITS( raw_csd, 13, 1, mmc_sizeof );
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| 236 | mmc_csd.temp_wp = UNPACK_BITS( raw_csd, 12, 1, mmc_sizeof );
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| 237 |
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| 238 | /* Calculate the card capcity */
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| 239 | card->capacity = ( 1 + mmc_csd.c_size ) * 512 * 1024;
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| 240 | }
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| 241 | else
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| 242 | {
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| 243 | /* CSD Version 1.0 */
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| 244 | mmc_csd.card_cmd_class = UNPACK_BITS( raw_csd, 84, 12, mmc_sizeof );
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| 245 |
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| 246 | mmc_temp = UNPACK_BITS( raw_csd, 22, 4, mmc_sizeof );
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| 247 | mmc_csd.write_blk_len = ( mmc_temp > 8 && mmc_temp < 12 )? ( 1 << mmc_temp ) : 512;
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| 248 |
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| 249 | mmc_temp = UNPACK_BITS( raw_csd, 80, 4, mmc_sizeof );
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| 250 | mmc_csd.read_blk_len = ( mmc_temp > 8 && mmc_temp < 12 )? ( 1 << mmc_temp ) : 512;
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| 251 |
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| 252 | mmc_unit = UNPACK_BITS( raw_csd, 112, 3, mmc_sizeof );
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| 253 | mmc_value = UNPACK_BITS( raw_csd, 115, 4, mmc_sizeof );
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| 254 | mmc_csd.taac_ns = ( taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
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| 255 |
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| 256 | mmc_unit = UNPACK_BITS( raw_csd, 96, 3, mmc_sizeof );
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| 257 | mmc_value = UNPACK_BITS( raw_csd, 99, 4, mmc_sizeof );
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| 258 | mmc_csd.tran_speed = ( xfer_rate_value[mmc_value] * xfer_rate_unit[mmc_unit]) / 10;
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| 259 |
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| 260 | mmc_csd.nsac_clk_cycle = UNPACK_BITS( raw_csd, 104, 8, mmc_sizeof ) * 100;
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| 261 |
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| 262 | mmc_csd.r2w_factor = UNPACK_BITS( raw_csd, 26, 3, mmc_sizeof );
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| 263 | mmc_csd.sector_size = UNPACK_BITS( raw_csd, 39, 7, mmc_sizeof ) + 1;
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| 264 |
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| 265 | mmc_csd.erase_blk_len = UNPACK_BITS( raw_csd, 46, 1, mmc_sizeof );
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| 266 | mmc_csd.read_blk_misalign = UNPACK_BITS( raw_csd, 77, 1, mmc_sizeof );
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| 267 | mmc_csd.write_blk_misalign = UNPACK_BITS( raw_csd, 78, 1, mmc_sizeof );
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| 268 | mmc_csd.read_blk_partial = UNPACK_BITS( raw_csd, 79, 1, mmc_sizeof );
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| 269 | mmc_csd.write_blk_partial = UNPACK_BITS( raw_csd, 21, 1, mmc_sizeof );
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| 270 |
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| 271 | mmc_csd.c_size_mult = UNPACK_BITS( raw_csd, 47, 3, mmc_sizeof );
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| 272 | mmc_csd.c_size = UNPACK_BITS( raw_csd, 62, 12, mmc_sizeof );
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| 273 | mmc_csd.wp_grp_size = UNPACK_BITS( raw_csd, 32, 7, mmc_sizeof );
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| 274 | mmc_csd.wp_grp_enable = UNPACK_BITS( raw_csd, 31, 1, mmc_sizeof );
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| 275 | mmc_csd.perm_wp = UNPACK_BITS( raw_csd, 13, 1, mmc_sizeof );
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| 276 | mmc_csd.temp_wp = UNPACK_BITS( raw_csd, 12, 1, mmc_sizeof );
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| 277 |
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| 278 | /* Calculate the card capacity */
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| 279 | mmc_temp = ( 1 << ( mmc_csd.c_size_mult + 2 ) ) * ( mmc_csd.c_size + 1 );
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| 280 | card->capacity = mmc_temp * mmc_csd.read_blk_len;
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| 281 | }
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| 282 | }
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| 283 | else
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| 284 | {
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| 285 | /* Parse CSD according to MMC card spec. */
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| 286 | mmc_csd.spec_vers = UNPACK_BITS( raw_csd, 122, 4, mmc_sizeof );
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 287 | mmc_csd.card_cmd_class = UNPACK_BITS( raw_csd, 84, 12, mmc_sizeof );
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Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 288 | mmc_csd.write_blk_len = 1 << UNPACK_BITS( raw_csd, 22, 4, mmc_sizeof );
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| 289 | mmc_csd.read_blk_len = 1 << UNPACK_BITS( raw_csd, 80, 4, mmc_sizeof );
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| 290 | mmc_csd.r2w_factor = UNPACK_BITS( raw_csd, 26, 3, mmc_sizeof );
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| 291 | mmc_csd.c_size_mult = UNPACK_BITS( raw_csd, 47, 3, mmc_sizeof );
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| 292 | mmc_csd.c_size = UNPACK_BITS( raw_csd, 62, 12, mmc_sizeof );
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 293 | mmc_csd.nsac_clk_cycle = UNPACK_BITS( raw_csd, 104, 8, mmc_sizeof) * 100;
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| 294 |
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| 295 | mmc_unit = UNPACK_BITS( raw_csd, 112, 3, mmc_sizeof );
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| 296 | mmc_value = UNPACK_BITS( raw_csd, 115, 4, mmc_sizeof );
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| 297 | mmc_csd.taac_ns = ( taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
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| 298 |
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Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 299 | mmc_csd.read_blk_misalign = UNPACK_BITS( raw_csd, 77, 1, mmc_sizeof );
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 300 | mmc_csd.write_blk_misalign = UNPACK_BITS( raw_csd, 78, 1, mmc_sizeof );
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Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 301 | mmc_csd.read_blk_partial = UNPACK_BITS( raw_csd, 79, 1, mmc_sizeof );
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| 302 | mmc_csd.write_blk_partial = UNPACK_BITS( raw_csd, 21, 1, mmc_sizeof );
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| 303 | mmc_csd.tran_speed = 0x00; /* Ignore -- no use of this value. */
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Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 304 |
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Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 305 | mmc_csd.erase_grp_size = UNPACK_BITS( raw_csd, 42, 5, mmc_sizeof );
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| 306 | mmc_csd.erase_grp_mult = UNPACK_BITS( raw_csd, 37, 5, mmc_sizeof );
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| 307 | mmc_csd.wp_grp_size = UNPACK_BITS( raw_csd, 32, 5, mmc_sizeof );
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| 308 | mmc_csd.wp_grp_enable = UNPACK_BITS( raw_csd, 31, 1, mmc_sizeof );
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| 309 | mmc_csd.perm_wp = UNPACK_BITS( raw_csd, 13, 1, mmc_sizeof );
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| 310 | mmc_csd.temp_wp = UNPACK_BITS( raw_csd, 12, 1, mmc_sizeof );
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| 311 |
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| 312 | /* Calculate the card capcity */
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| 313 | if(mmc_csd.c_size != 0xFFF)
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| 314 | {
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| 315 | /* For cards less than or equal to 2GB */
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| 316 | mmc_temp = ( 1 << ( mmc_csd.c_size_mult + 2 ) ) * ( mmc_csd.c_size + 1 );
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| 317 | card->capacity = mmc_temp * mmc_csd.read_blk_len;
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| 318 | }
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| 319 | else
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| 320 | {
|
| 321 | /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
|
| 322 | * is used to calculate the size.
|
| 323 | */
|
| 324 | unsigned long long sec_count;
|
| 325 |
|
| 326 | sec_count = (ext_csd_buf[215] << 24) |
|
| 327 | (ext_csd_buf[214] << 16) |
|
| 328 | (ext_csd_buf[213] << 8) |
|
| 329 | ext_csd_buf[212];
|
| 330 |
|
| 331 | card->capacity = sec_count * 512;
|
| 332 | }
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 333 | }
|
| 334 |
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 335 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 336 | /* save the information in card structure */
|
| 337 | memcpy( (struct mmc_boot_csd *)&card->csd, (struct mmc_boot_csd *)&mmc_csd,
|
| 338 | sizeof(struct mmc_boot_csd) );
|
| 339 |
|
Ajay Dudani | b06c05f | 2011-05-12 14:46:10 -0700 | [diff] [blame] | 340 | dprintf(SPEW, "Decoded CSD fields:\n" );
|
| 341 | dprintf(SPEW, "cmmc_structure: %d\n", mmc_csd.cmmc_structure );
|
| 342 | dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class );
|
| 343 | dprintf(SPEW, "write_blk_len: %d\n", mmc_csd.write_blk_len );
|
| 344 | dprintf(SPEW, "read_blk_len: %d\n", mmc_csd.read_blk_len );
|
| 345 | dprintf(SPEW, "r2w_factor: %d\n", mmc_csd.r2w_factor );
|
| 346 | dprintf(SPEW, "sector_size: %d\n", mmc_csd.sector_size );
|
| 347 | dprintf(SPEW, "c_size_mult:%d\n", mmc_csd.c_size_mult );
|
| 348 | dprintf(SPEW, "c_size: %d\n", mmc_csd.c_size );
|
| 349 | dprintf(SPEW, "nsac_clk_cycle: %d\n", mmc_csd.nsac_clk_cycle );
|
| 350 | dprintf(SPEW, "taac_ns: %d\n", mmc_csd.taac_ns );
|
| 351 | dprintf(SPEW, "tran_speed: %d kbps\n", mmc_csd.tran_speed );
|
| 352 | dprintf(SPEW, "erase_blk_len: %d\n", mmc_csd.erase_blk_len );
|
| 353 | dprintf(SPEW, "read_blk_misalign: %d\n", mmc_csd.read_blk_misalign );
|
| 354 | dprintf(SPEW, "write_blk_misalign: %d\n", mmc_csd.write_blk_misalign );
|
| 355 | dprintf(SPEW, "read_blk_partial: %d\n", mmc_csd.read_blk_partial );
|
| 356 | dprintf(SPEW, "write_blk_partial: %d\n", mmc_csd.write_blk_partial );
|
| 357 | dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity );
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 358 |
|
| 359 | return MMC_BOOT_E_SUCCESS;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 360 | }
|
| 361 |
|
| 362 | /*
|
| 363 | * Decode CID sent by the card.
|
| 364 | */
|
| 365 | static unsigned int mmc_boot_decode_and_save_cid( struct mmc_boot_card* card,
|
| 366 | unsigned int* raw_cid )
|
| 367 | {
|
| 368 | struct mmc_boot_cid mmc_cid;
|
| 369 | unsigned int mmc_sizeof = 0;
|
| 370 | int i = 0;
|
| 371 |
|
| 372 | if( ( card == NULL ) || ( raw_cid == NULL ) )
|
| 373 | {
|
| 374 | return MMC_BOOT_E_INVAL;
|
| 375 | }
|
| 376 |
|
| 377 | mmc_sizeof = sizeof( unsigned int ) * 8;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 378 |
|
Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 379 | if( (card->type == MMC_BOOT_TYPE_SDHC) || (card->type == MMC_BOOT_TYPE_STD_SD))
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 380 | {
|
Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 381 | mmc_cid.mid = UNPACK_BITS( raw_cid, 120, 8, mmc_sizeof );
|
| 382 | mmc_cid.oid = UNPACK_BITS( raw_cid, 104, 16, mmc_sizeof );
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 383 |
|
Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 384 | for( i = 0; i < 5; i++ )
|
| 385 | {
|
| 386 | mmc_cid.pnm[i] = (unsigned char) UNPACK_BITS(raw_cid, \
|
| 387 | (104 - 8 * (i+1)), 8, mmc_sizeof );
|
| 388 | }
|
| 389 | mmc_cid.pnm[5] = 0;
|
| 390 | mmc_cid.pnm[6] = 0;
|
| 391 |
|
| 392 | mmc_cid.prv = UNPACK_BITS( raw_cid, 56, 8, mmc_sizeof );
|
| 393 | mmc_cid.psn = UNPACK_BITS( raw_cid, 24, 32, mmc_sizeof );
|
| 394 | mmc_cid.month = UNPACK_BITS( raw_cid, 8, 4, mmc_sizeof );
|
| 395 | mmc_cid.year = UNPACK_BITS( raw_cid, 12, 8, mmc_sizeof );
|
| 396 | mmc_cid.year += 2000;
|
| 397 | }
|
| 398 | else
|
| 399 | {
|
| 400 | mmc_cid.mid = UNPACK_BITS( raw_cid, 120, 8, mmc_sizeof );
|
| 401 | mmc_cid.oid = UNPACK_BITS( raw_cid, 104, 16, mmc_sizeof );
|
| 402 |
|
| 403 | for( i = 0; i < 6; i++ )
|
| 404 | {
|
| 405 | mmc_cid.pnm[i] = (unsigned char) UNPACK_BITS(raw_cid, \
|
| 406 | (104 - 8 * (i+1)), 8, mmc_sizeof );
|
| 407 | }
|
| 408 | mmc_cid.pnm[6] = 0;
|
| 409 |
|
| 410 | mmc_cid.prv = UNPACK_BITS( raw_cid, 48, 8, mmc_sizeof );
|
| 411 | mmc_cid.psn = UNPACK_BITS( raw_cid, 16, 32, mmc_sizeof );
|
| 412 | mmc_cid.month = UNPACK_BITS( raw_cid, 8, 4, mmc_sizeof );
|
| 413 | mmc_cid.year = UNPACK_BITS( raw_cid, 12, 4, mmc_sizeof );
|
| 414 | mmc_cid.year += 1997;
|
| 415 | }
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 416 |
|
| 417 | /* save it in card database */
|
| 418 | memcpy( ( struct mmc_boot_cid * )&card->cid, \
|
| 419 | ( struct mmc_boot_cid * )&mmc_cid, \
|
| 420 | sizeof( struct mmc_boot_cid ) );
|
| 421 |
|
Ajay Dudani | b06c05f | 2011-05-12 14:46:10 -0700 | [diff] [blame] | 422 | dprintf(SPEW, "Decoded CID fields:\n" );
|
| 423 | dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid );
|
| 424 | dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid );
|
| 425 | dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm );
|
| 426 | dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4), (mmc_cid.prv & 0xF) );
|
| 427 | dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn );
|
| 428 | dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year );
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 429 |
|
| 430 | return MMC_BOOT_E_SUCCESS;
|
| 431 | }
|
| 432 |
|
| 433 | /*
|
| 434 | * Sends specified command to a card and waits for a response.
|
| 435 | */
|
| 436 | static unsigned int mmc_boot_send_command( struct mmc_boot_command* cmd )
|
| 437 | {
|
| 438 | unsigned int mmc_cmd = 0;
|
| 439 | unsigned int mmc_status = 0;
|
| 440 | unsigned int mmc_resp = 0;
|
| 441 | unsigned int mmc_return = MMC_BOOT_E_SUCCESS;
|
| 442 | unsigned int cmd_index = 0;
|
| 443 | int i = 0;
|
| 444 |
|
| 445 | /* basic check */
|
| 446 | if( cmd == NULL )
|
| 447 | {
|
| 448 | return MMC_BOOT_E_INVAL;
|
| 449 | }
|
| 450 |
|
| 451 | /* 1. Write command argument to MMC_BOOT_MCI_ARGUMENT register */
|
| 452 | writel( cmd->argument, MMC_BOOT_MCI_ARGUMENT );
|
| 453 |
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 454 | /* Writes to MCI port are not effective for 3 ticks of PCLK.
|
| 455 | * The min pclk is 144KHz which gives 6.94 us/tick.
|
| 456 | * Thus 21us == 3 ticks.
|
| 457 | */
|
| 458 | udelay(21);
|
| 459 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 460 | /* 2. Set appropriate fields and write MMC_BOOT_MCI_CMD */
|
| 461 | /* 2a. Write command index in CMD_INDEX field */
|
| 462 | cmd_index = cmd->cmd_index;
|
| 463 | mmc_cmd |= cmd->cmd_index;
|
| 464 | /* 2b. Set RESPONSE bit to 1 for all cmds except CMD0 */
|
| 465 | if( cmd_index != CMD0_GO_IDLE_STATE )
|
| 466 | {
|
| 467 | mmc_cmd |= MMC_BOOT_MCI_CMD_RESPONSE;
|
| 468 | }
|
| 469 |
|
| 470 | /* 2c. Set LONGRESP bit to 1 for CMD2, CMD9 and CMD10 */
|
| 471 | if( IS_RESP_136_BITS(cmd->resp_type) )
|
| 472 | {
|
| 473 | mmc_cmd |= MMC_BOOT_MCI_CMD_LONGRSP;
|
| 474 | }
|
| 475 |
|
| 476 | /* 2d. Set INTERRUPT bit to 1 to disable command timeout */
|
| 477 |
|
| 478 | /* 2e. Set PENDING bit to 1 for CMD12 in the beginning of stream
|
| 479 | mode data transfer*/
|
| 480 | if( cmd->xfer_mode == MMC_BOOT_XFER_MODE_STREAM )
|
| 481 | {
|
| 482 | mmc_cmd |= MMC_BOOT_MCI_CMD_PENDING;
|
| 483 | }
|
| 484 |
|
| 485 | /* 2f. Set ENABLE bit to 1 */
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 486 | mmc_cmd |= MMC_BOOT_MCI_CMD_ENABLE;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 487 |
|
| 488 | /* 2g. Set PROG_ENA bit to 1 for CMD12, CMD13 issued at the end of
|
| 489 | write data transfer */
|
| 490 | if( ( cmd_index == CMD12_STOP_TRANSMISSION ||
|
| 491 | cmd_index == CMD13_SEND_STATUS ) && cmd->prg_enabled )
|
| 492 | {
|
| 493 | mmc_cmd |= MMC_BOOT_MCI_CMD_PROG_ENA;
|
| 494 | }
|
| 495 |
|
| 496 | /* 2h. Set MCIABORT bit to 1 for CMD12 when working with SDIO card */
|
| 497 | /* 2i. Set CCS_ENABLE bit to 1 for CMD61 when Command Completion Signal
|
| 498 | of CE-ATA device is enabled */
|
| 499 |
|
| 500 | /* 2j. clear all static status bits */
|
| 501 | writel( MMC_BOOT_MCI_STATIC_STATUS, MMC_BOOT_MCI_CLEAR );
|
| 502 |
|
| 503 | /* 2k. Write to MMC_BOOT_MCI_CMD register */
|
| 504 | writel( mmc_cmd, MMC_BOOT_MCI_CMD );
|
| 505 |
|
Ajay Dudani | b06c05f | 2011-05-12 14:46:10 -0700 | [diff] [blame] | 506 | dprintf(SPEW, "Command sent: CMD%d MCI_CMD_REG:%x MCI_ARG:%x\n",
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 507 | cmd_index, mmc_cmd, cmd->argument );
|
| 508 |
|
| 509 | /* 3. Wait for interrupt or poll on the following bits of MCI_STATUS
|
| 510 | register */
|
| 511 | do{
|
| 512 | /* 3a. Read MCI_STATUS register */
|
| 513 | while(readl( MMC_BOOT_MCI_STATUS ) \
|
| 514 | & MMC_BOOT_MCI_STAT_CMD_ACTIVE);
|
| 515 |
|
| 516 | mmc_status = readl( MMC_BOOT_MCI_STATUS );
|
| 517 |
|
| 518 | /* 3b. CMD_SENT bit supposed to be set to 1 only after CMD0 is sent -
|
| 519 | no response required. */
|
| 520 | if( ( cmd->resp_type == MMC_BOOT_RESP_NONE ) &&
|
| 521 | (mmc_status & MMC_BOOT_MCI_STAT_CMD_SENT ) )
|
| 522 | {
|
| 523 | break;
|
| 524 | }
|
| 525 |
|
| 526 | /* 3c. If CMD_TIMEOUT bit is set then no response was received */
|
| 527 | else if( mmc_status & MMC_BOOT_MCI_STAT_CMD_TIMEOUT )
|
| 528 | {
|
| 529 | mmc_return = MMC_BOOT_E_TIMEOUT;
|
| 530 | break;
|
| 531 | }
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 532 | /* 3d. If CMD_RESPONSE_END bit is set to 1 then command's response was
|
| 533 | received and CRC check passed
|
| 534 | Spcial case for ACMD41: it seems to always fail CRC even if
|
| 535 | the response is valid
|
| 536 | */
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 537 | else if (( mmc_status & MMC_BOOT_MCI_STAT_CMD_RESP_END ) || (cmd_index == CMD1_SEND_OP_COND)
|
| 538 | || (cmd_index == CMD8_SEND_IF_COND))
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 539 | {
|
| 540 | /* 3i. Read MCI_RESP_CMD register to verify that response index is
|
| 541 | equal to command index */
|
| 542 | mmc_resp = readl( MMC_BOOT_MCI_RESP_CMD ) & 0x3F;
|
| 543 |
|
| 544 | /* However, long response does not contain the command index field.
|
| 545 | * In that case, response index field must be set to 111111b (0x3F) */
|
| 546 | if( ( mmc_resp == cmd_index ) ||
|
| 547 | ( cmd->resp_type == MMC_BOOT_RESP_R2 ||
|
| 548 | cmd->resp_type == MMC_BOOT_RESP_R3 ||
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 549 | cmd->resp_type == MMC_BOOT_RESP_R6 ||
|
| 550 | cmd->resp_type == MMC_BOOT_RESP_R7 ) )
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 551 | {
|
| 552 | /* 3j. If resp index is equal to cmd index, read command resp
|
| 553 | from MCI_RESPn registers
|
| 554 | - MCI_RESP0/1/2/3 for CMD2/9/10
|
| 555 | - MCI_RESP0 for all other registers */
|
| 556 | if( IS_RESP_136_BITS( cmd->resp_type ) )
|
| 557 | {
|
| 558 | for( i = 0; i < 4; i++ )
|
| 559 | {
|
| 560 | cmd->resp[3-i] = readl( MMC_BOOT_MCI_RESP_0 + ( i * 4 ) );
|
| 561 |
|
| 562 | }
|
| 563 | }
|
| 564 | else
|
| 565 | {
|
| 566 | cmd->resp[0] = readl( MMC_BOOT_MCI_RESP_0 );
|
| 567 | }
|
| 568 | }
|
| 569 | else
|
| 570 | {
|
| 571 | /* command index mis-match */
|
| 572 | mmc_return = MMC_BOOT_E_CMD_INDX_MISMATCH;
|
| 573 | }
|
| 574 |
|
Ajay Dudani | b06c05f | 2011-05-12 14:46:10 -0700 | [diff] [blame] | 575 | dprintf(SPEW, "Command response received: %X\n", cmd->resp[0] );
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 576 | break;
|
| 577 | }
|
| 578 |
|
| 579 | /* 3e. If CMD_CRC_FAIL bit is set to 1 then cmd's response was recvd,
|
| 580 | but CRC check failed. */
|
| 581 | else if( ( mmc_status & MMC_BOOT_MCI_STAT_CMD_CRC_FAIL ) )
|
| 582 | {
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 583 | if(cmd_index == ACMD41_SEND_OP_COND)
|
| 584 | {
|
| 585 | cmd->resp[0] = readl( MMC_BOOT_MCI_RESP_0);
|
| 586 | }
|
| 587 | else
|
| 588 | mmc_return = MMC_BOOT_E_CRC_FAIL;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 589 | break;
|
| 590 | }
|
| 591 |
|
| 592 | }while(1);
|
| 593 |
|
| 594 | return mmc_return;
|
| 595 | }
|
| 596 |
|
| 597 | /*
|
| 598 | * Reset all the cards to idle condition (CMD 0)
|
| 599 | */
|
| 600 | static unsigned int mmc_boot_reset_cards( void )
|
| 601 | {
|
| 602 | struct mmc_boot_command cmd;
|
| 603 |
|
| 604 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 605 | sizeof(struct mmc_boot_command) );
|
| 606 |
|
| 607 | cmd.cmd_index = CMD0_GO_IDLE_STATE;
|
| 608 | cmd.argument = 0; // stuff bits - ignored
|
| 609 | cmd.cmd_type = MMC_BOOT_CMD_BCAST;
|
| 610 | cmd.resp_type = MMC_BOOT_RESP_NONE;
|
| 611 |
|
| 612 | /* send command */
|
| 613 | return mmc_boot_send_command( &cmd );
|
| 614 | }
|
| 615 |
|
| 616 | /*
|
| 617 | * Send CMD1 to know whether the card supports host VDD profile or not.
|
| 618 | */
|
| 619 | static unsigned int mmc_boot_send_op_cond( struct mmc_boot_host* host,
|
| 620 | struct mmc_boot_card* card )
|
| 621 | {
|
| 622 | struct mmc_boot_command cmd;
|
| 623 | unsigned int mmc_resp = 0;
|
| 624 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 625 |
|
| 626 | /* basic check */
|
| 627 | if( ( host == NULL ) || ( card == NULL ) )
|
| 628 | {
|
| 629 | return MMC_BOOT_E_INVAL;
|
| 630 | }
|
| 631 |
|
| 632 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 633 | sizeof(struct mmc_boot_command) );
|
| 634 |
|
| 635 | /* CMD1 format:
|
| 636 | * [31] Busy bit
|
| 637 | * [30:29] Access mode
|
| 638 | * [28:24] reserved
|
| 639 | * [23:15] 2.7-3.6
|
| 640 | * [14:8] 2.0-2.6
|
| 641 | * [7] 1.7-1.95
|
| 642 | * [6:0] reserved
|
| 643 | */
|
| 644 |
|
| 645 | cmd.cmd_index = CMD1_SEND_OP_COND;
|
| 646 | cmd.argument = host->ocr;
|
| 647 | cmd.cmd_type = MMC_BOOT_CMD_BCAST_W_RESP;
|
| 648 | cmd.resp_type = MMC_BOOT_RESP_R3;
|
| 649 |
|
| 650 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 651 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 652 | {
|
| 653 | return mmc_ret;
|
| 654 | }
|
| 655 |
|
| 656 | /* Now it's time to examine response */
|
| 657 | mmc_resp = cmd.resp[0];
|
| 658 |
|
| 659 | /* Response contains card's ocr. Update card's information */
|
| 660 | card->ocr = mmc_resp;
|
| 661 |
|
| 662 | /* Check the response for busy status */
|
| 663 | if( !( mmc_resp & MMC_BOOT_OCR_BUSY ) )
|
| 664 | {
|
| 665 | return MMC_BOOT_E_CARD_BUSY;
|
| 666 | }
|
| 667 |
|
Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 668 | if(mmc_resp & MMC_BOOT_OCR_SEC_MODE)
|
| 669 | {
|
| 670 | card->type = MMC_BOOT_TYPE_MMCHC;
|
| 671 | }
|
| 672 | else
|
| 673 | {
|
| 674 | card->type = MMC_BOOT_TYPE_STD_MMC;
|
| 675 | }
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 676 | return MMC_BOOT_E_SUCCESS;
|
| 677 | }
|
| 678 |
|
| 679 | /*
|
| 680 | * Request any card to send its uniquie card identification (CID) number (CMD2).
|
| 681 | */
|
| 682 | static unsigned int mmc_boot_all_send_cid( struct mmc_boot_card* card )
|
| 683 | {
|
| 684 | struct mmc_boot_command cmd;
|
| 685 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 686 |
|
| 687 | /* basic check */
|
| 688 | if( card == NULL )
|
| 689 | {
|
| 690 | return MMC_BOOT_E_INVAL;
|
| 691 | }
|
| 692 |
|
| 693 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 694 | sizeof(struct mmc_boot_command) );
|
| 695 |
|
| 696 | /* CMD2 Format:
|
| 697 | * [31:0] stuff bits
|
| 698 | */
|
| 699 | cmd.cmd_index = CMD2_ALL_SEND_CID;
|
| 700 | cmd.argument = 0;
|
| 701 | cmd.cmd_type = MMC_BOOT_CMD_BCAST_W_RESP;
|
| 702 | cmd.resp_type = MMC_BOOT_RESP_R2;
|
| 703 |
|
| 704 | /* send command */
|
| 705 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 706 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 707 | {
|
| 708 | return mmc_ret;
|
| 709 | }
|
| 710 |
|
| 711 | /* Response contains card's 128 bits CID register */
|
| 712 | mmc_ret = mmc_boot_decode_and_save_cid( card, cmd.resp );
|
| 713 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 714 | {
|
| 715 | return mmc_ret;
|
| 716 | }
|
| 717 | return MMC_BOOT_E_SUCCESS;
|
| 718 | }
|
| 719 |
|
| 720 | /*
|
| 721 | * Ask any card to send it's relative card address (RCA).This RCA number is
|
| 722 | * shorter than CID and is used by the host to address the card in future (CMD3)
|
| 723 | */
|
| 724 | static unsigned int mmc_boot_send_relative_address( struct mmc_boot_card* card )
|
| 725 | {
|
| 726 | struct mmc_boot_command cmd;
|
| 727 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 728 |
|
| 729 | /* basic check */
|
| 730 | if( card == NULL )
|
| 731 | {
|
| 732 | return MMC_BOOT_E_INVAL;
|
| 733 | }
|
| 734 |
|
| 735 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 736 | sizeof(struct mmc_boot_command) );
|
| 737 |
|
| 738 | /* CMD3 Format:
|
| 739 | * [31:0] stuff bits
|
| 740 | */
|
Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 741 | if(card->type == MMC_BOOT_TYPE_SDHC || card->type == MMC_BOOT_TYPE_STD_SD)
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 742 | {
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 743 | cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
|
| 744 | cmd.argument = 0;
|
| 745 | cmd.cmd_type = MMC_BOOT_CMD_BCAST_W_RESP;
|
| 746 | cmd.resp_type = MMC_BOOT_RESP_R6;
|
| 747 |
|
| 748 | /* send command */
|
| 749 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 750 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 751 | {
|
| 752 | return mmc_ret;
|
| 753 | }
|
| 754 | /* For sD, card will send RCA. Store it */
|
| 755 | card->rca = (cmd.resp[0] >> 16);
|
| 756 | }
|
| 757 | else
|
| 758 | {
|
| 759 | cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
|
| 760 | cmd.argument = (MMC_RCA << 16);
|
| 761 | card->rca = (cmd.argument >> 16);
|
| 762 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 763 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 764 |
|
| 765 | /* send command */
|
| 766 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 767 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 768 | {
|
| 769 | return mmc_ret;
|
| 770 | }
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 771 | }
|
| 772 |
|
| 773 | return MMC_BOOT_E_SUCCESS;
|
| 774 | }
|
| 775 |
|
| 776 | /*
|
| 777 | * Requests card to send it's CSD register's contents. (CMD9)
|
| 778 | */
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 779 | static unsigned int mmc_boot_send_csd( struct mmc_boot_card* card,
|
| 780 | unsigned int* raw_csd )
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 781 | {
|
| 782 | struct mmc_boot_command cmd;
|
| 783 | unsigned int mmc_arg = 0;
|
| 784 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 785 |
|
| 786 | /* basic check */
|
| 787 | if( card == NULL )
|
| 788 | {
|
| 789 | return MMC_BOOT_E_INVAL;
|
| 790 | }
|
| 791 |
|
| 792 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 793 | sizeof(struct mmc_boot_command) );
|
| 794 |
|
| 795 | /* CMD9 Format:
|
| 796 | * [31:16] RCA
|
| 797 | * [15:0] stuff bits
|
| 798 | */
|
| 799 | mmc_arg |= card->rca << 16;
|
| 800 |
|
| 801 | cmd.cmd_index = CMD9_SEND_CSD;
|
| 802 | cmd.argument = mmc_arg;
|
| 803 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 804 | cmd.resp_type = MMC_BOOT_RESP_R2;
|
| 805 |
|
| 806 | /* send command */
|
| 807 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 808 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 809 | {
|
| 810 | return mmc_ret;
|
| 811 | }
|
| 812 |
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 813 | /* response contains the card csd */
|
| 814 | memcpy(raw_csd, cmd.resp, sizeof(cmd.resp));
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 815 |
|
| 816 | return MMC_BOOT_E_SUCCESS;
|
| 817 | }
|
| 818 |
|
| 819 | /*
|
| 820 | * Selects a card by sending CMD7 to the card with its RCA.
|
| 821 | * If RCA field is set as 0 ( or any other address ),
|
| 822 | * the card will be de-selected. (CMD7)
|
| 823 | */
|
| 824 | static unsigned int mmc_boot_select_card( struct mmc_boot_card* card,
|
| 825 | unsigned int rca )
|
| 826 | {
|
| 827 | struct mmc_boot_command cmd;
|
| 828 | unsigned int mmc_arg = 0;
|
| 829 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 830 |
|
| 831 | /* basic check */
|
| 832 | if( card == NULL )
|
| 833 | {
|
| 834 | return MMC_BOOT_E_INVAL;
|
| 835 | }
|
| 836 |
|
| 837 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 838 | sizeof(struct mmc_boot_command) );
|
| 839 |
|
| 840 | /* CMD7 Format:
|
| 841 | * [31:16] RCA
|
| 842 | * [15:0] stuff bits
|
| 843 | */
|
| 844 | mmc_arg |= rca << 16;
|
| 845 |
|
| 846 | cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
|
| 847 | cmd.argument = mmc_arg;
|
| 848 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 849 | /* If we are deselecting card, we do not get response */
|
| 850 | if( rca == card->rca && rca)
|
| 851 | {
|
Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 852 | if(card->type == MMC_BOOT_TYPE_SDHC || card->type == MMC_BOOT_TYPE_STD_SD)
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 853 | cmd.resp_type = MMC_BOOT_RESP_R1B;
|
| 854 | else
|
| 855 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 856 | }
|
| 857 | else
|
| 858 | {
|
| 859 | cmd.resp_type = MMC_BOOT_RESP_NONE;
|
| 860 | }
|
| 861 |
|
| 862 | /* send command */
|
| 863 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 864 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 865 | {
|
| 866 | return mmc_ret;
|
| 867 | }
|
| 868 |
|
| 869 | /* As of now no need to look into a response. If it's required
|
| 870 | * we'll explore later on */
|
| 871 |
|
| 872 | return MMC_BOOT_E_SUCCESS;
|
| 873 | }
|
| 874 |
|
| 875 | /*
|
| 876 | * Send command to set block length.
|
| 877 | */
|
| 878 | static unsigned int mmc_boot_set_block_len( struct mmc_boot_card* card,
|
| 879 | unsigned int block_len )
|
| 880 | {
|
| 881 | struct mmc_boot_command cmd;
|
| 882 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 883 |
|
| 884 | /* basic check */
|
| 885 | if( card == NULL )
|
| 886 | {
|
| 887 | return MMC_BOOT_E_INVAL;
|
| 888 | }
|
| 889 |
|
| 890 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 891 | sizeof(struct mmc_boot_command) );
|
| 892 |
|
| 893 | /* CMD16 Format:
|
| 894 | * [31:0] block length
|
| 895 | */
|
| 896 |
|
| 897 | cmd.cmd_index = CMD16_SET_BLOCKLEN;
|
| 898 | cmd.argument = block_len;
|
| 899 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 900 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 901 |
|
| 902 | /* send command */
|
| 903 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 904 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 905 | {
|
| 906 | return mmc_ret;
|
| 907 | }
|
| 908 |
|
| 909 | /* If blocklength is larger than 512 bytes,
|
| 910 | * the card sets BLOCK_LEN_ERROR bit. */
|
| 911 | if( cmd.resp[0] & MMC_BOOT_R1_BLOCK_LEN_ERR )
|
| 912 | {
|
| 913 | return MMC_BOOT_E_BLOCKLEN_ERR;
|
| 914 | }
|
| 915 | return MMC_BOOT_E_SUCCESS;
|
| 916 | }
|
| 917 |
|
| 918 | /*
|
| 919 | * Requests the card to stop transmission of data.
|
| 920 | */
|
| 921 | static unsigned int mmc_boot_send_stop_transmission( struct mmc_boot_card* card,
|
| 922 | unsigned int prg_enabled )
|
| 923 | {
|
| 924 | struct mmc_boot_command cmd;
|
| 925 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 926 |
|
| 927 | /* basic check */
|
| 928 | if( card == NULL )
|
| 929 | {
|
| 930 | return MMC_BOOT_E_INVAL;
|
| 931 | }
|
| 932 |
|
| 933 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 934 | sizeof(struct mmc_boot_command) );
|
| 935 |
|
| 936 | /* CMD12 Format:
|
| 937 | * [31:0] stuff bits
|
| 938 | */
|
| 939 |
|
| 940 | cmd.cmd_index = CMD12_STOP_TRANSMISSION;
|
| 941 | cmd.argument = 0;
|
| 942 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 943 | cmd.resp_type = MMC_BOOT_RESP_R1B;
|
| 944 | cmd.xfer_mode = MMC_BOOT_XFER_MODE_BLOCK;
|
| 945 | cmd.prg_enabled = prg_enabled;
|
| 946 |
|
| 947 | /* send command */
|
| 948 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 949 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 950 | {
|
| 951 | return mmc_ret;
|
| 952 | }
|
| 953 | return MMC_BOOT_E_SUCCESS;
|
| 954 | }
|
| 955 |
|
| 956 | /*
|
| 957 | * Get the card's current status
|
| 958 | */
|
| 959 | static unsigned int mmc_boot_get_card_status( struct mmc_boot_card* card,
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 960 | unsigned int prg_enabled, unsigned int* status )
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 961 | {
|
| 962 | struct mmc_boot_command cmd;
|
| 963 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 964 |
|
| 965 | /* basic check */
|
| 966 | if( card == NULL )
|
| 967 | {
|
| 968 | return MMC_BOOT_E_INVAL;
|
| 969 | }
|
| 970 |
|
| 971 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 972 | sizeof(struct mmc_boot_command) );
|
| 973 |
|
| 974 | /* CMD13 Format:
|
| 975 | * [31:16] RCA
|
| 976 | * [15:0] stuff bits
|
| 977 | */
|
| 978 | cmd.cmd_index = CMD13_SEND_STATUS;
|
| 979 | cmd.argument = card->rca << 16;
|
| 980 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 981 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 982 | cmd.prg_enabled = prg_enabled;
|
| 983 |
|
| 984 | /* send command */
|
| 985 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 986 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 987 | {
|
| 988 | return mmc_ret;
|
| 989 | }
|
| 990 |
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 991 | /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
|
| 992 | if(IS_ADDR_OUT_OF_RANGE(cmd.resp[0]))
|
| 993 | {
|
| 994 | return MMC_BOOT_E_FAILURE;
|
| 995 | }
|
| 996 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 997 | *status = cmd.resp[0];
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 998 | return MMC_BOOT_E_SUCCESS;
|
| 999 | }
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 1000 |
|
| 1001 | /*
|
| 1002 | * Decode type of error caused during read and write
|
| 1003 | */
|
| 1004 | static unsigned int mmc_boot_status_error(unsigned mmc_status)
|
| 1005 | {
|
| 1006 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1007 |
|
| 1008 | /* If DATA_CRC_FAIL bit is set to 1 then CRC error was detected by
|
| 1009 | card/device during the data transfer */
|
| 1010 | if( mmc_status & MMC_BOOT_MCI_STAT_DATA_CRC_FAIL )
|
| 1011 | {
|
| 1012 | mmc_ret = MMC_BOOT_E_DATA_CRC_FAIL;
|
| 1013 | }
|
| 1014 | /* If DATA_TIMEOUT bit is set to 1 then the data transfer time exceeded
|
| 1015 | the data timeout period without completing the transfer */
|
| 1016 | else if( mmc_status & MMC_BOOT_MCI_STAT_DATA_TIMEOUT )
|
| 1017 | {
|
| 1018 | mmc_ret = MMC_BOOT_E_DATA_TIMEOUT;
|
| 1019 | }
|
| 1020 | /* If RX_OVERRUN bit is set to 1 then SDCC2 tried to receive data from
|
| 1021 | the card before empty storage for new received data was available.
|
| 1022 | Verify that bit FLOW_ENA in MCI_CLK is set to 1 during the data xfer.*/
|
| 1023 | else if( mmc_status & MMC_BOOT_MCI_STAT_RX_OVRRUN )
|
| 1024 | {
|
| 1025 | /* Note: We've set FLOW_ENA bit in MCI_CLK to 1. so no need to verify
|
| 1026 | for now */
|
| 1027 | mmc_ret = MMC_BOOT_E_RX_OVRRUN;
|
| 1028 | }
|
| 1029 | /* If TX_UNDERRUN bit is set to 1 then SDCC2 tried to send data to
|
| 1030 | the card before new data for sending was available. Verify that bit
|
| 1031 | FLOW_ENA in MCI_CLK is set to 1 during the data xfer.*/
|
| 1032 | else if( mmc_status & MMC_BOOT_MCI_STAT_TX_UNDRUN )
|
| 1033 | {
|
| 1034 | /* Note: We've set FLOW_ENA bit in MCI_CLK to 1.so skipping it now*/
|
| 1035 | mmc_ret = MMC_BOOT_E_RX_OVRRUN;
|
| 1036 | }
|
| 1037 | return mmc_ret;
|
| 1038 | }
|
| 1039 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1040 | /*
|
| 1041 | * Send ext csd command.
|
| 1042 | */
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 1043 | static unsigned int mmc_boot_send_ext_cmd (struct mmc_boot_card* card, unsigned char* buf)
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1044 | {
|
| 1045 | struct mmc_boot_command cmd;
|
| 1046 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1047 | unsigned int mmc_reg = 0;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1048 | unsigned int* mmc_ptr = (unsigned int *)buf;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1049 |
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 1050 | memset(buf,0, 512);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1051 |
|
| 1052 | /* basic check */
|
| 1053 | if( card == NULL )
|
| 1054 | {
|
| 1055 | return MMC_BOOT_E_INVAL;
|
| 1056 | }
|
| 1057 |
|
| 1058 | /* set block len */
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 1059 | if( (card->type != MMC_BOOT_TYPE_MMCHC) && (card->type != MMC_BOOT_TYPE_SDHC) )
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1060 | {
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 1061 | mmc_ret = mmc_boot_set_block_len( card, 512);
|
| 1062 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1063 | {
|
| 1064 | dprintf(CRITICAL, "Error No.%d: Failure setting block length for Card (RCA:%s)\n",
|
| 1065 | mmc_ret, (char *)(card->rca) );
|
| 1066 | return mmc_ret;
|
| 1067 | }
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1068 | }
|
| 1069 |
|
| 1070 | /* Set the FLOW_ENA bit of MCI_CLK register to 1 */
|
| 1071 | mmc_reg = readl( MMC_BOOT_MCI_CLK );
|
| 1072 | mmc_reg |= MMC_BOOT_MCI_CLK_ENA_FLOW ;
|
| 1073 | writel( mmc_reg, MMC_BOOT_MCI_CLK );
|
| 1074 |
|
| 1075 | /* Write data timeout period to MCI_DATA_TIMER register. */
|
| 1076 | /* Data timeout period should be in card bus clock periods */
|
| 1077 | mmc_reg =0xFFFFFFFF;
|
| 1078 | writel( mmc_reg, MMC_BOOT_MCI_DATA_TIMER );
|
| 1079 | writel( 512, MMC_BOOT_MCI_DATA_LENGTH );
|
| 1080 |
|
| 1081 | /* Set appropriate fields and write the MCI_DATA_CTL register. */
|
| 1082 | /* Set ENABLE bit to 1 to enable the data transfer. */
|
| 1083 | mmc_reg = MMC_BOOT_MCI_DATA_ENABLE | MMC_BOOT_MCI_DATA_DIR | (512 << MMC_BOOT_MCI_BLKSIZE_POS);
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 1084 |
|
| 1085 | #if MMC_BOOT_ADM
|
| 1086 | mmc_reg |= MMC_BOOT_MCI_DATA_DM_ENABLE;
|
| 1087 | #endif
|
| 1088 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1089 | writel( mmc_reg, MMC_BOOT_MCI_DATA_CTL );
|
| 1090 |
|
| 1091 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 1092 | sizeof(struct mmc_boot_command) );
|
| 1093 | /* CMD8 */
|
| 1094 | cmd.cmd_index = CMD8_SEND_EXT_CSD;
|
| 1095 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 1096 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 1097 | cmd.xfer_mode = MMC_BOOT_XFER_MODE_BLOCK;
|
| 1098 |
|
| 1099 | /* send command */
|
| 1100 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 1101 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1102 | {
|
| 1103 | return mmc_ret;
|
| 1104 | }
|
| 1105 |
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 1106 | /* Read the transfer data from SDCC FIFO. */
|
| 1107 | mmc_ret = mmc_boot_fifo_data_transfer(mmc_ptr, 512, MMC_BOOT_DATA_READ);
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 1108 |
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 1109 | return mmc_ret;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1110 | }
|
| 1111 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1112 | /*
|
| 1113 | * Switch command
|
| 1114 | */
|
| 1115 | static unsigned int mmc_boot_switch_cmd (struct mmc_boot_card* card,
|
| 1116 | unsigned access,
|
| 1117 | unsigned index,
|
| 1118 | unsigned value)
|
| 1119 | {
|
| 1120 |
|
| 1121 | struct mmc_boot_command cmd;
|
| 1122 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1123 |
|
| 1124 | /* basic check */
|
| 1125 | if( card == NULL )
|
| 1126 | {
|
| 1127 | return MMC_BOOT_E_INVAL;
|
| 1128 | }
|
| 1129 |
|
| 1130 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 1131 | sizeof(struct mmc_boot_command) );
|
| 1132 |
|
| 1133 | /* CMD6 Format:
|
| 1134 | * [31:26] set to 0
|
| 1135 | * [25:24] access
|
| 1136 | * [23:16] index
|
| 1137 | * [15:8] value
|
| 1138 | * [7:3] set to 0
|
| 1139 | * [2:0] cmd set
|
| 1140 | */
|
| 1141 | cmd.cmd_index = CMD6_SWITCH_FUNC;
|
| 1142 | cmd.argument |= (access << 24);
|
| 1143 | cmd.argument |= (index << 16);
|
| 1144 | cmd.argument |= (value << 8);
|
| 1145 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 1146 | cmd.resp_type = MMC_BOOT_RESP_R1B;
|
| 1147 |
|
| 1148 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 1149 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1150 | {
|
| 1151 | return mmc_ret;
|
| 1152 | }
|
| 1153 |
|
| 1154 | return MMC_BOOT_E_SUCCESS;
|
| 1155 | }
|
| 1156 |
|
| 1157 | /*
|
| 1158 | * A command to set the data bus width for card. Set width to either
|
| 1159 | */
|
| 1160 | static unsigned int mmc_boot_set_bus_width( struct mmc_boot_card* card,
|
| 1161 | unsigned int width )
|
| 1162 | {
|
| 1163 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1164 | unsigned int mmc_reg = 0;
|
| 1165 | unsigned int mmc_width = 0;
|
Subbaraman Narayanamurthy | 7d34774 | 2010-10-29 21:24:08 -0700 | [diff] [blame] | 1166 | unsigned int status;
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1167 | unsigned int wait_count = 100;
|
| 1168 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1169 |
|
| 1170 | if( width != MMC_BOOT_BUS_WIDTH_1_BIT)
|
| 1171 | {
|
| 1172 | mmc_width = width-1;
|
| 1173 | }
|
| 1174 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1175 |
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1176 | mmc_ret = mmc_boot_switch_cmd(card, MMC_BOOT_ACCESS_WRITE,
|
| 1177 | MMC_BOOT_EXT_CMMC_BUS_WIDTH, mmc_width);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1178 |
|
| 1179 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1180 | {
|
| 1181 | return mmc_ret;
|
| 1182 | }
|
| 1183 |
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1184 | /* Wait for the card to complete the switch command processing */
|
| 1185 | do
|
| 1186 | {
|
| 1187 | mmc_ret = mmc_boot_get_card_status(card, 0, &status);
|
| 1188 | if(mmc_ret != MMC_BOOT_E_SUCCESS)
|
| 1189 | {
|
| 1190 | return mmc_ret;
|
| 1191 | }
|
| 1192 |
|
| 1193 | wait_count--;
|
| 1194 | if(wait_count == 0)
|
| 1195 | {
|
| 1196 | return MMC_BOOT_E_FAILURE;
|
| 1197 | }
|
| 1198 | }while( MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_PROG_STATE );
|
| 1199 |
|
| 1200 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1201 | /* set MCI_CLK accordingly */
|
| 1202 | mmc_reg = readl( MMC_BOOT_MCI_CLK );
|
| 1203 | mmc_reg &= ~MMC_BOOT_MCI_CLK_WIDEBUS_MODE;
|
| 1204 | if ( width == MMC_BOOT_BUS_WIDTH_1_BIT )
|
| 1205 | {
|
| 1206 | mmc_reg |= MMC_BOOT_MCI_CLK_WIDEBUS_1_BIT;
|
| 1207 | }
|
| 1208 | else if (width == MMC_BOOT_BUS_WIDTH_4_BIT )
|
| 1209 | {
|
| 1210 | mmc_reg |= MMC_BOOT_MCI_CLK_WIDEBUS_4_BIT;
|
| 1211 | }
|
| 1212 | else if (width == MMC_BOOT_BUS_WIDTH_8_BIT )
|
| 1213 | {
|
| 1214 | mmc_reg |= MMC_BOOT_MCI_CLK_WIDEBUS_8_BIT;
|
| 1215 | }
|
| 1216 | writel( mmc_reg, MMC_BOOT_MCI_CLK );
|
Shashank Mittal | 23b8f42 | 2010-04-16 19:27:21 -0700 | [diff] [blame] | 1217 |
|
| 1218 | mdelay(10); // Giving some time to card to stabilize.
|
| 1219 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1220 | return MMC_BOOT_E_SUCCESS;
|
| 1221 | }
|
| 1222 |
|
| 1223 |
|
| 1224 | /*
|
| 1225 | * A command to start data read from card. Either a single block or
|
| 1226 | * multiple blocks can be read. Multiple blocks read will continuously
|
| 1227 | * transfer data from card to host unless requested to stop by issuing
|
| 1228 | * CMD12 - STOP_TRANSMISSION.
|
| 1229 | */
|
| 1230 | static unsigned int mmc_boot_send_read_command( struct mmc_boot_card* card,
|
| 1231 | unsigned int xfer_type,
|
| 1232 | unsigned int data_addr )
|
| 1233 | {
|
| 1234 | struct mmc_boot_command cmd;
|
| 1235 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1236 |
|
| 1237 | /* basic check */
|
| 1238 | if( card == NULL )
|
| 1239 | {
|
| 1240 | return MMC_BOOT_E_INVAL;
|
| 1241 | }
|
| 1242 |
|
| 1243 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 1244 | sizeof(struct mmc_boot_command) );
|
| 1245 |
|
| 1246 | /* CMD17/18 Format:
|
| 1247 | * [31:0] Data Address
|
| 1248 | */
|
| 1249 | if( xfer_type == MMC_BOOT_XFER_MULTI_BLOCK )
|
| 1250 | {
|
| 1251 | cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
|
| 1252 | }
|
| 1253 | else
|
| 1254 | {
|
| 1255 | cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
|
| 1256 | }
|
| 1257 |
|
| 1258 | cmd.argument = data_addr;
|
| 1259 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 1260 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 1261 |
|
| 1262 | /* send command */
|
| 1263 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 1264 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1265 | {
|
| 1266 | return mmc_ret;
|
| 1267 | }
|
| 1268 |
|
| 1269 | /* Response contains 32 bit Card status. Here we'll check
|
| 1270 | BLOCK_LEN_ERROR and ADDRESS_ERROR */
|
| 1271 | if( cmd.resp[0] & MMC_BOOT_R1_BLOCK_LEN_ERR )
|
| 1272 | {
|
| 1273 | return MMC_BOOT_E_BLOCKLEN_ERR;
|
| 1274 | }
|
| 1275 | /* Misaligned address not matching block length */
|
| 1276 | if( cmd.resp[0] & MMC_BOOT_R1_ADDR_ERR )
|
| 1277 | {
|
| 1278 | return MMC_BOOT_E_ADDRESS_ERR;
|
| 1279 | }
|
| 1280 |
|
| 1281 | return MMC_BOOT_E_SUCCESS;
|
| 1282 | }
|
| 1283 |
|
| 1284 | /*
|
| 1285 | * A command to start data write to card. Either a single block or
|
| 1286 | * multiple blocks can be written. Multiple block write will continuously
|
| 1287 | * transfer data from host to card unless requested to stop by issuing
|
| 1288 | * CMD12 - STOP_TRANSMISSION.
|
| 1289 | */
|
| 1290 | static unsigned int mmc_boot_send_write_command( struct mmc_boot_card* card,
|
| 1291 | unsigned int xfer_type,
|
| 1292 | unsigned int data_addr )
|
| 1293 | {
|
| 1294 | struct mmc_boot_command cmd;
|
| 1295 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1296 |
|
| 1297 | /* basic check */
|
| 1298 | if( card == NULL )
|
| 1299 | {
|
| 1300 | return MMC_BOOT_E_INVAL;
|
| 1301 | }
|
| 1302 |
|
| 1303 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 1304 | sizeof(struct mmc_boot_command) );
|
| 1305 |
|
| 1306 | /* CMD24/25 Format:
|
| 1307 | * [31:0] Data Address
|
| 1308 | */
|
| 1309 | if( xfer_type == MMC_BOOT_XFER_MULTI_BLOCK )
|
| 1310 | {
|
| 1311 | cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
|
| 1312 | }
|
| 1313 | else
|
| 1314 | {
|
| 1315 | cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
|
| 1316 | }
|
| 1317 |
|
| 1318 | cmd.argument = data_addr;
|
| 1319 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 1320 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 1321 |
|
| 1322 | /* send command */
|
| 1323 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 1324 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1325 | {
|
| 1326 | return mmc_ret;
|
| 1327 | }
|
| 1328 |
|
| 1329 | /* Response contains 32 bit Card status. Here we'll check
|
| 1330 | BLOCK_LEN_ERROR and ADDRESS_ERROR */
|
| 1331 | if( cmd.resp[0] & MMC_BOOT_R1_BLOCK_LEN_ERR )
|
| 1332 | {
|
| 1333 | return MMC_BOOT_E_BLOCKLEN_ERR;
|
| 1334 | }
|
| 1335 | /* Misaligned address not matching block length */
|
| 1336 | if( cmd.resp[0] & MMC_BOOT_R1_ADDR_ERR )
|
| 1337 | {
|
| 1338 | return MMC_BOOT_E_ADDRESS_ERR;
|
| 1339 | }
|
| 1340 |
|
| 1341 | return MMC_BOOT_E_SUCCESS;
|
| 1342 | }
|
| 1343 |
|
| 1344 |
|
| 1345 | /*
|
| 1346 | * Write data_len data to address specified by data_addr. data_len is
|
| 1347 | * multiple of blocks for block data transfer.
|
| 1348 | */
|
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 1349 | unsigned int mmc_boot_write_to_card( struct mmc_boot_host* host,
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1350 | struct mmc_boot_card* card,
|
| 1351 | unsigned long long data_addr,
|
| 1352 | unsigned int data_len,
|
| 1353 | unsigned int* in )
|
| 1354 | {
|
| 1355 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1356 | unsigned int mmc_status = 0;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1357 | unsigned int mmc_reg = 0;
|
| 1358 | unsigned int addr;
|
| 1359 | unsigned int xfer_type;
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1360 | unsigned int status;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1361 |
|
| 1362 | if( ( host == NULL ) || ( card == NULL ) )
|
| 1363 | {
|
| 1364 | return MMC_BOOT_E_INVAL;
|
| 1365 | }
|
| 1366 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1367 | /* Set block length. High Capacity MMC/SD card uses fixed 512 bytes block
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1368 | length. So no need to send CMD16. */
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1369 | if( (card->type != MMC_BOOT_TYPE_MMCHC) && (card->type != MMC_BOOT_TYPE_SDHC) )
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1370 | {
|
| 1371 | mmc_ret = mmc_boot_set_block_len( card, card->wr_block_len );
|
| 1372 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1373 | {
|
| 1374 | dprintf(CRITICAL, "Error No.%d: Failure setting block length for Card\
|
| 1375 | (RCA:%s)\n", mmc_ret, (char *)(card->rca) );
|
| 1376 | return mmc_ret;
|
| 1377 | }
|
| 1378 | }
|
| 1379 |
|
| 1380 | /* use multi-block mode to transfer for data larger than a block */
|
| 1381 | xfer_type = (data_len > card->rd_block_len) ? MMC_BOOT_XFER_MULTI_BLOCK :
|
| 1382 | MMC_BOOT_XFER_SINGLE_BLOCK;
|
| 1383 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1384 | /* For MMCHC/SDHC data address is specified in unit of 512B */
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 1385 | addr = ( (card->type != MMC_BOOT_TYPE_MMCHC) && (card->type != MMC_BOOT_TYPE_SDHC) )
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1386 | ? (unsigned int) data_addr : (unsigned int) (data_addr / 512);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1387 |
|
| 1388 | /* Set the FLOW_ENA bit of MCI_CLK register to 1 */
|
| 1389 | mmc_reg = readl( MMC_BOOT_MCI_CLK );
|
| 1390 | mmc_reg |= MMC_BOOT_MCI_CLK_ENA_FLOW ;
|
| 1391 | writel( mmc_reg, MMC_BOOT_MCI_CLK );
|
| 1392 |
|
| 1393 | /* Write data timeout period to MCI_DATA_TIMER register */
|
| 1394 | /* Data timeout period should be in card bus clock periods */
|
| 1395 | /*TODO: Fix timeout value*/
|
| 1396 | mmc_reg = 0xFFFFFFFF;
|
| 1397 | writel( mmc_reg, MMC_BOOT_MCI_DATA_TIMER );
|
| 1398 |
|
| 1399 | /* Write the total size of the transfer data to MCI_DATA_LENGTH register */
|
| 1400 | writel( data_len, MMC_BOOT_MCI_DATA_LENGTH );
|
| 1401 |
|
| 1402 | /* Send command to the card/device in order to start the write data xfer.
|
| 1403 | The possible commands are CMD24/25/53/60/61 */
|
| 1404 | mmc_ret = mmc_boot_send_write_command( card, xfer_type, addr );
|
| 1405 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1406 | {
|
| 1407 | dprintf(CRITICAL, "Error No.%d: Failure sending write command to the\
|
| 1408 | Card(RCA:%x)\n", mmc_ret, card->rca );
|
| 1409 | return mmc_ret;
|
| 1410 | }
|
| 1411 |
|
| 1412 | /* Set appropriate fields and write the MCI_DATA_CTL register */
|
| 1413 | /* Set ENABLE bit to 1 to enable the data transfer. */
|
| 1414 | mmc_reg = 0;
|
| 1415 | mmc_reg |= MMC_BOOT_MCI_DATA_ENABLE;
|
| 1416 | /* Clear DIRECTION bit to 0 to enable transfer from host to card */
|
| 1417 | /* Clear MODE bit to 0 to enable block oriented data transfer. For
|
| 1418 | MMC cards only, if stream data transfer mode is desired, set
|
| 1419 | MODE bit to 1. */
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 1420 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1421 | /* Set DM_ENABLE bit to 1 in order to enable DMA, otherwise set 0 */
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 1422 |
|
| 1423 | #if MMC_BOOT_ADM
|
| 1424 | mmc_reg |= MMC_BOOT_MCI_DATA_DM_ENABLE;
|
| 1425 | #endif
|
| 1426 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1427 | /* Write size of block to be used during the data transfer to
|
| 1428 | BLOCKSIZE field */
|
| 1429 | mmc_reg |= card->wr_block_len << MMC_BOOT_MCI_BLKSIZE_POS;
|
| 1430 | writel( mmc_reg, MMC_BOOT_MCI_DATA_CTL );
|
| 1431 |
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 1432 | /* write data to FIFO */
|
| 1433 | mmc_ret = mmc_boot_fifo_data_transfer(in, data_len, MMC_BOOT_DATA_WRITE);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1434 |
|
| 1435 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1436 | {
|
| 1437 | dprintf(CRITICAL, "Error No.%d: Failure on data transfer from the \
|
| 1438 | Card(RCA:%x)\n", mmc_ret, card->rca );
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 1439 | /* In case of any failure happening for multi block transfer */
|
| 1440 | if( xfer_type == MMC_BOOT_XFER_MULTI_BLOCK )
|
| 1441 | mmc_boot_send_stop_transmission( card, 1 );
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1442 | return mmc_ret;
|
| 1443 | }
|
| 1444 |
|
| 1445 | /* Send command to the card/device in order to poll the de-assertion of
|
| 1446 | card/device BUSY condition. It is important to set PROG_ENA bit in
|
| 1447 | MCI_CLK register before sending the command. Possible commands are
|
| 1448 | CMD12/13. */
|
| 1449 | if( xfer_type == MMC_BOOT_XFER_MULTI_BLOCK )
|
| 1450 | {
|
| 1451 | mmc_ret = mmc_boot_send_stop_transmission( card, 1 );
|
| 1452 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1453 | {
|
| 1454 | dprintf(CRITICAL, "Error No.%d: Failure sending Stop Transmission \
|
| 1455 | command to the Card(RCA:%x)\n", mmc_ret, card->rca );
|
| 1456 | return mmc_ret;
|
| 1457 | }
|
| 1458 | }
|
| 1459 | else
|
| 1460 | {
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1461 | mmc_ret = mmc_boot_get_card_status( card, 1, &status );
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1462 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1463 | {
|
| 1464 | dprintf(CRITICAL, "Error No.%d: Failure getting card status of Card(RCA:%x)\n",
|
| 1465 | mmc_ret, card->rca );
|
| 1466 | return mmc_ret;
|
| 1467 | }
|
| 1468 | }
|
| 1469 |
|
| 1470 | /* Wait for interrupt or poll on PROG_DONE bit of MCI_STATUS register. If
|
| 1471 | PROG_DONE bit is set to 1 it means that the card finished it programming
|
| 1472 | and stopped driving DAT0 line to 0 */
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1473 | do
|
| 1474 | {
|
| 1475 | mmc_status = readl( MMC_BOOT_MCI_STATUS );
|
| 1476 | if( mmc_status & MMC_BOOT_MCI_STAT_PROG_DONE )
|
| 1477 | {
|
| 1478 | break;
|
| 1479 | }
|
| 1480 | } while(1);
|
| 1481 |
|
| 1482 | return MMC_BOOT_E_SUCCESS;
|
| 1483 | }
|
Kinson Chik | f1a4351 | 2011-07-14 11:28:39 -0700 | [diff] [blame] | 1484 | |
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1485 |
|
| 1486 | /*
|
| 1487 | * Adjust the interface speed to optimal speed
|
| 1488 | */
|
| 1489 | static unsigned int mmc_boot_adjust_interface_speed( struct mmc_boot_host* host,
|
| 1490 | struct mmc_boot_card* card )
|
| 1491 | {
|
Subbaraman Narayanamurthy | 29308e0 | 2010-12-16 16:24:48 -0800 | [diff] [blame] | 1492 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1493 | unsigned int status;
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1494 | unsigned int wait_count = 100;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1495 |
|
| 1496 | /* Setting HS_TIMING in EXT_CSD (CMD6) */
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1497 | mmc_ret = mmc_boot_switch_cmd(card, MMC_BOOT_ACCESS_WRITE,
|
| 1498 | MMC_BOOT_EXT_CMMC_HS_TIMING, 1);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1499 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1500 | if(mmc_ret!= MMC_BOOT_E_SUCCESS)
|
| 1501 | {
|
| 1502 | return mmc_ret;
|
| 1503 | }
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1504 |
|
| 1505 | /* Wait for the card to complete the switch command processing */
|
| 1506 | do
|
| 1507 | {
|
| 1508 | mmc_ret = mmc_boot_get_card_status(card, 0, &status);
|
| 1509 | if(mmc_ret != MMC_BOOT_E_SUCCESS)
|
| 1510 | {
|
| 1511 | return mmc_ret;
|
| 1512 | }
|
| 1513 |
|
| 1514 | wait_count--;
|
| 1515 | if(wait_count == 0)
|
| 1516 | {
|
| 1517 | return MMC_BOOT_E_FAILURE;
|
| 1518 | }
|
| 1519 | }while( MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_PROG_STATE );
|
| 1520 |
|
| 1521 |
|
Amol Jadi | 8225456 | 2011-06-27 11:25:48 -0700 | [diff] [blame] | 1522 | clock_config_mmc(mmc_slot, MMC_CLK_50MHZ);
|
| 1523 |
|
| 1524 | host->mclk_rate = MMC_CLK_50MHZ;
|
| 1525 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1526 | return MMC_BOOT_E_SUCCESS;
|
| 1527 | }
|
| 1528 |
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1529 | static unsigned int mmc_boot_set_block_count( struct mmc_boot_card* card,
|
| 1530 | unsigned int block_count )
|
| 1531 | {
|
| 1532 | struct mmc_boot_command cmd;
|
| 1533 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1534 |
|
| 1535 | /* basic check */
|
| 1536 | if( card == NULL )
|
| 1537 | {
|
| 1538 | return MMC_BOOT_E_INVAL;
|
| 1539 | }
|
| 1540 |
|
| 1541 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 1542 | sizeof(struct mmc_boot_command) );
|
| 1543 |
|
| 1544 | /* CMD23 Format:
|
| 1545 | * [15:0] number of blocks
|
| 1546 | */
|
| 1547 |
|
| 1548 | cmd.cmd_index = CMD23_SET_BLOCK_COUNT;
|
| 1549 | cmd.argument = block_count;
|
| 1550 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 1551 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 1552 |
|
| 1553 | /* send command */
|
| 1554 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 1555 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1556 | {
|
| 1557 | return mmc_ret;
|
| 1558 | }
|
| 1559 |
|
| 1560 | if( cmd.resp[0] & MMC_BOOT_R1_OUT_OF_RANGE)
|
| 1561 | {
|
| 1562 | return MMC_BOOT_E_BLOCKLEN_ERR;
|
| 1563 | }
|
| 1564 |
|
| 1565 | return MMC_BOOT_E_SUCCESS;
|
| 1566 | }
|
| 1567 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1568 | /*
|
| 1569 | * Reads a data of data_len from the address specified. data_len
|
| 1570 | * should be multiple of block size for block data transfer.
|
| 1571 | */
|
Kinson Chik | 66552a8 | 2011-03-29 15:59:06 -0700 | [diff] [blame] | 1572 | unsigned int mmc_boot_read_from_card( struct mmc_boot_host* host,
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1573 | struct mmc_boot_card* card,
|
| 1574 | unsigned long long data_addr,
|
| 1575 | unsigned int data_len,
|
| 1576 | unsigned int* out )
|
| 1577 | {
|
| 1578 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1579 | unsigned int mmc_reg = 0;
|
| 1580 | unsigned int xfer_type;
|
| 1581 | unsigned int addr = 0;
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1582 | unsigned char open_ended_read = 1;
|
Shashank Mittal | 7afbf28 | 2010-06-02 19:48:31 -0700 | [diff] [blame] | 1583 |
|
Greg Grisco | d625055 | 2011-06-29 14:40:23 -0700 | [diff] [blame] | 1584 | if ( ( host == NULL ) || ( card == NULL ) )
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1585 | {
|
| 1586 | return MMC_BOOT_E_INVAL;
|
| 1587 | }
|
| 1588 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1589 | /* Set block length. High Capacity MMC/SD card uses fixed 512 bytes block
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1590 | length. So no need to send CMD16. */
|
Greg Grisco | d625055 | 2011-06-29 14:40:23 -0700 | [diff] [blame] | 1591 | if ( (card->type != MMC_BOOT_TYPE_MMCHC) && (card->type != MMC_BOOT_TYPE_SDHC) )
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1592 | {
|
| 1593 | mmc_ret = mmc_boot_set_block_len( card, card->rd_block_len );
|
Greg Grisco | d625055 | 2011-06-29 14:40:23 -0700 | [diff] [blame] | 1594 | if ( mmc_ret != MMC_BOOT_E_SUCCESS )
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1595 | {
|
| 1596 | dprintf(CRITICAL, "Error No.%d: Failure setting block length for Card (RCA:%s)\n",
|
| 1597 | mmc_ret, (char *)(card->rca) );
|
| 1598 | return mmc_ret;
|
| 1599 | }
|
| 1600 | }
|
| 1601 |
|
| 1602 | /* use multi-block mode to transfer for data larger than a block */
|
| 1603 | xfer_type = (data_len > card->rd_block_len) ? MMC_BOOT_XFER_MULTI_BLOCK :
|
| 1604 | MMC_BOOT_XFER_SINGLE_BLOCK;
|
| 1605 |
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1606 | if(xfer_type == MMC_BOOT_XFER_MULTI_BLOCK)
|
| 1607 | {
|
| 1608 | if( (card->type == MMC_BOOT_TYPE_MMCHC) || (card->type == MMC_BOOT_TYPE_STD_MMC) )
|
| 1609 | {
|
| 1610 | /* Virtio model does not support open-ended multi-block reads.
|
| 1611 | * So, block count must be set before sending read command.
|
| 1612 | * All SD cards do not support this command. Restrict this to MMC.
|
| 1613 | */
|
| 1614 | mmc_ret = mmc_boot_set_block_count( card, data_len/(card->rd_block_len));
|
| 1615 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1616 | {
|
| 1617 | dprintf(CRITICAL, "Error No.%d: Failure setting read block count for Card (RCA:%s)\n",
|
| 1618 | mmc_ret, (char *)(card->rca) );
|
| 1619 | return mmc_ret;
|
| 1620 | }
|
| 1621 |
|
| 1622 | open_ended_read = 0;
|
| 1623 | }
|
| 1624 | }
|
| 1625 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1626 | /* Set the FLOW_ENA bit of MCI_CLK register to 1 */
|
| 1627 | /* Note: It's already enabled */
|
| 1628 |
|
| 1629 | /* If Data Mover is used for data transfer then prepare Command
|
| 1630 | List Entry and enable the Data mover to work with SDCC2 */
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1631 |
|
| 1632 | /* Write data timeout period to MCI_DATA_TIMER register. */
|
| 1633 | /* Data timeout period should be in card bus clock periods */
|
| 1634 | mmc_reg = (unsigned long)(card->rd_timeout_ns / 1000000) *
|
| 1635 | (host->mclk_rate / 1000);
|
| 1636 | mmc_reg += 1000; // add some extra clock cycles to be safe
|
| 1637 | mmc_reg = mmc_reg/2;
|
| 1638 | writel( mmc_reg, MMC_BOOT_MCI_DATA_TIMER );
|
| 1639 |
|
| 1640 | /* Write the total size of the transfer data to MCI_DATA_LENGTH
|
| 1641 | register. For block xfer it must be multiple of the block
|
| 1642 | size. */
|
| 1643 | writel( data_len, MMC_BOOT_MCI_DATA_LENGTH );
|
| 1644 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1645 | /* For MMCHC/SDHC data address is specified in unit of 512B */
|
| 1646 | addr = ( (card->type != MMC_BOOT_TYPE_MMCHC) && (card->type != MMC_BOOT_TYPE_SDHC) )
|
| 1647 | ? (unsigned int) data_addr :(unsigned int) (data_addr / 512);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1648 |
|
| 1649 | /* Set appropriate fields and write the MCI_DATA_CTL register. */
|
| 1650 | /* Set ENABLE bit to 1 to enable the data transfer. */
|
| 1651 | mmc_reg = 0;
|
| 1652 | mmc_reg |= MMC_BOOT_MCI_DATA_ENABLE;
|
| 1653 | /* Clear DIRECTION bit to 1 to enable transfer from card to host */
|
| 1654 | mmc_reg |= MMC_BOOT_MCI_DATA_DIR;
|
| 1655 | /* Clear MODE bit to 0 to enable block oriented data transfer. For
|
| 1656 | MMC cards only, if stream data transfer mode is desired, set
|
| 1657 | MODE bit to 1. */
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 1658 |
|
| 1659 | /* If DMA is to be used, Set DM_ENABLE bit to 1 */
|
| 1660 |
|
| 1661 | #if MMC_BOOT_ADM
|
| 1662 | mmc_reg |= MMC_BOOT_MCI_DATA_DM_ENABLE;
|
| 1663 | #endif
|
| 1664 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1665 | /* Write size of block to be used during the data transfer to
|
| 1666 | BLOCKSIZE field */
|
| 1667 | mmc_reg |= (card->rd_block_len << MMC_BOOT_MCI_BLKSIZE_POS);
|
| 1668 | writel( mmc_reg, MMC_BOOT_MCI_DATA_CTL );
|
| 1669 |
|
| 1670 | /* Send command to the card/device in order to start the read data
|
| 1671 | transfer. Possible commands: CMD17/18/53/60/61. */
|
| 1672 | mmc_ret = mmc_boot_send_read_command( card, xfer_type, addr );
|
| 1673 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1674 | {
|
| 1675 | dprintf(CRITICAL, "Error No.%d: Failure sending read command to the Card(RCA:%x)\n",
|
| 1676 | mmc_ret, card->rca );
|
| 1677 | return mmc_ret;
|
| 1678 | }
|
| 1679 |
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 1680 | /* Read the transfer data from SDCC FIFO. */
|
| 1681 | mmc_ret = mmc_boot_fifo_data_transfer(out, data_len, MMC_BOOT_DATA_READ);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1682 |
|
| 1683 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1684 | {
|
| 1685 | dprintf(CRITICAL, "Error No.%d: Failure on data transfer from the \
|
| 1686 | Card(RCA:%x)\n", mmc_ret, card->rca );
|
| 1687 | return mmc_ret;
|
| 1688 | }
|
| 1689 |
|
| 1690 | /* In case a multiple block transfer was performed, send CMD12 to the
|
| 1691 | card/device in order to indicate the end of read data transfer */
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1692 | if( (xfer_type == MMC_BOOT_XFER_MULTI_BLOCK) && open_ended_read )
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1693 | {
|
| 1694 | mmc_ret = mmc_boot_send_stop_transmission( card, 0 );
|
| 1695 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1696 | {
|
| 1697 | dprintf(CRITICAL, "Error No.%d: Failure sending Stop Transmission \
|
| 1698 | command to the Card(RCA:%x)\n", mmc_ret, card->rca );
|
| 1699 | return mmc_ret;
|
| 1700 | }
|
| 1701 | }
|
| 1702 |
|
| 1703 | return MMC_BOOT_E_SUCCESS;
|
| 1704 | }
|
| 1705 |
|
| 1706 | /*
|
| 1707 | * Initialize host structure, set and enable clock-rate and power mode.
|
| 1708 | */
|
| 1709 | unsigned int mmc_boot_init( struct mmc_boot_host* host )
|
| 1710 | {
|
| 1711 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1712 | unsigned int mmc_pwr = 0;
|
| 1713 |
|
| 1714 |
|
| 1715 | host->ocr = MMC_BOOT_OCR_27_36 | MMC_BOOT_OCR_SEC_MODE;
|
| 1716 | host->cmd_retry = MMC_BOOT_MAX_COMMAND_RETRY;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1717 |
|
Amol Jadi | 8225456 | 2011-06-27 11:25:48 -0700 | [diff] [blame] | 1718 | /* Initialize any clocks needed for SDC controller */
|
| 1719 | clock_init_mmc(mmc_slot);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1720 |
|
Amol Jadi | 8225456 | 2011-06-27 11:25:48 -0700 | [diff] [blame] | 1721 | /* Setup initial freq to 400KHz */
|
| 1722 | clock_config_mmc(mmc_slot, MMC_CLK_400KHZ);
|
| 1723 |
|
| 1724 | host->mclk_rate = MMC_CLK_400KHZ;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1725 |
|
| 1726 | /* set power mode*/
|
| 1727 | /* give some time to reach minimum voltate */
|
| 1728 | mdelay(2);
|
| 1729 | mmc_pwr &= ~MMC_BOOT_MCI_PWR_UP;
|
| 1730 | mmc_pwr |= MMC_BOOT_MCI_PWR_ON;
|
| 1731 | mmc_pwr |= MMC_BOOT_MCI_PWR_UP;
|
| 1732 | writel( mmc_pwr, MMC_BOOT_MCI_POWER );
|
| 1733 | /* some more time to stabilize voltage */
|
| 1734 | mdelay(2);
|
| 1735 |
|
| 1736 | return MMC_BOOT_E_SUCCESS;
|
| 1737 | }
|
| 1738 |
|
| 1739 | /*
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1740 | * Performs card identification process:
|
| 1741 | * - get card's unique identification number (CID)
|
| 1742 | * - get(for sd)/set (for mmc) relative card address (RCA)
|
| 1743 | * - get CSD
|
| 1744 | * - select the card, thus transitioning it to Transfer State
|
| 1745 | * - get Extended CSD (for mmc)
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1746 | */
|
| 1747 | static unsigned int mmc_boot_identify_card( struct mmc_boot_host* host,
|
| 1748 | struct mmc_boot_card* card)
|
| 1749 | {
|
| 1750 | unsigned int mmc_return = MMC_BOOT_E_SUCCESS;
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1751 | unsigned int raw_csd[4];
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1752 |
|
| 1753 | /* basic check */
|
| 1754 | if( ( host == NULL ) || ( card == NULL ) )
|
| 1755 | {
|
| 1756 | return MMC_BOOT_E_INVAL;
|
| 1757 | }
|
| 1758 |
|
| 1759 | /* Ask card to send its unique card identification (CID) number (CMD2) */
|
| 1760 | mmc_return = mmc_boot_all_send_cid( card );
|
| 1761 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 1762 | {
|
| 1763 | dprintf(CRITICAL, "Error No. %d: Failure getting card's CID number!\n",
|
| 1764 | mmc_return );
|
| 1765 | return mmc_return;
|
| 1766 | }
|
| 1767 |
|
| 1768 | /* Ask card to send a relative card address (RCA) (CMD3) */
|
| 1769 | mmc_return = mmc_boot_send_relative_address( card );
|
| 1770 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 1771 | {
|
| 1772 | dprintf(CRITICAL, "Error No. %d: Failure getting card's RCA!\n",
|
| 1773 | mmc_return );
|
| 1774 | return mmc_return;
|
| 1775 | }
|
| 1776 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1777 | /* Get card's CSD register (CMD9) */
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1778 | mmc_return = mmc_boot_send_csd( card, raw_csd );
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1779 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 1780 | {
|
| 1781 | dprintf(CRITICAL, "Error No.%d: Failure getting card's CSD information!\n",
|
| 1782 | mmc_return );
|
| 1783 | return mmc_return;
|
| 1784 | }
|
| 1785 |
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 1786 | /* Select the card (CMD7) */
|
| 1787 | mmc_return = mmc_boot_select_card( card, card->rca );
|
| 1788 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 1789 | {
|
| 1790 | dprintf(CRITICAL, "Error No.%d: Failure selecting the Card with RCA: %x\n",
|
| 1791 | mmc_return, card->rca );
|
| 1792 | return mmc_return;
|
| 1793 | }
|
| 1794 |
|
| 1795 | /* Set the card status as active */
|
| 1796 | card->status = MMC_BOOT_STATUS_ACTIVE;
|
| 1797 |
|
| 1798 | if( (card->type == MMC_BOOT_TYPE_STD_MMC) || (card->type == MMC_BOOT_TYPE_MMCHC))
|
| 1799 | {
|
| 1800 | /* For MMC cards, also get the extended csd */
|
| 1801 | mmc_return = mmc_boot_send_ext_cmd( card, ext_csd_buf);
|
| 1802 |
|
| 1803 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 1804 | {
|
| 1805 | dprintf(CRITICAL, "Error No.%d: Failure getting card's ExtCSD information!\n",
|
| 1806 | mmc_return );
|
| 1807 |
|
| 1808 | return mmc_return;
|
| 1809 | }
|
| 1810 |
|
| 1811 | }
|
| 1812 |
|
| 1813 | /* Decode and save the CSD register */
|
| 1814 | mmc_return = mmc_boot_decode_and_save_csd( card, raw_csd );
|
| 1815 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 1816 | {
|
| 1817 | dprintf(CRITICAL, "Error No.%d: Failure decoding card's CSD information!\n",
|
| 1818 | mmc_return );
|
| 1819 | return mmc_return;
|
| 1820 | }
|
| 1821 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1822 | /* Once CSD is received, set read and write timeout value now itself */
|
| 1823 | mmc_return = mmc_boot_set_read_timeout( host, card );
|
| 1824 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 1825 | {
|
| 1826 | dprintf(CRITICAL, "Error No.%d: Failure setting Read Timeout value!\n",
|
| 1827 | mmc_return );
|
| 1828 | return mmc_return;
|
| 1829 | }
|
| 1830 |
|
| 1831 | mmc_return = mmc_boot_set_write_timeout( host, card );
|
| 1832 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 1833 | {
|
| 1834 | dprintf(CRITICAL, "Error No.%d: Failure setting Write Timeout value!\n",
|
| 1835 | mmc_return );
|
| 1836 | return mmc_return;
|
| 1837 | }
|
| 1838 |
|
| 1839 | return MMC_BOOT_E_SUCCESS;
|
| 1840 | }
|
| 1841 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1842 | static unsigned int mmc_boot_send_app_cmd(unsigned int rca)
|
| 1843 | {
|
| 1844 | struct mmc_boot_command cmd;
|
| 1845 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 1846 |
|
| 1847 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 1848 | sizeof(struct mmc_boot_command) );
|
| 1849 |
|
| 1850 | cmd.cmd_index = CMD55_APP_CMD;
|
| 1851 | cmd.argument = (rca << 16);
|
| 1852 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 1853 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 1854 |
|
| 1855 | mmc_ret = mmc_boot_send_command(&cmd);
|
| 1856 |
|
| 1857 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1858 | {
|
| 1859 | return mmc_ret;
|
| 1860 | }
|
| 1861 |
|
| 1862 | return MMC_BOOT_E_SUCCESS;
|
| 1863 | }
|
| 1864 |
|
Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 1865 | static unsigned int mmc_boot_sd_init_card(struct mmc_boot_card* card)
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1866 | {
|
| 1867 | unsigned int i,mmc_ret;
|
| 1868 | unsigned int ocr_cmd_arg;
|
| 1869 | struct mmc_boot_command cmd;
|
| 1870 |
|
| 1871 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 1872 | sizeof(struct mmc_boot_command) );
|
| 1873 |
|
| 1874 | /* Send CMD8 to set interface condition */
|
| 1875 | for(i=0;i<3;i++)
|
| 1876 | {
|
| 1877 | cmd.cmd_index = CMD8_SEND_IF_COND;
|
| 1878 | cmd.argument = MMC_BOOT_SD_HC_VOLT_SUPPLIED;
|
| 1879 | cmd.cmd_type = MMC_BOOT_CMD_BCAST_W_RESP;
|
| 1880 | cmd.resp_type = MMC_BOOT_RESP_R7;
|
| 1881 |
|
| 1882 | mmc_ret = mmc_boot_send_command(&cmd);
|
| 1883 | if( mmc_ret == MMC_BOOT_E_SUCCESS )
|
| 1884 | {
|
| 1885 | if(cmd.resp[0] != MMC_BOOT_SD_HC_VOLT_SUPPLIED)
|
| 1886 | return MMC_BOOT_E_FAILURE;
|
| 1887 | /* Set argument for ACMD41 */
|
| 1888 | ocr_cmd_arg = MMC_BOOT_SD_NEG_OCR | MMC_BOOT_SD_HC_HCS;
|
| 1889 | break;
|
| 1890 | }
|
| 1891 | mdelay(1);
|
| 1892 | }
|
| 1893 |
|
| 1894 | /* Send ACMD41 to set operating condition */
|
| 1895 | /* Try for a max of 1 sec as per spec */
|
| 1896 | for(i=0;i<20;i++)
|
| 1897 | {
|
| 1898 | mmc_ret = mmc_boot_send_app_cmd(0);
|
| 1899 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1900 | {
|
| 1901 | return mmc_ret;
|
| 1902 | }
|
| 1903 |
|
| 1904 | cmd.cmd_index = ACMD41_SEND_OP_COND;
|
| 1905 | cmd.argument = ocr_cmd_arg;
|
| 1906 | cmd.cmd_type = MMC_BOOT_CMD_BCAST_W_RESP;
|
| 1907 | cmd.resp_type = MMC_BOOT_RESP_R3;
|
| 1908 |
|
| 1909 | mmc_ret = mmc_boot_send_command(&cmd);
|
| 1910 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 1911 | {
|
| 1912 | return mmc_ret;
|
| 1913 | }
|
| 1914 | else if (cmd.resp[0] & MMC_BOOT_SD_DEV_READY)
|
| 1915 | {
|
Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 1916 | /* Check for HC */
|
| 1917 | if(cmd.resp[0] & (1 << 30))
|
| 1918 | {
|
| 1919 | card->type = MMC_BOOT_TYPE_SDHC;
|
| 1920 | }
|
| 1921 | else
|
| 1922 | {
|
| 1923 | card->type = MMC_BOOT_TYPE_STD_SD;
|
| 1924 | }
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1925 | break;
|
| 1926 | }
|
| 1927 | mdelay(50);
|
| 1928 | }
|
| 1929 | return MMC_BOOT_E_SUCCESS;
|
| 1930 | }
|
| 1931 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1932 | /*
|
| 1933 | * Routine to initialize MMC card. It resets a card to idle state, verify operating
|
| 1934 | * voltage and set the card inready state.
|
| 1935 | */
|
| 1936 | static unsigned int mmc_boot_init_card( struct mmc_boot_host* host,
|
| 1937 | struct mmc_boot_card* card )
|
| 1938 | {
|
| 1939 | unsigned int mmc_retry = 0;
|
| 1940 | unsigned int mmc_return = MMC_BOOT_E_SUCCESS;
|
| 1941 |
|
| 1942 | /* basic check */
|
| 1943 | if( ( host == NULL ) || ( card == NULL ) )
|
| 1944 | {
|
| 1945 | return MMC_BOOT_E_INVAL;
|
| 1946 | }
|
| 1947 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1948 | /* 1. Card Reset - CMD0 */
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1949 | mmc_return = mmc_boot_reset_cards();
|
| 1950 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 1951 | {
|
| 1952 | dprintf(CRITICAL, "Error No.:%d: Failure resetting MMC cards!\n", mmc_return);
|
| 1953 | return mmc_return;
|
| 1954 | }
|
| 1955 |
|
| 1956 | /* 2. Card Initialization process */
|
| 1957 |
|
| 1958 | /* Send CMD1 to identify and reject cards that do not match host's VDD range
|
| 1959 | profile. Cards sends its OCR register in response.
|
| 1960 | */
|
| 1961 | mmc_retry = 0;
|
| 1962 | do
|
| 1963 | {
|
| 1964 | mmc_return = mmc_boot_send_op_cond( host, card );
|
| 1965 | /* Card returns busy status. We'll retry again! */
|
| 1966 | if( mmc_return == MMC_BOOT_E_CARD_BUSY )
|
| 1967 | {
|
| 1968 | mmc_retry++;
|
Amol Jadi | 58373d4 | 2011-05-23 14:21:59 -0700 | [diff] [blame] | 1969 | mdelay(1);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1970 | continue;
|
| 1971 | }
|
| 1972 | else if( mmc_return == MMC_BOOT_E_SUCCESS )
|
| 1973 | {
|
| 1974 | break;
|
| 1975 | }
|
| 1976 | else
|
| 1977 | {
|
| 1978 | dprintf(CRITICAL, "Error No. %d: Failure Initializing MMC Card!\n",
|
| 1979 | mmc_return );
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1980 |
|
| 1981 | /* Check for sD card */
|
Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 1982 | mmc_return = mmc_boot_sd_init_card(card);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1983 | return mmc_return;
|
| 1984 | }
|
| 1985 | }while( mmc_retry < host->cmd_retry );
|
| 1986 |
|
| 1987 | /* If card still returned busy status we are out of luck.
|
| 1988 | * Card cannot be initialized */
|
| 1989 | if( mmc_return == MMC_BOOT_E_CARD_BUSY )
|
| 1990 | {
|
| 1991 | dprintf(CRITICAL, "Error No. %d: Card has busy status set. \
|
| 1992 | Initialization not completed\n", mmc_return );
|
| 1993 | return MMC_BOOT_E_CARD_BUSY;
|
| 1994 | }
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 1995 | return MMC_BOOT_E_SUCCESS;
|
| 1996 | }
|
| 1997 |
|
| 1998 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 1999 | static unsigned int mmc_boot_set_sd_bus_width(struct mmc_boot_card* card, unsigned int width)
|
| 2000 | {
|
| 2001 | struct mmc_boot_command cmd;
|
| 2002 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2003 | unsigned int sd_reg;
|
| 2004 |
|
| 2005 | mmc_ret = mmc_boot_send_app_cmd(card->rca);
|
| 2006 |
|
| 2007 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2008 | {
|
| 2009 | return mmc_ret;
|
| 2010 | }
|
| 2011 |
|
| 2012 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 2013 | sizeof(struct mmc_boot_command) );
|
| 2014 |
|
| 2015 | /* Send ACMD6 to set bus width */
|
| 2016 | cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
|
| 2017 | /* 10 => 4 bit wide */
|
Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 2018 | if ( width == MMC_BOOT_BUS_WIDTH_1_BIT )
|
| 2019 | {
|
| 2020 | cmd.argument = 0;
|
| 2021 | }
|
| 2022 | else if (width == MMC_BOOT_BUS_WIDTH_4_BIT )
|
| 2023 | {
|
| 2024 | cmd.argument = (1<<1);
|
| 2025 | }
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 2026 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 2027 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 2028 |
|
| 2029 | mmc_ret = mmc_boot_send_command(&cmd);
|
| 2030 |
|
| 2031 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2032 | {
|
| 2033 | return mmc_ret;
|
| 2034 | }
|
| 2035 |
|
| 2036 | /* set MCI_CLK accordingly */
|
| 2037 | sd_reg = readl( MMC_BOOT_MCI_CLK );
|
| 2038 | sd_reg &= ~MMC_BOOT_MCI_CLK_WIDEBUS_MODE;
|
| 2039 | if ( width == MMC_BOOT_BUS_WIDTH_1_BIT )
|
| 2040 | {
|
| 2041 | sd_reg |= MMC_BOOT_MCI_CLK_WIDEBUS_1_BIT;
|
| 2042 | }
|
| 2043 | else if (width == MMC_BOOT_BUS_WIDTH_4_BIT )
|
| 2044 | {
|
| 2045 | sd_reg |= MMC_BOOT_MCI_CLK_WIDEBUS_4_BIT;
|
| 2046 | }
|
| 2047 | else if (width == MMC_BOOT_BUS_WIDTH_8_BIT )
|
| 2048 | {
|
| 2049 | sd_reg |= MMC_BOOT_MCI_CLK_WIDEBUS_8_BIT;
|
| 2050 | }
|
| 2051 | writel( sd_reg, MMC_BOOT_MCI_CLK );
|
| 2052 |
|
| 2053 | mdelay(10); // Giving some time to card to stabilize.
|
| 2054 |
|
| 2055 | return MMC_BOOT_E_SUCCESS;
|
| 2056 | }
|
| 2057 |
|
| 2058 | static unsigned int mmc_boot_set_sd_hs(struct mmc_boot_host* host, struct mmc_boot_card* card)
|
| 2059 | {
|
Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 2060 | unsigned char sw_buf[64];
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 2061 | unsigned int mmc_ret;
|
| 2062 |
|
Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 2063 | /* CMD6 is a data transfer command. sD card returns 512 bits of data*/
|
| 2064 | /* Refer 4.3.10 of sD card specification 3.0 */
|
| 2065 | mmc_ret = mmc_boot_read_reg(card,64,CMD6_SWITCH_FUNC,MMC_BOOT_SD_SWITCH_HS,
|
| 2066 | (unsigned int *)&sw_buf);
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 2067 |
|
| 2068 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2069 | {
|
| 2070 | return mmc_ret;
|
| 2071 | }
|
| 2072 |
|
| 2073 | mdelay(1);
|
| 2074 |
|
Amol Jadi | 8225456 | 2011-06-27 11:25:48 -0700 | [diff] [blame] | 2075 | clock_config_mmc(mmc_slot, MMC_CLK_50MHZ);
|
| 2076 |
|
| 2077 | host->mclk_rate = MMC_CLK_50MHZ;
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 2078 |
|
| 2079 | return MMC_BOOT_E_SUCCESS;
|
| 2080 | }
|
| 2081 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2082 | /*
|
| 2083 | * Performs initialization and identification of all the MMC cards connected
|
| 2084 | * to the host.
|
| 2085 | */
|
| 2086 |
|
| 2087 | static unsigned int mmc_boot_init_and_identify_cards( struct mmc_boot_host* host, struct mmc_boot_card* card )
|
| 2088 | {
|
| 2089 | unsigned int mmc_return = MMC_BOOT_E_SUCCESS;
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 2090 | unsigned int status;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2091 |
|
| 2092 | /* Basic check */
|
| 2093 | if( host == NULL )
|
| 2094 | {
|
| 2095 | return MMC_BOOT_E_INVAL;
|
| 2096 | }
|
| 2097 |
|
| 2098 | /* Initialize MMC card structure */
|
| 2099 | card->status = MMC_BOOT_STATUS_INACTIVE;
|
| 2100 | card->rd_block_len = MMC_BOOT_RD_BLOCK_LEN;
|
| 2101 | card->wr_block_len = MMC_BOOT_WR_BLOCK_LEN;
|
| 2102 |
|
| 2103 | /* Start initialization process (CMD0 & CMD1) */
|
| 2104 | mmc_return = mmc_boot_init_card( host, card );
|
| 2105 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 2106 | {
|
| 2107 | return mmc_return;
|
| 2108 | }
|
| 2109 |
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 2110 | /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2111 | mmc_return = mmc_boot_identify_card( host, card );
|
| 2112 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 2113 | {
|
| 2114 | return mmc_return;
|
| 2115 | }
|
| 2116 |
|
Shashank Mittal | 999d4ee | 2010-12-14 19:12:59 -0800 | [diff] [blame] | 2117 | if(card->type == MMC_BOOT_TYPE_SDHC || card->type == MMC_BOOT_TYPE_STD_SD)
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2118 | {
|
Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 2119 | /* Setting sD card to high speed without checking card's capability.
|
| 2120 | Cards that do not support high speed may fail to boot */
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 2121 | mmc_return = mmc_boot_set_sd_hs(host, card);
|
| 2122 | if(mmc_return != MMC_BOOT_E_SUCCESS)
|
| 2123 | {
|
| 2124 | return mmc_return;
|
| 2125 | }
|
| 2126 |
|
| 2127 | mmc_return = mmc_boot_set_sd_bus_width(card, MMC_BOOT_BUS_WIDTH_4_BIT);
|
| 2128 | if(mmc_return != MMC_BOOT_E_SUCCESS)
|
| 2129 | {
|
Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 2130 | dprintf(CRITICAL,"Couldn't set 4bit mode for sD card\n");
|
| 2131 | mmc_return = mmc_boot_set_sd_bus_width(card, MMC_BOOT_BUS_WIDTH_1_BIT);
|
| 2132 | if(mmc_return != MMC_BOOT_E_SUCCESS)
|
| 2133 | {
|
| 2134 | dprintf(CRITICAL, "Error No.%d: Failed in setting bus width!\n",
|
| 2135 | mmc_return);
|
| 2136 | return mmc_return;
|
| 2137 | }
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 2138 | }
|
| 2139 | }
|
| 2140 | else
|
| 2141 | {
|
| 2142 | /* set interface speed */
|
| 2143 | mmc_return = mmc_boot_adjust_interface_speed( host, card );
|
| 2144 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 2145 | {
|
| 2146 | dprintf(CRITICAL, "Error No.%d: Error adjusting interface speed!\n",
|
| 2147 | mmc_return );
|
| 2148 | return mmc_return;
|
| 2149 | }
|
| 2150 |
|
| 2151 | /* enable wide bus */
|
| 2152 | mmc_return = mmc_boot_set_bus_width( card, MMC_BOOT_BUS_WIDTH_4_BIT );
|
| 2153 | if( mmc_return != MMC_BOOT_E_SUCCESS )
|
| 2154 | {
|
| 2155 | dprintf(CRITICAL, "Error No.%d: Failure to set wide bus for Card(RCA:%x)\n",
|
| 2156 | mmc_return, card->rca );
|
| 2157 | return mmc_return;
|
| 2158 | }
|
| 2159 | }
|
| 2160 |
|
| 2161 | /* Just checking whether we're in TRAN state after changing speed and bus width */
|
Amol Jadi | 3672fef | 2011-01-24 09:43:50 -0800 | [diff] [blame] | 2162 | mmc_return = mmc_boot_get_card_status(card, 0, &status);
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 2163 | if(mmc_return != MMC_BOOT_E_SUCCESS)
|
| 2164 | {
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2165 | return mmc_return;
|
| 2166 | }
|
| 2167 |
|
Subbaraman Narayanamurthy | 1ea479e | 2010-10-08 14:54:16 -0700 | [diff] [blame] | 2168 | if(MMC_BOOT_CARD_STATUS(status) != MMC_BOOT_TRAN_STATE)
|
| 2169 | return MMC_BOOT_E_FAILURE;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2170 |
|
| 2171 | return MMC_BOOT_E_SUCCESS;
|
| 2172 | }
|
| 2173 |
|
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2174 | |
Greg Grisco | d625055 | 2011-06-29 14:40:23 -0700 | [diff] [blame] | 2175 | void mmc_display_ext_csd(void)
|
| 2176 | {
|
| 2177 | dprintf(SPEW, "part_config: %x\n", ext_csd_buf[179] );
|
| 2178 | dprintf(SPEW, "erase_group_def: %x\n", ext_csd_buf[175] );
|
| 2179 | dprintf(SPEW, "user_wp: %x\n", ext_csd_buf[171] );
|
| 2180 | }
|
| 2181 | |
| 2182 | |
| 2183 | |
| 2184 | void mmc_display_csd(void)
|
| 2185 | {
|
| 2186 | dprintf(SPEW, "erase_grpsize: %d\n", mmc_card.csd.erase_grp_size );
|
| 2187 | dprintf(SPEW, "erase_grpmult: %d\n", mmc_card.csd.erase_grp_mult );
|
| 2188 | dprintf(SPEW, "wp_grpsize: %d\n", mmc_card.csd.wp_grp_size );
|
| 2189 | dprintf(SPEW, "wp_grpen: %d\n", mmc_card.csd.wp_grp_enable );
|
| 2190 | dprintf(SPEW, "perm_wp: %d\n", mmc_card.csd.perm_wp );
|
| 2191 | dprintf(SPEW, "temp_wp: %d\n", mmc_card.csd.temp_wp );
|
| 2192 | }
|
| 2193 | |
| 2194 | |
| 2195 | |
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2196 | /*
|
| 2197 | * Entry point to MMC boot process
|
| 2198 | */
|
Subbaraman Narayanamurthy | 4b43c35 | 2010-09-24 13:20:52 -0700 | [diff] [blame] | 2199 | unsigned int mmc_boot_main(unsigned char slot, unsigned int base)
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2200 | {
|
| 2201 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2202 |
|
| 2203 | memset( (struct mmc_boot_host*)&mmc_host, 0, sizeof( struct mmc_boot_host ) );
|
| 2204 | memset( (struct mmc_boot_card*)&mmc_card, 0, sizeof(struct mmc_boot_card) );
|
| 2205 |
|
Subbaraman Narayanamurthy | 4b43c35 | 2010-09-24 13:20:52 -0700 | [diff] [blame] | 2206 | mmc_slot = slot;
|
| 2207 | mmc_boot_mci_base = base;
|
| 2208 |
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2209 | /* Initialize necessary data structure and enable/set clock and power */
|
Ajay Dudani | b06c05f | 2011-05-12 14:46:10 -0700 | [diff] [blame] | 2210 | dprintf(SPEW," Initializing MMC host data structure and clock!\n" );
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2211 | mmc_ret = mmc_boot_init( &mmc_host );
|
| 2212 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2213 | {
|
| 2214 | dprintf(CRITICAL, "MMC Boot: Error Initializing MMC Card!!!\n" );
|
| 2215 | return MMC_BOOT_E_FAILURE;
|
| 2216 | }
|
| 2217 |
|
| 2218 | /* Initialize and identify cards connected to host */
|
| 2219 | mmc_ret = mmc_boot_init_and_identify_cards( &mmc_host, &mmc_card );
|
| 2220 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2221 | {
|
Subbaraman Narayanamurthy | 7c67410 | 2011-03-01 19:41:18 -0800 | [diff] [blame] | 2222 | dprintf(CRITICAL, "MMC Boot: Failed detecting MMC/SDC @ slot%d\n",slot);
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2223 | return MMC_BOOT_E_FAILURE;
|
| 2224 | }
|
| 2225 |
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 2226 | mmc_display_csd();
|
| 2227 | mmc_display_ext_csd();
|
| 2228 |
|
Kinson Chik | f1a4351 | 2011-07-14 11:28:39 -0700 | [diff] [blame] | 2229 | mmc_ret = partition_read_table(&mmc_host, &mmc_card); |
| 2230 | return mmc_ret;
|
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2231 | }
|
| 2232 |
|
| 2233 | /*
|
| 2234 | * MMC write function
|
| 2235 | */
|
| 2236 | unsigned int mmc_write (unsigned long long data_addr, unsigned int data_len, unsigned int* in)
|
| 2237 | {
|
| 2238 | int val = 0;
|
| 2239 | unsigned int write_size = ((unsigned)(0xFFFFFF/512))*512;
|
| 2240 | unsigned offset = 0;
|
| 2241 | unsigned int *sptr = in;
|
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2242 | |
Subbaraman Narayanamurthy | c95b5b1 | 2010-08-31 13:19:48 -0700 | [diff] [blame] | 2243 | if(data_len % 512)
|
| 2244 | data_len = ROUND_TO_PAGE(data_len, 511);
|
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2245 | |
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2246 | while(data_len > write_size)
|
| 2247 | {
|
| 2248 | val = mmc_boot_write_to_card( &mmc_host, &mmc_card, \
|
| 2249 | data_addr + offset, \
|
| 2250 | write_size, sptr);
|
| 2251 | if(val)
|
| 2252 | {
|
| 2253 | return val;
|
| 2254 | }
|
| 2255 |
|
| 2256 | sptr += (write_size/sizeof(unsigned));
|
| 2257 | offset += write_size;
|
| 2258 | data_len -= write_size;
|
| 2259 | }
|
| 2260 | if (data_len)
|
| 2261 | {
|
| 2262 | val = mmc_boot_write_to_card( &mmc_host, &mmc_card, \
|
| 2263 | data_addr + offset, \
|
| 2264 | data_len, sptr);
|
| 2265 | }
|
| 2266 | return val;
|
| 2267 | }
|
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2268 | |
| 2269 | |
| 2270 | |
| 2271 | |
| 2272 | unsigned int mmc_write_mbr_in_blocks(unsigned size, unsigned char *mbrImage) |
| 2273 | { |
| 2274 | unsigned int dtype; |
| 2275 | unsigned int dfirstsec; |
| 2276 | unsigned int ebrSectorOffset; |
| 2277 | unsigned char *ebrImage; |
| 2278 | unsigned char *lastAddress; |
| 2279 | int idx, i; |
| 2280 | unsigned int ret; |
| 2281 | |
| 2282 | /* Write the first block */ |
| 2283 | ret = mmc_write(0, MMC_BOOT_RD_BLOCK_LEN, (unsigned int *) mbrImage); |
| 2284 | if (ret) |
| 2285 | { |
| 2286 | dprintf(CRITICAL, "Failed to write mbr partition\n"); |
| 2287 | goto end; |
| 2288 | } |
| 2289 | dprintf(SPEW, "write of first MBR block ok\n"); |
| 2290 | /* |
| 2291 | Loop through the MBR table to see if there is an EBR. |
| 2292 | If found, then figure out where to write the first EBR |
| 2293 | */ |
| 2294 | idx = TABLE_ENTRY_0; |
| 2295 | for (i = 0; i < 4; i++) |
| 2296 | { |
| 2297 | dtype = mbrImage[idx + i * TABLE_ENTRY_SIZE + OFFSET_TYPE]; |
Kinson Chik | f1a4351 | 2011-07-14 11:28:39 -0700 | [diff] [blame] | 2298 | if (MBR_EBR_TYPE == dtype) |
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2299 | { |
| 2300 | dprintf(SPEW, "EBR found.\n"); |
| 2301 | break; |
| 2302 | } |
| 2303 | } |
Kinson Chik | f1a4351 | 2011-07-14 11:28:39 -0700 | [diff] [blame] | 2304 | if (MBR_EBR_TYPE != dtype) |
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2305 | { |
| 2306 | dprintf(SPEW, "No EBR in this image\n"); |
| 2307 | goto end; |
| 2308 | } |
| 2309 | /* EBR exists. Write each EBR block to mmc */ |
| 2310 | ebrImage = mbrImage + MMC_BOOT_RD_BLOCK_LEN; |
| 2311 | ebrSectorOffset= GET_LWORD_FROM_BYTE(&mbrImage[idx + i * TABLE_ENTRY_SIZE + OFFSET_FIRST_SEC]); |
| 2312 | dfirstsec = 0; |
| 2313 | dprintf(SPEW, "first EBR to be written at sector 0x%X\n", dfirstsec); |
| 2314 | lastAddress = mbrImage + size; |
| 2315 | while (ebrImage < lastAddress) |
| 2316 | { |
| 2317 | dprintf(SPEW, "writing to 0x%X\n", (ebrSectorOffset + dfirstsec) * MMC_BOOT_RD_BLOCK_LEN); |
| 2318 | ret = mmc_write((ebrSectorOffset + dfirstsec) * MMC_BOOT_RD_BLOCK_LEN, |
| 2319 | MMC_BOOT_RD_BLOCK_LEN, (unsigned int *) ebrImage); |
| 2320 | if (ret) |
| 2321 | { |
| 2322 | dprintf(CRITICAL, "Failed to write EBR block to sector 0x%X", dfirstsec); |
| 2323 | goto end; |
| 2324 | } |
| 2325 | dfirstsec = GET_LWORD_FROM_BYTE(&ebrImage[TABLE_ENTRY_1 + OFFSET_FIRST_SEC]); |
| 2326 | ebrImage += MMC_BOOT_RD_BLOCK_LEN; |
| 2327 | } |
| 2328 | dprintf(INFO, "MBR written to mmc successfully"); |
| 2329 | end: |
| 2330 | return ret; |
| 2331 | } |
| 2332 | |
| 2333 | |
| 2334 | |
| 2335 | /* Write the MBR/EBR to the MMC. */ |
| 2336 | unsigned int mmc_write_mbr(unsigned size, unsigned char *mbrImage) |
| 2337 | { |
| 2338 | unsigned int ret; |
| 2339 | |
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2340 | /* Verify that passed in block is a valid MBR */ |
Kinson Chik | f1a4351 | 2011-07-14 11:28:39 -0700 | [diff] [blame] | 2341 | ret = partition_verify_mbr_signature(size, mbrImage); |
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2342 | if (ret) |
| 2343 | { |
| 2344 | goto end; |
| 2345 | } |
| 2346 | |
| 2347 | /* Write the MBR/EBR to mmc */ |
| 2348 | ret = mmc_write_mbr_in_blocks(size, mbrImage); |
| 2349 | if (ret) |
| 2350 | { |
| 2351 | dprintf(CRITICAL, "Failed to write MBR block to mmc.\n" ); |
| 2352 | goto end; |
| 2353 | } |
| 2354 | /* Re-read the MBR partition into mbr table */ |
Kinson Chik | f1a4351 | 2011-07-14 11:28:39 -0700 | [diff] [blame] | 2355 | ret = mmc_boot_read_mbr( &mmc_host, &mmc_card ); |
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2356 | if (ret) |
| 2357 | { |
| 2358 | dprintf(CRITICAL, "Failed to re-read mbr partition.\n"); |
| 2359 | goto end; |
| 2360 | } |
Kinson Chik | f1a4351 | 2011-07-14 11:28:39 -0700 | [diff] [blame] | 2361 | partition_dump(); |
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2362 | end: |
| 2363 | return ret; |
| 2364 | } |
| 2365 | |
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2366 | unsigned int mmc_write_partition(unsigned size, unsigned char* partition) |
| 2367 | { |
| 2368 | unsigned int ret = MMC_BOOT_E_INVAL; |
| 2369 | unsigned int partition_type; |
| 2370 | |
| 2371 | if (partition == 0) |
| 2372 | { |
| 2373 | dprintf(CRITICAL, "NULL partition\n"); |
| 2374 | goto end; |
| 2375 | } |
Kinson Chik | f1a4351 | 2011-07-14 11:28:39 -0700 | [diff] [blame] | 2376 | ret = partition_get_type(size, partition, &partition_type); |
Greg Grisco | 6e75477 | 2011-06-23 12:19:39 -0700 | [diff] [blame] | 2377 | if (ret != MMC_BOOT_E_SUCCESS) |
| 2378 | { |
| 2379 | goto end; |
| 2380 | } |
| 2381 | switch (partition_type) |
| 2382 | { |
| 2383 | case PARTITION_TYPE_MBR: |
| 2384 | dprintf(INFO, "Writing MBR partition\n"); |
| 2385 | ret = mmc_write_mbr(size, partition); |
| 2386 | break; |
| 2387 | case PARTITION_TYPE_GPT: |
| 2388 | dprintf(INFO, "Writing GPT partition\n"); |
| 2389 | dprintf(CRITICAL, "Flash of GPT not implemented\n"); |
| 2390 | ret = MMC_BOOT_E_INVAL; |
| 2391 | break; |
| 2392 | case PARTITION_TYPE_GPT_BACKUP: |
| 2393 | dprintf(INFO, "Writing GPT backup partition\n"); |
| 2394 | dprintf(CRITICAL, "Flash of GPT backup not implemented\n"); |
| 2395 | ret = MMC_BOOT_E_INVAL; |
| 2396 | break; |
| 2397 | default: |
| 2398 | dprintf(CRITICAL, "Invalid partition\n"); |
| 2399 | ret = MMC_BOOT_E_INVAL; |
| 2400 | goto end; |
| 2401 | } |
| 2402 | end: |
| 2403 | return ret; |
| 2404 | } |
| 2405 | |
Shashank Mittal | 52525ff | 2010-04-13 11:11:10 -0700 | [diff] [blame] | 2406 | /*
|
| 2407 | * MMC read function
|
| 2408 | */
|
| 2409 | unsigned int mmc_read (unsigned long long data_addr, unsigned int* out, unsigned int data_len)
|
| 2410 | {
|
| 2411 | int val = 0;
|
| 2412 | val = mmc_boot_read_from_card( &mmc_host, &mmc_card, data_addr, data_len, out);
|
| 2413 | return val;
|
| 2414 | }
|
| 2415 |
|
| 2416 | /*
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 2417 | * Function to read registers from MMC or SD card
|
| 2418 | */
|
| 2419 | static unsigned int mmc_boot_read_reg(struct mmc_boot_card *card,
|
| 2420 | unsigned int data_len,
|
| 2421 | unsigned int command, unsigned int addr,
|
| 2422 | unsigned int *out)
|
| 2423 | {
|
| 2424 | struct mmc_boot_command cmd;
|
| 2425 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 2426 | unsigned int mmc_reg = 0;
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 2427 |
|
| 2428 | /* Set the FLOW_ENA bit of MCI_CLK register to 1 */
|
| 2429 | mmc_reg = readl( MMC_BOOT_MCI_CLK );
|
| 2430 | mmc_reg |= MMC_BOOT_MCI_CLK_ENA_FLOW ;
|
| 2431 | writel( mmc_reg, MMC_BOOT_MCI_CLK );
|
| 2432 |
|
| 2433 | /* Write data timeout period to MCI_DATA_TIMER register. */
|
| 2434 | /* Data timeout period should be in card bus clock periods */
|
| 2435 | mmc_reg =0xFFFFFFFF;
|
| 2436 | writel( mmc_reg, MMC_BOOT_MCI_DATA_TIMER );
|
| 2437 | writel( data_len, MMC_BOOT_MCI_DATA_LENGTH );
|
| 2438 |
|
| 2439 | /* Set appropriate fields and write the MCI_DATA_CTL register. */
|
| 2440 | /* Set ENABLE bit to 1 to enable the data transfer. */
|
| 2441 | mmc_reg = MMC_BOOT_MCI_DATA_ENABLE | MMC_BOOT_MCI_DATA_DIR | (data_len << MMC_BOOT_MCI_BLKSIZE_POS);
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 2442 |
|
| 2443 | #if MMC_BOOT_ADM
|
| 2444 | mmc_reg |= MMC_BOOT_MCI_DATA_DM_ENABLE;
|
| 2445 | #endif
|
| 2446 |
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 2447 | writel( mmc_reg, MMC_BOOT_MCI_DATA_CTL );
|
| 2448 |
|
| 2449 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 2450 | sizeof(struct mmc_boot_command) );
|
| 2451 |
|
| 2452 | cmd.cmd_index = command;
|
| 2453 | cmd.argument = addr;
|
| 2454 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 2455 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 2456 |
|
| 2457 | /* send command */
|
| 2458 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 2459 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2460 | {
|
| 2461 | return mmc_ret;
|
| 2462 | }
|
| 2463 |
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 2464 | /* Read the transfer data from SDCC FIFO. */
|
| 2465 | mmc_ret = mmc_boot_fifo_data_transfer(out, data_len, MMC_BOOT_DATA_READ);
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 2466 |
|
| 2467 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2468 | {
|
| 2469 | dprintf(CRITICAL, "Error No.%d: Failure on data transfer from the \
|
| 2470 | Card(RCA:%x)\n", mmc_ret, card->rca );
|
| 2471 | return mmc_ret;
|
| 2472 | }
|
| 2473 |
|
| 2474 | return MMC_BOOT_E_SUCCESS;
|
| 2475 | }
|
| 2476 |
|
| 2477 | /*
|
| 2478 | * Function to set/clear power-on write protection for the user area partitions
|
| 2479 | */
|
| 2480 | static unsigned int mmc_boot_set_clr_power_on_wp_user(struct mmc_boot_card* card,
|
| 2481 | unsigned int addr,
|
| 2482 | unsigned int size,
|
| 2483 | unsigned char set_clear_wp)
|
| 2484 | {
|
| 2485 | struct mmc_boot_command cmd;
|
| 2486 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2487 | unsigned int wp_group_size, loop_count;
|
| 2488 | unsigned int status;
|
| 2489 |
|
| 2490 | memset( (struct mmc_boot_command *)&cmd, 0,
|
| 2491 | sizeof(struct mmc_boot_command) );
|
| 2492 |
|
| 2493 | /* Disabling PERM_WP for USER AREA (CMD6) */
|
| 2494 | mmc_ret = mmc_boot_switch_cmd(card, MMC_BOOT_ACCESS_WRITE,
|
| 2495 | MMC_BOOT_EXT_USER_WP,
|
| 2496 | MMC_BOOT_US_PERM_WP_DIS);
|
| 2497 |
|
| 2498 | if(mmc_ret != MMC_BOOT_E_SUCCESS)
|
| 2499 | {
|
| 2500 | return mmc_ret;
|
| 2501 | }
|
| 2502 |
|
| 2503 | /* Sending CMD13 to check card status */
|
| 2504 | do
|
| 2505 | {
|
| 2506 | mmc_ret = mmc_boot_get_card_status( card, 0 ,&status);
|
| 2507 | if(MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_TRAN_STATE)
|
| 2508 | break;
|
| 2509 | } while( (mmc_ret == MMC_BOOT_E_SUCCESS) &&
|
| 2510 | (MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_PROG_STATE));
|
| 2511 |
|
| 2512 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2513 | {
|
| 2514 | return mmc_ret;
|
| 2515 | }
|
| 2516 |
|
| 2517 | mmc_ret = mmc_boot_send_ext_cmd (card,ext_csd_buf);
|
| 2518 |
|
| 2519 | if(mmc_ret != MMC_BOOT_E_SUCCESS)
|
| 2520 | {
|
| 2521 | return mmc_ret;
|
| 2522 | }
|
| 2523 |
|
| 2524 | /* Make sure power-on write protection for user area is not disabled
|
| 2525 | and permanent write protection for user area is not enabled */
|
| 2526 |
|
| 2527 | if((IS_BIT_SET_EXT_CSD(MMC_BOOT_EXT_USER_WP, MMC_BOOT_US_PERM_WP_EN)) ||
|
| 2528 | (IS_BIT_SET_EXT_CSD(MMC_BOOT_EXT_USER_WP, MMC_BOOT_US_PWR_WP_DIS)))
|
| 2529 | {
|
| 2530 | return MMC_BOOT_E_FAILURE;
|
| 2531 | }
|
| 2532 |
|
| 2533 | if(ext_csd_buf[MMC_BOOT_EXT_ERASE_GROUP_DEF])
|
| 2534 | {
|
| 2535 | /* wp_group_size = 512KB * HC_WP_GRP_SIZE * HC_ERASE_GRP_SIZE.
|
| 2536 | Getting write protect group size in sectors here. */
|
| 2537 |
|
| 2538 | wp_group_size = (512*1024) * ext_csd_buf[MMC_BOOT_EXT_HC_WP_GRP_SIZE] *
|
| 2539 | ext_csd_buf[MMC_BOOT_EXT_HC_ERASE_GRP_SIZE] /
|
| 2540 | MMC_BOOT_WR_BLOCK_LEN;
|
| 2541 | }
|
| 2542 | else
|
| 2543 | {
|
| 2544 | /* wp_group_size = (WP_GRP_SIZE + 1) * (ERASE_GRP_SIZE + 1)
|
| 2545 | * (ERASE_GRP_MULT + 1).
|
| 2546 | This is defined as the number of write blocks directly */
|
| 2547 |
|
| 2548 | wp_group_size = (card->csd.erase_grp_size + 1) *
|
| 2549 | (card->csd.erase_grp_mult + 1) *
|
| 2550 | (card->csd.wp_grp_size + 1);
|
| 2551 | }
|
| 2552 |
|
| 2553 | if(wp_group_size == 0)
|
| 2554 | {
|
| 2555 | return MMC_BOOT_E_FAILURE;
|
| 2556 | }
|
| 2557 |
|
| 2558 | /* Setting POWER_ON_WP for USER AREA (CMD6) */
|
| 2559 |
|
| 2560 | mmc_ret = mmc_boot_switch_cmd(card, MMC_BOOT_ACCESS_WRITE,
|
| 2561 | MMC_BOOT_EXT_USER_WP,
|
| 2562 | MMC_BOOT_US_PWR_WP_EN);
|
| 2563 |
|
| 2564 | if(mmc_ret != MMC_BOOT_E_SUCCESS)
|
| 2565 | {
|
| 2566 | return mmc_ret;
|
| 2567 | }
|
| 2568 |
|
| 2569 | /* Sending CMD13 to check card status */
|
| 2570 | do
|
| 2571 | {
|
| 2572 | mmc_ret = mmc_boot_get_card_status( card, 0 ,&status);
|
| 2573 | if(MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_TRAN_STATE)
|
| 2574 | break;
|
| 2575 | } while( (mmc_ret == MMC_BOOT_E_SUCCESS) &&
|
| 2576 | (MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_PROG_STATE));
|
| 2577 |
|
| 2578 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2579 | {
|
| 2580 | return mmc_ret;
|
| 2581 | }
|
| 2582 |
|
| 2583 | /* Calculating the loop count for sending SET_WRITE_PROTECT (CMD28)
|
| 2584 | or CLEAR_WRITE_PROTECT (CMD29).
|
| 2585 | We are write protecting the partitions in blocks of write protect
|
| 2586 | group sizes only */
|
| 2587 |
|
| 2588 | if(size % wp_group_size)
|
| 2589 | {
|
| 2590 | loop_count = (size / wp_group_size) + 1;
|
| 2591 | }
|
| 2592 | else
|
| 2593 | {
|
| 2594 | loop_count = (size / wp_group_size);
|
| 2595 | }
|
| 2596 |
|
| 2597 | if(set_clear_wp)
|
| 2598 | cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
|
| 2599 | else
|
| 2600 | cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
|
| 2601 |
|
| 2602 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 2603 | cmd.resp_type = MMC_BOOT_RESP_R1B;
|
| 2604 |
|
Greg Grisco | d625055 | 2011-06-29 14:40:23 -0700 | [diff] [blame] | 2605 | for (unsigned int i = 0; i < loop_count; i++)
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 2606 | {
|
| 2607 | /* Sending CMD28 for each WP group size
|
| 2608 | address is in sectors already */
|
| 2609 | cmd.argument = (addr + (i * wp_group_size));
|
| 2610 |
|
| 2611 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 2612 |
|
| 2613 | if(mmc_ret != MMC_BOOT_E_SUCCESS)
|
| 2614 | {
|
| 2615 | return mmc_ret;
|
| 2616 | }
|
| 2617 |
|
| 2618 | /* Checking ADDR_OUT_OF_RANGE error in CMD28 response */
|
| 2619 | if(IS_ADDR_OUT_OF_RANGE(cmd.resp[0]))
|
| 2620 | {
|
| 2621 | return MMC_BOOT_E_FAILURE;
|
| 2622 | }
|
| 2623 |
|
| 2624 | /* Sending CMD13 to check card status */
|
| 2625 | do
|
| 2626 | {
|
| 2627 | mmc_ret = mmc_boot_get_card_status( card, 0 ,&status);
|
| 2628 | if(MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_TRAN_STATE)
|
| 2629 | break;
|
| 2630 | } while( (mmc_ret == MMC_BOOT_E_SUCCESS) &&
|
| 2631 | (MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_PROG_STATE));
|
| 2632 |
|
| 2633 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2634 | {
|
| 2635 | return mmc_ret;
|
| 2636 | }
|
| 2637 | }
|
| 2638 |
|
| 2639 | return MMC_BOOT_E_SUCCESS;
|
| 2640 | }
|
| 2641 |
|
| 2642 | /*
|
| 2643 | * Function to get Write Protect status of the given sector
|
| 2644 | */
|
| 2645 | static unsigned int mmc_boot_get_wp_status (struct mmc_boot_card* card,
|
| 2646 | unsigned int sector)
|
| 2647 | {
|
| 2648 | unsigned int rc = MMC_BOOT_E_SUCCESS;
|
Greg Grisco | d625055 | 2011-06-29 14:40:23 -0700 | [diff] [blame] | 2649 | memset(wp_status_buf, 0, 8);
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 2650 |
|
Amol Jadi | 2dfe339 | 2011-07-19 16:03:37 -0700 | [diff] [blame] | 2651 | rc = mmc_boot_read_reg(card, 8, CMD31_SEND_WRITE_PROT_TYPE, sector, |
Greg Grisco | d625055 | 2011-06-29 14:40:23 -0700 | [diff] [blame] | 2652 | (unsigned int *) wp_status_buf);
|
Subbaraman Narayanamurthy | e9f077b | 2010-10-20 17:08:17 -0700 | [diff] [blame] | 2653 |
|
| 2654 | return rc;
|
| 2655 | }
|
| 2656 |
|
| 2657 | /*
|
| 2658 | * Test Function for setting Write protect for given sector
|
| 2659 | */
|
| 2660 | static unsigned int mmc_wp(unsigned int sector, unsigned int size,
|
| 2661 | unsigned char set_clear_wp)
|
| 2662 | {
|
| 2663 | unsigned int rc = MMC_BOOT_E_SUCCESS;
|
| 2664 |
|
| 2665 | /* Checking whether group write protection feature is available */
|
| 2666 | if(mmc_card.csd.wp_grp_enable)
|
| 2667 | {
|
| 2668 | rc = mmc_boot_get_wp_status(&mmc_card,sector);
|
| 2669 | rc = mmc_boot_set_clr_power_on_wp_user(&mmc_card,sector,size,set_clear_wp);
|
| 2670 | rc = mmc_boot_get_wp_status(&mmc_card,sector);
|
| 2671 | return rc;
|
| 2672 | }
|
| 2673 | else
|
| 2674 | return MMC_BOOT_E_FAILURE;
|
| 2675 | }
|
| 2676 |
|
| 2677 | void mmc_wp_test(void)
|
| 2678 | {
|
| 2679 | unsigned int mmc_ret=0;
|
| 2680 | mmc_ret = mmc_wp(0xE06000,0x5000,1);
|
| 2681 | }
|
| 2682 |
|
Subbaraman Narayanamurthy | f17b4ae | 2011-02-16 20:19:56 -0800 | [diff] [blame] | 2683 |
|
| 2684 | unsigned mmc_get_psn(void)
|
| 2685 | {
|
| 2686 | return mmc_card.cid.psn;
|
Amol Jadi | 84a546a | 2011-03-02 12:09:11 -0800 | [diff] [blame] | 2687 | } |
| 2688 | |
| 2689 | /*
|
| 2690 | * Read/write data from/to SDC FIFO.
|
| 2691 | */
|
| 2692 | static unsigned int mmc_boot_fifo_data_transfer(unsigned int* data_ptr,
|
| 2693 | unsigned int data_len,
|
| 2694 | unsigned char direction)
|
| 2695 | {
|
| 2696 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2697 |
|
| 2698 | #if MMC_BOOT_ADM
|
| 2699 | adm_result_t ret;
|
| 2700 | adm_dir_t adm_dir;
|
| 2701 |
|
| 2702 | if(direction == MMC_BOOT_DATA_READ)
|
| 2703 | {
|
| 2704 | adm_dir = ADM_MMC_READ;
|
| 2705 | }
|
| 2706 | else
|
| 2707 | {
|
| 2708 | adm_dir = ADM_MMC_WRITE;
|
| 2709 | }
|
| 2710 |
|
| 2711 | ret = adm_transfer_mmc_data(mmc_slot,
|
| 2712 | (unsigned char*) data_ptr,
|
| 2713 | data_len,
|
| 2714 | adm_dir);
|
| 2715 |
|
| 2716 | if(ret != ADM_RESULT_SUCCESS)
|
| 2717 | {
|
| 2718 | dprintf(CRITICAL, "MMC ADM transfer error: %d\n", ret);
|
| 2719 | mmc_ret = MMC_BOOT_E_FAILURE;
|
| 2720 | }
|
| 2721 | #else
|
| 2722 |
|
| 2723 | if(direction == MMC_BOOT_DATA_READ)
|
| 2724 | {
|
| 2725 | mmc_ret = mmc_boot_fifo_read(data_ptr, data_len);
|
| 2726 | }
|
| 2727 | else
|
| 2728 | {
|
| 2729 | mmc_ret = mmc_boot_fifo_write(data_ptr, data_len);
|
| 2730 | }
|
| 2731 | #endif
|
| 2732 | return mmc_ret;
|
| 2733 | }
|
| 2734 |
|
| 2735 | /*
|
| 2736 | * Read data to SDC FIFO.
|
| 2737 | */
|
| 2738 | static unsigned int mmc_boot_fifo_read(unsigned int* mmc_ptr,
|
| 2739 | unsigned int data_len)
|
| 2740 | {
|
| 2741 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2742 | unsigned int mmc_status = 0;
|
| 2743 | unsigned int mmc_count = 0;
|
| 2744 | unsigned int read_error = MMC_BOOT_MCI_STAT_DATA_CRC_FAIL | \
|
| 2745 | MMC_BOOT_MCI_STAT_DATA_TIMEOUT | \
|
| 2746 | MMC_BOOT_MCI_STAT_RX_OVRRUN;
|
| 2747 |
|
| 2748 |
|
| 2749 | /* Read the data from the MCI_FIFO register as long as RXDATA_AVLBL
|
| 2750 | bit of MCI_STATUS register is set to 1 and bits DATA_CRC_FAIL,
|
| 2751 | DATA_TIMEOUT, RX_OVERRUN of MCI_STATUS register are cleared to 0.
|
| 2752 | Continue the reads until the whole transfer data is received */
|
| 2753 |
|
| 2754 | do
|
| 2755 | {
|
| 2756 | mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2757 | mmc_status = readl( MMC_BOOT_MCI_STATUS );
|
| 2758 |
|
| 2759 | if( mmc_status & read_error )
|
| 2760 | {
|
| 2761 | mmc_ret = mmc_boot_status_error(mmc_status);
|
| 2762 | break;
|
| 2763 | }
|
| 2764 |
|
| 2765 | if( mmc_status & MMC_BOOT_MCI_STAT_RX_DATA_AVLBL )
|
| 2766 | {
|
| 2767 | unsigned read_count = 1;
|
| 2768 | if ( mmc_status & MMC_BOOT_MCI_STAT_RX_FIFO_HFULL)
|
| 2769 | {
|
| 2770 | read_count = MMC_BOOT_MCI_HFIFO_COUNT;
|
| 2771 | }
|
| 2772 |
|
| 2773 | for (unsigned int i=0; i<read_count; i++)
|
| 2774 | {
|
| 2775 | /* FIFO contains 16 32-bit data buffer on 16 sequential addresses*/
|
| 2776 | *mmc_ptr = readl( MMC_BOOT_MCI_FIFO +
|
| 2777 | ( mmc_count % MMC_BOOT_MCI_FIFO_SIZE ) );
|
| 2778 | mmc_ptr++;
|
| 2779 | /* increase mmc_count by word size */
|
| 2780 | mmc_count += sizeof( unsigned int );
|
| 2781 | }
|
| 2782 | /* quit if we have read enough of data */
|
| 2783 | if (mmc_count == data_len)
|
| 2784 | break;
|
| 2785 | }
|
| 2786 | else if( mmc_status & MMC_BOOT_MCI_STAT_DATA_END )
|
| 2787 | {
|
| 2788 | break;
|
| 2789 | }
|
| 2790 | }while(1);
|
| 2791 |
|
| 2792 | return mmc_ret;
|
| 2793 | }
|
| 2794 |
|
| 2795 | /*
|
| 2796 | * Write data to SDC FIFO.
|
| 2797 | */
|
| 2798 | static unsigned int mmc_boot_fifo_write(unsigned int* mmc_ptr,
|
| 2799 | unsigned int data_len)
|
| 2800 | {
|
| 2801 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2802 | unsigned int mmc_status = 0;
|
| 2803 | unsigned int mmc_count = 0;
|
| 2804 | unsigned int write_error = MMC_BOOT_MCI_STAT_DATA_CRC_FAIL | \
|
| 2805 | MMC_BOOT_MCI_STAT_DATA_TIMEOUT | \
|
| 2806 | MMC_BOOT_MCI_STAT_TX_UNDRUN;
|
| 2807 |
|
| 2808 |
|
| 2809 | /* Write the transfer data to SDCC3 FIFO */
|
| 2810 | do
|
| 2811 | {
|
| 2812 | mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2813 | mmc_status = readl( MMC_BOOT_MCI_STATUS );
|
| 2814 |
|
| 2815 | if( mmc_status & write_error )
|
| 2816 | {
|
| 2817 | mmc_ret = mmc_boot_status_error(mmc_status);
|
| 2818 | break;
|
| 2819 | }
|
| 2820 |
|
| 2821 | /* Write the data in MCI_FIFO register as long as TXFIFO_FULL bit of
|
| 2822 | MCI_STATUS register is 0. Continue the writes until the whole
|
| 2823 | transfer data is written. */
|
| 2824 | if (((data_len-mmc_count) >= MMC_BOOT_MCI_FIFO_SIZE/2) &&
|
| 2825 | ( mmc_status & MMC_BOOT_MCI_STAT_TX_FIFO_HFULL ))
|
| 2826 | {
|
| 2827 | for (int i=0; i < MMC_BOOT_MCI_HFIFO_COUNT; i++ )
|
| 2828 | {
|
| 2829 | /* FIFO contains 16 32-bit data buffer on 16 sequential addresses*/
|
| 2830 | writel( *mmc_ptr, MMC_BOOT_MCI_FIFO +
|
| 2831 | ( mmc_count % MMC_BOOT_MCI_FIFO_SIZE ) );
|
| 2832 | mmc_ptr++;
|
| 2833 | /* increase mmc_count by word size */
|
| 2834 | mmc_count += sizeof( unsigned int );
|
| 2835 | }
|
| 2836 |
|
| 2837 | }
|
| 2838 | else if( !( mmc_status & MMC_BOOT_MCI_STAT_TX_FIFO_FULL ) && (mmc_count != data_len))
|
| 2839 | {
|
| 2840 | /* FIFO contains 16 32-bit data buffer on 16 sequential addresses*/
|
| 2841 | writel( *mmc_ptr, MMC_BOOT_MCI_FIFO +
|
| 2842 | ( mmc_count % MMC_BOOT_MCI_FIFO_SIZE ) );
|
| 2843 | mmc_ptr++;
|
| 2844 | /* increase mmc_count by word size */
|
| 2845 | mmc_count += sizeof( unsigned int );
|
| 2846 | }
|
| 2847 | else if((mmc_status & MMC_BOOT_MCI_STAT_DATA_END))
|
| 2848 | {
|
| 2849 | break; //success
|
| 2850 | }
|
| 2851 |
|
| 2852 | } while(1);
|
| 2853 | return mmc_ret;
|
Subbaraman Narayanamurthy | f17b4ae | 2011-02-16 20:19:56 -0800 | [diff] [blame] | 2854 | }
|
Neeti Desai | ca8c960 | 2011-10-06 11:40:00 -0700 | [diff] [blame^] | 2855 |
|
| 2856 | /*
|
| 2857 | * CMD35_ERASE_GROUP_START
|
| 2858 | */
|
| 2859 |
|
| 2860 | static unsigned int mmc_boot_send_erase_group_start(struct mmc_boot_card* card,
|
| 2861 | unsigned long long data_addr )
|
| 2862 | {
|
| 2863 | struct mmc_boot_command cmd;
|
| 2864 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2865 |
|
| 2866 | if( card == NULL)
|
| 2867 | return MMC_BOOT_E_INVAL;
|
| 2868 |
|
| 2869 | memset((struct mmc_boot_command *)&cmd, 0,
|
| 2870 | sizeof(struct mmc_boot_command));
|
| 2871 |
|
| 2872 | cmd.cmd_index = CMD35_ERASE_GROUP_START;
|
| 2873 | cmd.argument = data_addr;
|
| 2874 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 2875 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 2876 |
|
| 2877 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 2878 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2879 | {
|
| 2880 | return mmc_ret;
|
| 2881 | }
|
| 2882 |
|
| 2883 | /* Checking for address error */
|
| 2884 | if( IS_ADDR_OUT_OF_RANGE(cmd.resp[0]) )
|
| 2885 | {
|
| 2886 | return MMC_BOOT_E_BLOCKLEN_ERR;
|
| 2887 | }
|
| 2888 |
|
| 2889 | return MMC_BOOT_E_SUCCESS;
|
| 2890 |
|
| 2891 | }
|
| 2892 |
|
| 2893 | /*
|
| 2894 | * CMD36 ERASE GROUP END
|
| 2895 | */
|
| 2896 | static unsigned int mmc_boot_send_erase_group_end(struct mmc_boot_card* card,
|
| 2897 | unsigned long long data_addr )
|
| 2898 | {
|
| 2899 | struct mmc_boot_command cmd;
|
| 2900 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2901 |
|
| 2902 | if( card == NULL)
|
| 2903 | return MMC_BOOT_E_INVAL;
|
| 2904 |
|
| 2905 | memset((struct mmc_boot_command *)&cmd, 0,
|
| 2906 | sizeof(struct mmc_boot_command));
|
| 2907 |
|
| 2908 | cmd.cmd_index = CMD36_ERASE_GROUP_END;
|
| 2909 | cmd.argument = data_addr;
|
| 2910 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 2911 | cmd.resp_type = MMC_BOOT_RESP_R1;
|
| 2912 |
|
| 2913 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 2914 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2915 | {
|
| 2916 | return mmc_ret;
|
| 2917 | }
|
| 2918 |
|
| 2919 | /* Checking for address error */
|
| 2920 | if(IS_ADDR_OUT_OF_RANGE(cmd.resp[0]))
|
| 2921 | {
|
| 2922 | return MMC_BOOT_E_BLOCKLEN_ERR;
|
| 2923 | }
|
| 2924 |
|
| 2925 | return MMC_BOOT_E_SUCCESS;
|
| 2926 | }
|
| 2927 |
|
| 2928 | /*
|
| 2929 | * CMD38 ERASE
|
| 2930 | */
|
| 2931 | static unsigned int mmc_boot_send_erase(struct mmc_boot_card* card )
|
| 2932 | {
|
| 2933 |
|
| 2934 | struct mmc_boot_command cmd;
|
| 2935 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2936 | unsigned int status;
|
| 2937 |
|
| 2938 | if( card == NULL)
|
| 2939 | return MMC_BOOT_E_INVAL;
|
| 2940 |
|
| 2941 | memset((struct mmc_boot_command *)&cmd, 0,
|
| 2942 | sizeof(struct mmc_boot_command));
|
| 2943 |
|
| 2944 | cmd.cmd_index = CMD38_ERASE;
|
| 2945 | cmd.argument = 0x00000000;
|
| 2946 | cmd.cmd_type = MMC_BOOT_CMD_ADDRESS;
|
| 2947 | cmd.resp_type = MMC_BOOT_RESP_R1B;
|
| 2948 |
|
| 2949 | /* Checking if the card is in the transfer state */
|
| 2950 | do
|
| 2951 | {
|
| 2952 | mmc_ret = mmc_boot_get_card_status( card, 0 ,&status);
|
| 2953 | if(MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_TRAN_STATE)
|
| 2954 | break;
|
| 2955 | } while( (mmc_ret == MMC_BOOT_E_SUCCESS) &&
|
| 2956 | (MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_PROG_STATE));
|
| 2957 |
|
| 2958 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2959 | {
|
| 2960 | return mmc_ret;
|
| 2961 | }
|
| 2962 | mmc_ret = mmc_boot_send_command( &cmd );
|
| 2963 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2964 | {
|
| 2965 | return mmc_ret;
|
| 2966 | }
|
| 2967 |
|
| 2968 | /* Checking for write protect */
|
| 2969 | if( cmd.resp[0] & MMC_BOOT_R1_WP_ERASE_SKIP )
|
| 2970 | {
|
| 2971 | dprintf(CRITICAL , "Write protect enabled for sector \n");
|
| 2972 | return;
|
| 2973 | }
|
| 2974 |
|
| 2975 | /* Checking if the erase operation for the card is compelete */
|
| 2976 | do
|
| 2977 | {
|
| 2978 | mmc_ret = mmc_boot_get_card_status( card, 0 ,&status);
|
| 2979 | if(MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_TRAN_STATE)
|
| 2980 | break;
|
| 2981 | } while( (mmc_ret == MMC_BOOT_E_SUCCESS) &&
|
| 2982 | (MMC_BOOT_CARD_STATUS(status) == MMC_BOOT_PROG_STATE));
|
| 2983 |
|
| 2984 | if( mmc_ret != MMC_BOOT_E_SUCCESS )
|
| 2985 | {
|
| 2986 | return mmc_ret;
|
| 2987 | }
|
| 2988 |
|
| 2989 | return MMC_BOOT_E_SUCCESS;
|
| 2990 | }
|
| 2991 |
|
| 2992 | /*
|
| 2993 | * Function to erase data on the eMMC card
|
| 2994 | */
|
| 2995 | unsigned int mmc_erase_card ( unsigned long long data_addr, unsigned long long size)
|
| 2996 | {
|
| 2997 | unsigned int mmc_ret = MMC_BOOT_E_SUCCESS;
|
| 2998 | unsigned long long erase_grp_size;
|
| 2999 | unsigned long long data_end = 0x00000000;
|
| 3000 | unsigned long long loop_count;
|
| 3001 |
|
| 3002 | /* Converting size to sectors */
|
| 3003 | size =size /512;
|
| 3004 |
|
| 3005 |
|
| 3006 | if(ext_csd_buf[MMC_BOOT_EXT_ERASE_GROUP_DEF])
|
| 3007 | {
|
| 3008 | erase_grp_size = (512 * ext_csd_buf[MMC_BOOT_EXT_HC_ERASE_GRP_SIZE]* 1024);
|
| 3009 | erase_grp_size = erase_grp_size/512;
|
| 3010 | }
|
| 3011 | else
|
| 3012 | {
|
| 3013 | erase_grp_size = (mmc_card.csd.erase_grp_size + 1) *
|
| 3014 | (mmc_card.csd.erase_grp_mult + 1);
|
| 3015 | }
|
| 3016 | data_addr = ( (mmc_card.type != MMC_BOOT_TYPE_MMCHC) &&
|
| 3017 | (mmc_card.type != MMC_BOOT_TYPE_SDHC) )
|
| 3018 | ? (unsigned int) data_addr :(unsigned int) (data_addr / 512);
|
| 3019 |
|
| 3020 | if( erase_grp_size == 0 )
|
| 3021 | {
|
| 3022 | return MMC_BOOT_E_FAILURE;
|
| 3023 | }
|
| 3024 |
|
| 3025 | if(size % erase_grp_size)
|
| 3026 | {
|
| 3027 | dprintf(CRITICAL, "Overflow beyond ERASE_GROUP_SIZE:%llu \n",
|
| 3028 | (size % erase_grp_size));
|
| 3029 |
|
| 3030 | }
|
| 3031 | loop_count = (size / erase_grp_size);
|
| 3032 | data_end = data_addr + erase_grp_size * (loop_count-1);
|
| 3033 |
|
| 3034 | /* Sending CMD35 */
|
| 3035 | mmc_ret = mmc_boot_send_erase_group_start (&mmc_card , data_addr);
|
| 3036 | if( mmc_ret != MMC_BOOT_E_SUCCESS)
|
| 3037 | {
|
| 3038 | dprintf(CRITICAL, "Error %d: Failure sending erase group start "
|
| 3039 | "command to the card (RCA:%x)\n", mmc_ret, mmc_card.rca);
|
| 3040 | return mmc_ret;
|
| 3041 | }
|
| 3042 |
|
| 3043 | /* Sending CMD36 */
|
| 3044 | mmc_ret = mmc_boot_send_erase_group_end (&mmc_card , data_end - 1);
|
| 3045 | if( mmc_ret != MMC_BOOT_E_SUCCESS)
|
| 3046 | {
|
| 3047 | dprintf(CRITICAL, "Error %d: Failure sending erase group end "
|
| 3048 | "command to the card (RCA:%x)\n", mmc_ret, mmc_card.rca);
|
| 3049 | return mmc_ret;
|
| 3050 | }
|
| 3051 |
|
| 3052 | for( unsigned long long i = 0; i < loop_count ;i++ )
|
| 3053 | {
|
| 3054 | /* Sending CMD38 */
|
| 3055 | mmc_ret = mmc_boot_send_erase (&mmc_card );
|
| 3056 | if( mmc_ret != MMC_BOOT_E_SUCCESS)
|
| 3057 | {
|
| 3058 | dprintf(CRITICAL, "Error %d: Failure sending erase command "
|
| 3059 | "to the card (RCA:%x)\n", mmc_ret, mmc_card.rca );
|
| 3060 | return mmc_ret;
|
| 3061 |
|
| 3062 | }
|
| 3063 | }
|
| 3064 | dprintf(SPEW, "ERASE SUCCESSFULLY COMPLETED\n");
|
| 3065 | return MMC_BOOT_E_SUCCESS;
|
| 3066 | }
|
| 3067 |
|