Sundarajan Srinivasan | 4bbce72 | 2013-07-03 11:13:31 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2013, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| 17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| 18 | * IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
| 19 | * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR |
| 20 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, |
| 21 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, |
| 22 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; |
| 23 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR |
| 25 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF |
| 26 | * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <platform.h> |
| 31 | #include <qgic.h> |
| 32 | #include <qtimer.h> |
| 33 | #include <board.h> |
| 34 | #include <mmu.h> |
| 35 | #include <arch/arm/mmu.h> |
| 36 | #include <platform/iomap.h> |
| 37 | #include <smem.h> |
| 38 | #include <reg.h> |
| 39 | #include <board.h> |
| 40 | #include <qpic_nand.h> |
| 41 | #include <target.h> |
| 42 | |
| 43 | extern struct smem_ram_ptable* target_smem_ram_ptable_init(); |
| 44 | |
| 45 | #define MB (1024*1024) |
| 46 | |
| 47 | #define MSM_IOMAP_SIZE ((MSM_IOMAP_END - MSM_IOMAP_BASE)/MB) |
| 48 | |
| 49 | /* LK memory - Strongly ordered, executable */ |
| 50 | #define LK_MEMORY (MMU_MEMORY_TYPE_NORMAL | \ |
| 51 | MMU_MEMORY_AP_READ_WRITE) |
| 52 | /* Scratch memory - Strongly ordered, non-executable */ |
| 53 | #define SCRATCH_MEMORY (MMU_MEMORY_TYPE_NORMAL | \ |
| 54 | MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN) |
| 55 | /* Peripherals - shared device */ |
| 56 | #define IOMAP_MEMORY (MMU_MEMORY_TYPE_DEVICE_SHARED | \ |
| 57 | MMU_MEMORY_AP_READ_WRITE | MMU_MEMORY_XN) |
| 58 | |
Sundarajan Srinivasan | 5278e76 | 2013-11-19 14:03:58 -0800 | [diff] [blame] | 59 | #define SCRATCH_REGION1_VIRT_START SCRATCH_REGION1 |
| 60 | #define SCRATCH_REGION2_VIRT_START SCRATCH_REGION2 |
Sundarajan Srinivasan | 4bbce72 | 2013-07-03 11:13:31 -0700 | [diff] [blame] | 61 | |
| 62 | #define SDRAM_BANK0_LAST_FIXED_ADDR (SCRATCH_REGION2 + SCRATCH_REGION2_SIZE) |
| 63 | |
| 64 | /* Map all the accesssible memory according to the following rules: |
| 65 | * 1. Map 1MB from MSM_SHARED_BASE with 1 -1 mapping. |
| 66 | * 2. Map MEMBASE - MEMSIZE with 1 -1 mapping. |
| 67 | * 3. Map all the scratch regions immediately after Appsbl memory. |
| 68 | * Virtual addresses start right after Appsbl Virtual address. |
| 69 | * 4. Map all the IOMAP space with 1 - 1 mapping. |
| 70 | * 5. Map all the rest of the SDRAM/ IMEM regions as 1 -1. |
| 71 | */ |
| 72 | mmu_section_t mmu_section_table[] = { |
| 73 | /* Physical addr, Virtual addr, Size (in MB), Flags */ |
| 74 | {MSM_SHARED_BASE, MSM_SHARED_BASE, 1, SCRATCH_MEMORY}, |
| 75 | {MEMBASE, MEMBASE, MEMSIZE / MB, LK_MEMORY}, |
| 76 | {SCRATCH_REGION1, SCRATCH_REGION1_VIRT_START, SCRATCH_REGION1_SIZE / MB, SCRATCH_MEMORY}, |
| 77 | {SCRATCH_REGION2, SCRATCH_REGION2_VIRT_START, SCRATCH_REGION2_SIZE / MB, SCRATCH_MEMORY}, |
| 78 | {MSM_IOMAP_BASE, MSM_IOMAP_BASE, MSM_IOMAP_SIZE, IOMAP_MEMORY}, |
| 79 | }; |
| 80 | |
| 81 | void platform_early_init(void) |
| 82 | { |
| 83 | /* Initialize board identifier data */ |
| 84 | board_init(); |
| 85 | |
| 86 | /* Initialize clock driver */ |
| 87 | platform_clock_init(); |
| 88 | |
| 89 | /* Initialize interrupt controller */ |
| 90 | qgic_init(); |
| 91 | |
| 92 | /* timer */ |
| 93 | qtimer_init(); |
| 94 | } |
| 95 | |
| 96 | void platform_init(void) |
| 97 | { |
| 98 | dprintf(INFO, "platform_init()\n"); |
| 99 | } |
| 100 | |
| 101 | void platform_uninit(void) |
| 102 | { |
| 103 | qtimer_uninit(); |
| 104 | qpic_nand_uninit(); |
| 105 | } |
| 106 | |
| 107 | /* Do not use default identitiy mappings. */ |
| 108 | int platform_use_identity_mmu_mappings(void) |
| 109 | { |
| 110 | return 0; |
| 111 | } |
| 112 | |
| 113 | void platform_init_mmu_mappings(void) |
| 114 | { |
| 115 | struct smem_ram_ptable *ram_ptable; |
| 116 | uint32_t i; |
| 117 | uint32_t sections; |
| 118 | uint32_t table_size = ARRAY_SIZE(mmu_section_table); |
| 119 | uint32_t last_fixed_addr = SDRAM_BANK0_LAST_FIXED_ADDR; |
| 120 | |
| 121 | ram_ptable = target_smem_ram_ptable_init(); |
| 122 | |
| 123 | /* Configure the MMU page entries for SDRAM and IMEM memory read |
| 124 | from the smem ram table*/ |
| 125 | for(i = 0; i < ram_ptable->len; i++) |
| 126 | { |
| 127 | if((ram_ptable->parts[i].category == IMEM) || (ram_ptable->parts[i].category == SDRAM)) |
| 128 | { |
| 129 | /* First bank info is added according to the static table - mmu_section_table. */ |
| 130 | if((ram_ptable->parts[i].start <= last_fixed_addr) && |
| 131 | ((ram_ptable->parts[i].start + ram_ptable->parts[i].size) >= last_fixed_addr)) |
| 132 | continue; |
| 133 | |
| 134 | /* Check to ensure that start address is 1MB aligned */ |
| 135 | ASSERT((ram_ptable->parts[i].start & 0xFFFFF) == 0); |
| 136 | |
| 137 | sections = (ram_ptable->parts[i].size) / MB; |
| 138 | |
| 139 | while(sections--) |
| 140 | { |
| 141 | arm_mmu_map_section(ram_ptable->parts[i].start + sections * MB, |
| 142 | ram_ptable->parts[i].start + sections * MB, |
| 143 | SCRATCH_MEMORY); |
| 144 | } |
| 145 | } |
| 146 | } |
| 147 | |
| 148 | /* Configure the MMU page entries for memory read from the |
| 149 | mmu_section_table */ |
| 150 | for (i = 0; i < table_size; i++) |
| 151 | { |
| 152 | sections = mmu_section_table[i].num_of_sections; |
| 153 | |
| 154 | while (sections--) |
| 155 | { |
| 156 | arm_mmu_map_section(mmu_section_table[i].paddress + sections * MB, |
| 157 | mmu_section_table[i].vaddress + sections * MB, |
| 158 | mmu_section_table[i].flags); |
| 159 | } |
| 160 | } |
| 161 | } |
| 162 | |
| 163 | addr_t platform_get_virt_to_phys_mapping(addr_t virt_addr) |
| 164 | { |
| 165 | uint32_t paddr; |
| 166 | uint32_t table_size = ARRAY_SIZE(mmu_section_table); |
| 167 | uint32_t limit; |
| 168 | |
| 169 | for (uint32_t i = 0; i < table_size; i++) |
| 170 | { |
| 171 | limit = (mmu_section_table[i].num_of_sections * MB) - 0x1; |
| 172 | |
| 173 | if (virt_addr >= mmu_section_table[i].vaddress && |
| 174 | virt_addr <= (mmu_section_table[i].vaddress + limit)) |
| 175 | { |
| 176 | paddr = mmu_section_table[i].paddress + (virt_addr - mmu_section_table[i].vaddress); |
| 177 | return paddr; |
| 178 | } |
| 179 | } |
| 180 | /* No special mapping found. |
| 181 | * Assume 1-1 mapping. |
| 182 | */ |
| 183 | paddr = virt_addr; |
| 184 | return paddr; |
| 185 | } |
| 186 | |
| 187 | addr_t platform_get_phys_to_virt_mapping(addr_t phys_addr) |
| 188 | { |
| 189 | uint32_t vaddr; |
| 190 | uint32_t table_size = ARRAY_SIZE(mmu_section_table); |
| 191 | uint32_t limit; |
| 192 | |
| 193 | for (uint32_t i = 0; i < table_size; i++) |
| 194 | { |
| 195 | limit = (mmu_section_table[i].num_of_sections * MB) - 0x1; |
| 196 | |
| 197 | if (phys_addr >= mmu_section_table[i].paddress && |
| 198 | phys_addr <= (mmu_section_table[i].paddress + limit)) |
| 199 | { |
| 200 | vaddr = mmu_section_table[i].vaddress + (phys_addr - mmu_section_table[i].paddress); |
| 201 | return vaddr; |
| 202 | } |
| 203 | } |
| 204 | |
| 205 | /* No special mapping found. |
| 206 | * Assume 1-1 mapping. |
| 207 | */ |
| 208 | vaddr = phys_addr; |
| 209 | |
| 210 | return vaddr; |
| 211 | } |