Travis Geiselbrecht | 1d0df69 | 2008-09-01 02:26:09 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2006 Brian Swetland |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining |
| 5 | * a copy of this software and associated documentation files |
| 6 | * (the "Software"), to deal in the Software without restriction, |
| 7 | * including without limitation the rights to use, copy, modify, merge, |
| 8 | * publish, distribute, sublicense, and/or sell copies of the Software, |
| 9 | * and to permit persons to whom the Software is furnished to do so, |
| 10 | * subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be |
| 13 | * included in all copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
| 16 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| 17 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| 18 | * IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY |
| 19 | * CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
| 20 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
| 21 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
| 22 | */ |
| 23 | |
| 24 | #ifndef __HW_MII_H |
| 25 | #define __HW_MII_H |
| 26 | |
| 27 | #define MII_REG_BCR 0x00 |
| 28 | #define MII_REG_BSR 0x01 |
| 29 | #define MII_REG_PHY_ID1 0x02 |
| 30 | #define MII_REG_PHY_ID2 0x03 |
| 31 | #define MII_REG_AUTO_ADV 0x04 |
| 32 | #define MII_REG_AUTO_LINK 0x05 |
| 33 | #define MII_REG_AUTO_EXPN 0x06 |
| 34 | #define MII_REG_AUTO_NEXT 0x07 |
| 35 | #define MII_REG_LINK_NEXT 0x08 |
| 36 | #define MII_REG_RXER_CNT 0x15 |
| 37 | #define MII_REG_ICSR 0x1b |
| 38 | #define MII_REG_100TX_PHY 0x1f |
| 39 | |
| 40 | #define MII_BCR_RESET 0x8000 |
| 41 | #define MII_BCR_LOOPBACK 0x4000 |
| 42 | #define MII_BCR_100MBPS 0x2000 |
| 43 | #define MII_BCR_AUTO_ENABLE 0x1000 |
| 44 | #define MII_BCR_PWR_DOWN 0x0800 |
| 45 | #define MII_BCR_ISOLATE 0x0400 |
| 46 | #define MII_BCR_AUTO_RESTART 0x0200 |
| 47 | #define MII_BCR_FULL_DUPLEX 0x0100 |
| 48 | #define MII_BCR_COL_TEST 0x0080 |
| 49 | #define MII_BCR_TX_DISABLE 0x0001 |
| 50 | |
| 51 | #define MII_BSR_T4 0x8000 |
| 52 | #define MII_BSR_100TX_FULL 0x4000 |
| 53 | #define MII_BSR_100TX_HALF 0x2000 |
| 54 | #define MII_BSR_10T_FULL 0x1000 |
| 55 | #define MII_BSR_10T_HALF 0x0800 |
| 56 | #define MII_BSR_NO_PREAMBLE 0x0040 |
| 57 | #define MII_BSR_AUTO_COMPLETE 0x0020 |
| 58 | #define MII_BSR_REMOTE_FAULT 0x0010 |
| 59 | #define MII_BSR_AUTO_ABLE 0x0008 |
| 60 | #define MII_BSR_LINK_UP 0x0004 |
| 61 | #define MII_BSR_JABBER 0x0002 |
| 62 | #define MII_BSR_EXTEND 0x0001 |
| 63 | |
| 64 | #define MII_100TX_PHY_ISOLATE 0x0040 |
| 65 | #define MII_100TX_MODE_MASK 0x001C |
| 66 | #define MII_100TX_MODE_AUTO 0x0000 |
| 67 | #define MII_100TX_MODE_10T_H 0x0004 |
| 68 | #define MII_100TX_MODE_100TX_H 0x0008 |
| 69 | #define MII_100TX_MODE_10T_F 0x0014 |
| 70 | #define MII_100TX_MODE_100TX_F 0x0018 |
| 71 | #define MII_100TX_MODE_ISOLATE 0x001C |
| 72 | #define MII_100TX_SQE_TEST 0x0002 |
| 73 | #define MII_100TX_NO_SCRAMBLE 0x0001 |
| 74 | |
| 75 | #endif |