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Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +05301/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <debug.h>
30#include <platform/iomap.h>
31#include <reg.h>
32#include <target.h>
33#include <platform.h>
34#include <uart_dm.h>
35#include <mmc.h>
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -080036#include <platform/gpio.h>
37#include <dev/keys.h>
38#include <spmi_v2.h>
39#include <pm8x41.h>
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +053040#include <board.h>
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -080041#include <baseband.h>
42#include <hsusb.h>
43#include <platform/gpio.h>
44#include <platform/gpio.h>
45#include <platform/irqs.h>
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +053046
47#define PMIC_ARB_CHANNEL_NUM 0
48#define PMIC_ARB_OWNER_ID 0
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -080049#define TLMM_VOL_UP_BTN_GPIO 107
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +053050
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -080051static void set_sdc_power_ctrl(void);
52
53struct mmc_device *dev;
54
55static uint32_t mmc_pwrctl_base[] =
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +053056 { MSM_SDC1_BASE, MSM_SDC2_BASE };
57
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -080058static uint32_t mmc_sdhci_base[] =
59 { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
60
61static uint32_t mmc_sdc_pwrctl_irq[] =
62 { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
63
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +053064void target_early_init(void)
65{
66#if WITH_DEBUG_UART
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -080067 uart_dm_init(2, 0, BLSP1_UART1_BASE);
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +053068#endif
69}
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -080070
71void target_sdc_init()
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +053072{
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -080073 struct mmc_config_data config;
74
75 /* Set drive strength & pull ctrl values */
76 set_sdc_power_ctrl();
77
78 config.bus_width = DATA_BUS_WIDTH_8BIT;
79 config.max_clk_rate = MMC_CLK_200MHZ;
80
81 /* Try slot 1*/
82 config.slot = 1;
83 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
84 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
85 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
86 config.hs400_support = 0;
87
88 if (!(dev = mmc_init(&config))) {
89 /* Try slot 2 */
90 config.slot = 2;
91 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
92 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
93 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
94
95 if (!(dev = mmc_init(&config))) {
96 dprintf(CRITICAL, "mmc init failed!");
97 ASSERT(0);
98 }
99 }
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +0530100}
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -0800101
102void *target_mmc_device()
103{
104 return (void *) dev;
105}
106
107/* Return 1 if vol_up pressed */
108static int target_volume_up()
109{
110 uint8_t status = 0;
111
112 gpio_tlmm_config(TLMM_VOL_UP_BTN_GPIO, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA, GPIO_ENABLE);
113
114 /* Wait for the gpio config to take effect - debounce time */
115 thread_sleep(10);
116
117 /* Get status of GPIO */
118 status = gpio_status(TLMM_VOL_UP_BTN_GPIO);
119
120 /* Active low signal. */
121 return !status;
122}
123
124/* Return 1 if vol_down pressed */
125uint32_t target_volume_down()
126{
127 /* Volume down button tied in with PMIC RESIN. */
128 return pm8x41_resin_status();
129}
130
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +0530131static void target_keystatus()
132{
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -0800133 keys_init();
134
135 if(target_volume_down())
136 keys_post_event(KEY_VOLUMEDOWN, 1);
137
138 if(target_volume_up())
139 keys_post_event(KEY_VOLUMEUP, 1);
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +0530140}
141
142void target_init(void)
143{
144 uint32_t base_addr;
145 uint8_t slot;
146
147 dprintf(INFO, "target_init()\n");
148
149 spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
150
151 target_keystatus();
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -0800152 set_sdc_power_ctrl();
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +0530153
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -0800154 target_sdc_init();
155 if (partition_read_table())
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +0530156 {
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -0800157 dprintf(CRITICAL, "Error reading the partition table info\n");
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +0530158 ASSERT(0);
159 }
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +0530160}
161
162void target_serialno(unsigned char *buf)
163{
164 uint32_t serialno;
165 if (target_is_emmc_boot()) {
166 serialno = mmc_get_psn();
167 snprintf((char *)buf, 13, "%x", serialno);
168 }
169}
170
171unsigned board_machtype(void)
172{
Aparna Mallavarapu7cc5a792014-02-27 21:49:59 -0800173 return LINUX_MACHTYPE_UNKNOWN;
174}
175
176unsigned check_reboot_mode(void)
177{
178 uint32_t restart_reason = 0;
179
180 /* Read reboot reason and scrub it */
181 restart_reason = readl(RESTART_REASON_ADDR);
182 writel(0x00, RESTART_REASON_ADDR);
183
184 return restart_reason;
185}
186
187void reboot_device(unsigned reboot_reason)
188{
189 writel(reboot_reason, RESTART_REASON_ADDR);
190
191 /* Configure PMIC for warm reset */
192 pm8x41_reset_configure(PON_PSHOLD_WARM_RESET);
193
194 /* Drop PS_HOLD for MSM */
195 writel(0x00, MPM2_MPM_PS_HOLD);
196
197 mdelay(5000);
198
199 dprintf(CRITICAL, "Rebooting failed\n");
200}
201
202/* Detect the target type */
203void target_detect(struct board_data *board)
204{
205 /*
206 * already fill the board->target on board.c
207 */
208}
209
210void target_baseband_detect(struct board_data *board)
211{
212 uint32_t platform;
213
214 platform = board->platform;
215 switch(platform)
216 {
217 case MSM8916:
218 board->baseband = BASEBAND_MSM;
219 break;
220 default:
221 dprintf(CRITICAL, "Platform type: %u is not supported\n", platform);
222 ASSERT(0);
223 };
224}
225
226unsigned target_baseband()
227{
228 return board_baseband();
229}
230
231int emmc_recovery_init(void)
232{
233 return _emmc_recovery_init();
234}
235
236static void set_sdc_power_ctrl()
237{
238 /* Drive strength configs for sdc pins */
239 struct tlmm_cfgs sdc1_hdrv_cfg[] =
240 {
241 { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK },
242 { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK },
243 { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_6MA, TLMM_HDRV_MASK },
244 };
245
246 /* Pull configs for sdc pins */
247 struct tlmm_cfgs sdc1_pull_cfg[] =
248 {
249 { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK },
250 { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
251 { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK },
252 };
253
254 /* Set the drive strength & pull control values */
255 tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
256 tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
257}
258
259void target_usb_init(void)
260{
261 uint32_t val;
262
263 /* Select and enable external configuration with USB PHY */
264 ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET);
265
266 /* Enable sess_vld */
267 val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN;
268 writel(val, USB_GENCONFIG_2);
269
270 /* Enable external vbus configuration in the LINK */
271 val = readl(USB_USBCMD);
272 val |= SESS_VLD_CTRL;
273 writel(val, USB_USBCMD);
274}
275
276void target_usb_stop(void)
277{
278 /* Disable VBUS mimicing in the controller. */
279 ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR);
280}
281
282
283void target_uninit(void)
284{
285 mmc_put_card_to_sleep(dev);
286 sdhci_mode_disable(&dev->host);
287}
288
289/* Do any target specific intialization needed before entering fastboot mode */
290void target_fastboot_init(void)
291{
292 /* Set the BOOT_DONE flag in PM8916 */
293 pm8x41_set_boot_done();
Aparna Mallavarapufe1f3d12013-10-19 15:05:30 +0530294}