Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 1 | /* Copyright (c) 2012-2014, The Linux Foundation. All rights reserved. |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
Deepa Dinamani | 1e09494 | 2012-10-30 15:49:02 -0700 | [diff] [blame] | 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 15 | * |
Deepa Dinamani | 1e09494 | 2012-10-30 15:49:02 -0700 | [diff] [blame] | 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <platform/iomap.h> |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 31 | #include <platform/irqs.h> |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 32 | #include <platform/gpio.h> |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 33 | #include <reg.h> |
| 34 | #include <target.h> |
| 35 | #include <platform.h> |
Pavel Nedev | 0351149 | 2013-03-08 19:05:32 -0800 | [diff] [blame] | 36 | #include <dload_util.h> |
Deepa Dinamani | 26e9326 | 2012-05-21 17:35:14 -0700 | [diff] [blame] | 37 | #include <uart_dm.h> |
Amol Jadi | 29f9503 | 2012-06-22 12:52:54 -0700 | [diff] [blame] | 38 | #include <mmc.h> |
Deepa Dinamani | c2a9b36 | 2012-02-23 15:15:54 -0800 | [diff] [blame] | 39 | #include <spmi.h> |
Neeti Desai | 465491e | 2012-07-31 12:53:35 -0700 | [diff] [blame] | 40 | #include <board.h> |
| 41 | #include <smem.h> |
| 42 | #include <baseband.h> |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 43 | #include <dev/keys.h> |
| 44 | #include <pm8x41.h> |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 45 | #include <crypto5_wrapper.h> |
Eugene Yasman | a0d1812 | 2013-02-26 13:23:05 +0200 | [diff] [blame] | 46 | #include <hsusb.h> |
| 47 | #include <clock.h> |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 48 | #include <partition_parser.h> |
| 49 | #include <scm.h> |
| 50 | #include <platform/clock.h> |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 51 | #include <platform/gpio.h> |
Channagoud Kadabi | f84830c | 2013-04-19 14:35:47 -0700 | [diff] [blame] | 52 | #include <stdlib.h> |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 53 | |
Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 54 | enum hw_platform_subtype |
| 55 | { |
| 56 | HW_PLATFORM_SUBTYPE_CDP_INTERPOSER = 8, |
| 57 | }; |
| 58 | |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 59 | extern bool target_use_signed_kernel(void); |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 60 | static void set_sdc_power_ctrl(); |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 61 | |
| 62 | static unsigned int target_id; |
Deepa Dinamani | 07f1571 | 2013-03-08 17:02:13 -0800 | [diff] [blame] | 63 | static uint32_t pmic_ver; |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 64 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 65 | #if MMC_SDHCI_SUPPORT |
| 66 | struct mmc_device *dev; |
| 67 | #endif |
| 68 | |
Deepa Dinamani | c2a9b36 | 2012-02-23 15:15:54 -0800 | [diff] [blame] | 69 | #define PMIC_ARB_CHANNEL_NUM 0 |
| 70 | #define PMIC_ARB_OWNER_ID 0 |
| 71 | |
Deepa Dinamani | 1e09494 | 2012-10-30 15:49:02 -0700 | [diff] [blame] | 72 | #define WDOG_DEBUG_DISABLE_BIT 17 |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 73 | |
Channagoud Kadabi | a1ef809 | 2014-01-08 12:11:58 -0800 | [diff] [blame^] | 74 | #define CE_INSTANCE 2 |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 75 | #define CE_EE 1 |
| 76 | #define CE_FIFO_SIZE 64 |
| 77 | #define CE_READ_PIPE 3 |
| 78 | #define CE_WRITE_PIPE 2 |
Deepa Dinamani | 809c428 | 2013-07-09 14:06:02 -0700 | [diff] [blame] | 79 | #define CE_READ_PIPE_LOCK_GRP 0 |
| 80 | #define CE_WRITE_PIPE_LOCK_GRP 0 |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 81 | #define CE_ARRAY_SIZE 20 |
| 82 | |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 83 | #ifdef SSD_ENABLE |
| 84 | #define SSD_CE_INSTANCE_1 1 |
| 85 | #define SSD_PARTITION_SIZE 8192 |
| 86 | #endif |
| 87 | |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 88 | #define FASTBOOT_MODE 0x77665500 |
| 89 | |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 90 | #define BOARD_SOC_VERSION1(soc_rev) (soc_rev >= 0x10000 && soc_rev < 0x20000) |
| 91 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 92 | #if MMC_SDHCI_SUPPORT |
| 93 | static uint32_t mmc_sdhci_base[] = |
| 94 | { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE, MSM_SDC3_SDHCI_BASE, MSM_SDC4_SDHCI_BASE }; |
| 95 | #endif |
| 96 | |
Deepa Dinamani | ca5ad85 | 2012-05-07 18:19:47 -0700 | [diff] [blame] | 97 | static uint32_t mmc_sdc_base[] = |
| 98 | { MSM_SDC1_BASE, MSM_SDC2_BASE, MSM_SDC3_BASE, MSM_SDC4_BASE }; |
| 99 | |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 100 | static uint32_t mmc_sdc_pwrctl_irq[] = |
| 101 | { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ, SDCC3_PWRCTL_IRQ, SDCC4_PWRCTL_IRQ }; |
| 102 | |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 103 | void target_early_init(void) |
| 104 | { |
Deepa Dinamani | b073ba2 | 2012-08-10 11:06:41 -0700 | [diff] [blame] | 105 | #if WITH_DEBUG_UART |
Neeti Desai | ac01127 | 2012-08-29 18:24:54 -0700 | [diff] [blame] | 106 | uart_dm_init(1, 0, BLSP1_UART1_BASE); |
Deepa Dinamani | b073ba2 | 2012-08-10 11:06:41 -0700 | [diff] [blame] | 107 | #endif |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 108 | } |
| 109 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 110 | /* Return 1 if vol_up pressed */ |
| 111 | static int target_volume_up() |
| 112 | { |
| 113 | uint8_t status = 0; |
| 114 | struct pm8x41_gpio gpio; |
| 115 | |
| 116 | /* CDP vol_up seems to be always grounded. So gpio status is read as 0, |
| 117 | * whether key is pressed or not. |
| 118 | * Ignore volume_up key on CDP for now. |
| 119 | */ |
| 120 | if (board_hardware_id() == HW_PLATFORM_SURF) |
| 121 | return 0; |
| 122 | |
| 123 | /* Configure the GPIO */ |
| 124 | gpio.direction = PM_GPIO_DIR_IN; |
| 125 | gpio.function = 0; |
| 126 | gpio.pull = PM_GPIO_PULL_UP_30; |
Eugene Yasman | 6382ee0 | 2013-01-16 13:00:56 +0200 | [diff] [blame] | 127 | gpio.vin_sel = 2; |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 128 | |
| 129 | pm8x41_gpio_config(5, &gpio); |
| 130 | |
Channagoud Kadabi | 4d7b530 | 2013-08-07 16:34:08 -0700 | [diff] [blame] | 131 | /* Wait for the pmic gpio config to take effect */ |
| 132 | thread_sleep(1); |
| 133 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 134 | /* Get status of P_GPIO_5 */ |
| 135 | pm8x41_gpio_get(5, &status); |
| 136 | |
| 137 | return !status; /* active low */ |
| 138 | } |
| 139 | |
| 140 | /* Return 1 if vol_down pressed */ |
Deepa Dinamani | 66a8796 | 2013-02-04 10:39:30 -0800 | [diff] [blame] | 141 | uint32_t target_volume_down() |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 142 | { |
Deepa Dinamani | 66a8796 | 2013-02-04 10:39:30 -0800 | [diff] [blame] | 143 | /* Volume down button is tied in with RESIN on MSM8974. */ |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 144 | if (platform_is_8974() && (pmic_ver == PM8X41_VERSION_V2)) |
Channagoud Kadabi | 84dcd91 | 2013-07-03 15:33:15 -0700 | [diff] [blame] | 145 | return pm8x41_v2_resin_status(); |
Deepa Dinamani | 13bfc85 | 2013-02-05 17:56:47 -0800 | [diff] [blame] | 146 | else |
| 147 | return pm8x41_resin_status(); |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 148 | } |
| 149 | |
| 150 | static void target_keystatus() |
| 151 | { |
| 152 | keys_init(); |
| 153 | |
| 154 | if(target_volume_down()) |
| 155 | keys_post_event(KEY_VOLUMEDOWN, 1); |
| 156 | |
| 157 | if(target_volume_up()) |
| 158 | keys_post_event(KEY_VOLUMEUP, 1); |
| 159 | } |
| 160 | |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 161 | /* Set up params for h/w CE. */ |
| 162 | void target_crypto_init_params() |
| 163 | { |
| 164 | struct crypto_init_params ce_params; |
| 165 | |
| 166 | /* Set up base addresses and instance. */ |
Channagoud Kadabi | a1ef809 | 2014-01-08 12:11:58 -0800 | [diff] [blame^] | 167 | ce_params.crypto_instance = CE_INSTANCE; |
| 168 | ce_params.crypto_base = MSM_CE2_BASE; |
| 169 | ce_params.bam_base = MSM_CE2_BAM_BASE; |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 170 | |
| 171 | /* Set up BAM config. */ |
Deepa Dinamani | 809c428 | 2013-07-09 14:06:02 -0700 | [diff] [blame] | 172 | ce_params.bam_ee = CE_EE; |
| 173 | ce_params.pipes.read_pipe = CE_READ_PIPE; |
| 174 | ce_params.pipes.write_pipe = CE_WRITE_PIPE; |
| 175 | ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP; |
| 176 | ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP; |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 177 | |
| 178 | /* Assign buffer sizes. */ |
| 179 | ce_params.num_ce = CE_ARRAY_SIZE; |
| 180 | ce_params.read_fifo_size = CE_FIFO_SIZE; |
| 181 | ce_params.write_fifo_size = CE_FIFO_SIZE; |
| 182 | |
Deepa Dinamani | e505d3d | 2013-05-14 16:55:38 -0700 | [diff] [blame] | 183 | /* BAM is initialized by TZ for this platform. |
| 184 | * Do not do it again as the initialization address space |
| 185 | * is locked. |
| 186 | */ |
| 187 | ce_params.do_bam_init = 0; |
| 188 | |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 189 | crypto_init_params(&ce_params); |
| 190 | } |
| 191 | |
| 192 | crypto_engine_type board_ce_type(void) |
| 193 | { |
| 194 | return CRYPTO_ENGINE_TYPE_HW; |
| 195 | } |
| 196 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 197 | #if MMC_SDHCI_SUPPORT |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 198 | static void target_mmc_sdhci_init() |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 199 | { |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 200 | struct mmc_config_data config = {0}; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 201 | uint32_t soc_ver = 0; |
| 202 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 203 | soc_ver = board_soc_version(); |
| 204 | |
| 205 | /* |
| 206 | * 8974 v1 fluid devices, have a hardware bug |
| 207 | * which limits the bus width to 4 bit. |
| 208 | */ |
| 209 | switch(board_hardware_id()) |
| 210 | { |
| 211 | case HW_PLATFORM_FLUID: |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 212 | if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver)) |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 213 | config.bus_width = DATA_BUS_WIDTH_4BIT; |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 214 | else |
| 215 | config.bus_width = DATA_BUS_WIDTH_8BIT; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 216 | break; |
| 217 | default: |
| 218 | config.bus_width = DATA_BUS_WIDTH_8BIT; |
| 219 | }; |
| 220 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 221 | /* Trying Slot 1*/ |
| 222 | config.slot = 1; |
Channagoud Kadabi | bdac709 | 2013-08-20 15:28:07 -0700 | [diff] [blame] | 223 | /* |
| 224 | * For 8974 AC & 8x62 platforms the software clock |
| 225 | * plan recommends to use the following frequencies: |
| 226 | * 200 MHz --> 192 MHZ |
| 227 | * 400 MHZ --> 384 MHZ |
| 228 | * only for emmc slot |
| 229 | */ |
| 230 | if (platform_is_8974ac() || platform_is_8x62()) |
| 231 | config.max_clk_rate = MMC_CLK_192MHZ; |
| 232 | else |
| 233 | config.max_clk_rate = MMC_CLK_200MHZ; |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 234 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 235 | config.pwrctl_base = mmc_sdc_base[config.slot - 1]; |
| 236 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 237 | |
| 238 | if (!(dev = mmc_init(&config))) { |
| 239 | /* Trying Slot 2 next */ |
| 240 | config.slot = 2; |
Channagoud Kadabi | bdac709 | 2013-08-20 15:28:07 -0700 | [diff] [blame] | 241 | config.max_clk_rate = MMC_CLK_200MHZ; |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 242 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 243 | config.pwrctl_base = mmc_sdc_base[config.slot - 1]; |
| 244 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 245 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 246 | if (!(dev = mmc_init(&config))) { |
| 247 | dprintf(CRITICAL, "mmc init failed!"); |
| 248 | ASSERT(0); |
| 249 | } |
| 250 | } |
Channagoud Kadabi | ef5332f | 2013-05-16 15:23:43 -0700 | [diff] [blame] | 251 | |
| 252 | /* |
| 253 | * MMC initialization is complete, read the partition table info |
| 254 | */ |
| 255 | if (partition_read_table()) { |
| 256 | dprintf(CRITICAL, "Error reading the partition table info\n"); |
| 257 | ASSERT(0); |
| 258 | } |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 259 | } |
| 260 | |
Channagoud Kadabi | 6faaf70 | 2013-09-10 15:00:51 -0700 | [diff] [blame] | 261 | void *target_mmc_device() |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 262 | { |
Channagoud Kadabi | 6faaf70 | 2013-09-10 15:00:51 -0700 | [diff] [blame] | 263 | return (void *) dev; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 264 | } |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 265 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 266 | #else |
Channagoud Kadabi | b14d6d0 | 2013-05-15 10:48:59 -0700 | [diff] [blame] | 267 | static void target_mmc_mci_init() |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 268 | { |
Deepa Dinamani | ca5ad85 | 2012-05-07 18:19:47 -0700 | [diff] [blame] | 269 | uint32_t base_addr; |
| 270 | uint8_t slot; |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 271 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 272 | /* Trying Slot 1 */ |
| 273 | slot = 1; |
| 274 | base_addr = mmc_sdc_base[slot - 1]; |
| 275 | |
| 276 | if (mmc_boot_main(slot, base_addr)) |
| 277 | { |
| 278 | /* Trying Slot 2 next */ |
| 279 | slot = 2; |
| 280 | base_addr = mmc_sdc_base[slot - 1]; |
| 281 | if (mmc_boot_main(slot, base_addr)) { |
| 282 | dprintf(CRITICAL, "mmc init failed!"); |
| 283 | ASSERT(0); |
| 284 | } |
| 285 | } |
| 286 | } |
| 287 | |
| 288 | /* |
| 289 | * Function to set the capabilities for the host |
| 290 | */ |
| 291 | void target_mmc_caps(struct mmc_host *host) |
| 292 | { |
| 293 | uint32_t soc_ver = 0; |
| 294 | |
| 295 | soc_ver = board_soc_version(); |
| 296 | |
| 297 | /* |
| 298 | * 8974 v1 fluid devices, have a hardware bug |
| 299 | * which limits the bus width to 4 bit. |
| 300 | */ |
| 301 | switch(board_hardware_id()) |
| 302 | { |
| 303 | case HW_PLATFORM_FLUID: |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 304 | if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver)) |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 305 | host->caps.bus_width = MMC_BOOT_BUS_WIDTH_4_BIT; |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 306 | else |
| 307 | host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT; |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 308 | break; |
| 309 | default: |
| 310 | host->caps.bus_width = MMC_BOOT_BUS_WIDTH_8_BIT; |
| 311 | }; |
| 312 | |
| 313 | host->caps.ddr_mode = 1; |
| 314 | host->caps.hs200_mode = 1; |
| 315 | host->caps.hs_clk_rate = MMC_CLK_96MHZ; |
| 316 | } |
| 317 | #endif |
| 318 | |
| 319 | |
| 320 | void target_init(void) |
| 321 | { |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 322 | dprintf(INFO, "target_init()\n"); |
| 323 | |
Deepa Dinamani | c2a9b36 | 2012-02-23 15:15:54 -0800 | [diff] [blame] | 324 | spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID); |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 325 | |
Deepa Dinamani | 07f1571 | 2013-03-08 17:02:13 -0800 | [diff] [blame] | 326 | /* Save PM8941 version info. */ |
| 327 | pmic_ver = pm8x41_get_pmic_rev(); |
| 328 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 329 | target_keystatus(); |
| 330 | |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 331 | if (target_use_signed_kernel()) |
| 332 | target_crypto_init_params(); |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 333 | /* Display splash screen if enabled */ |
| 334 | #if DISPLAY_SPLASH_SCREEN |
Channagoud Kadabi | 8a9c6a2 | 2013-02-05 14:43:48 -0800 | [diff] [blame] | 335 | dprintf(INFO, "Display Init: Start\n"); |
Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 336 | if (board_hardware_subtype() != HW_PLATFORM_SUBTYPE_CDP_INTERPOSER) |
Channagoud Kadabi | 20e0dd1 | 2013-08-06 12:30:51 -0700 | [diff] [blame] | 337 | { |
| 338 | display_init(); |
| 339 | } |
Channagoud Kadabi | 8a9c6a2 | 2013-02-05 14:43:48 -0800 | [diff] [blame] | 340 | dprintf(INFO, "Display Init: Done\n"); |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 341 | #endif |
Deepa Dinamani | b9a5720 | 2012-12-20 18:05:11 -0800 | [diff] [blame] | 342 | |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 343 | /* |
| 344 | * Set drive strength & pull ctrl for |
| 345 | * emmc |
| 346 | */ |
| 347 | set_sdc_power_ctrl(); |
| 348 | |
Channagoud Kadabi | c1fdc8d | 2013-04-05 11:29:23 -0700 | [diff] [blame] | 349 | #if MMC_SDHCI_SUPPORT |
| 350 | target_mmc_sdhci_init(); |
| 351 | #else |
| 352 | target_mmc_mci_init(); |
| 353 | #endif |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 354 | } |
| 355 | |
| 356 | unsigned board_machtype(void) |
| 357 | { |
| 358 | return target_id; |
| 359 | } |
| 360 | |
| 361 | /* Do any target specific intialization needed before entering fastboot mode */ |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 362 | #ifdef SSD_ENABLE |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 363 | static void ssd_load_keystore_from_emmc() |
| 364 | { |
| 365 | uint64_t ptn = 0; |
| 366 | int index = -1; |
| 367 | uint32_t size = SSD_PARTITION_SIZE; |
| 368 | int ret = -1; |
| 369 | |
Channagoud Kadabi | f84830c | 2013-04-19 14:35:47 -0700 | [diff] [blame] | 370 | uint32_t *buffer = (uint32_t *)memalign(CACHE_LINE, |
| 371 | ROUNDUP(SSD_PARTITION_SIZE, CACHE_LINE)); |
| 372 | |
| 373 | if (!buffer) { |
| 374 | dprintf(CRITICAL, "Error Allocating memory for SSD buffer\n"); |
| 375 | ASSERT(0); |
| 376 | } |
| 377 | |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 378 | index = partition_get_index("ssd"); |
| 379 | |
| 380 | ptn = partition_get_offset(index); |
| 381 | if(ptn == 0){ |
| 382 | dprintf(CRITICAL,"ERROR: ssd parition not found"); |
| 383 | return; |
| 384 | } |
| 385 | |
| 386 | if(mmc_read(ptn, buffer, size)){ |
| 387 | dprintf(CRITICAL,"ERROR:Cannot read data\n"); |
| 388 | return; |
| 389 | } |
| 390 | |
| 391 | ret = scm_protect_keystore((uint32_t *)&buffer[0],size); |
| 392 | if(ret != 0) |
| 393 | dprintf(CRITICAL,"ERROR: scm_protect_keystore Failed"); |
Channagoud Kadabi | f84830c | 2013-04-19 14:35:47 -0700 | [diff] [blame] | 394 | |
| 395 | free(buffer); |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 396 | } |
| 397 | #endif |
| 398 | |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 399 | void target_fastboot_init(void) |
| 400 | { |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 401 | /* Set the BOOT_DONE flag in PM8921 */ |
Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 402 | pm8x41_set_boot_done(); |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 403 | |
| 404 | #ifdef SSD_ENABLE |
| 405 | clock_ce_enable(SSD_CE_INSTANCE_1); |
| 406 | ssd_load_keystore_from_emmc(); |
| 407 | #endif |
Deepa Dinamani | 7d6c897 | 2011-12-14 15:16:56 -0800 | [diff] [blame] | 408 | } |
Neeti Desai | 465491e | 2012-07-31 12:53:35 -0700 | [diff] [blame] | 409 | |
| 410 | /* Detect the target type */ |
| 411 | void target_detect(struct board_data *board) |
| 412 | { |
| 413 | board->target = LINUX_MACHTYPE_UNKNOWN; |
| 414 | } |
| 415 | |
| 416 | /* Detect the modem type */ |
| 417 | void target_baseband_detect(struct board_data *board) |
| 418 | { |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 419 | uint32_t platform; |
Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 420 | uint32_t platform_subtype; |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 421 | |
| 422 | platform = board->platform; |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 423 | |
| 424 | switch(platform) { |
| 425 | case MSM8974: |
Deepa Dinamani | 713a76f | 2013-05-03 13:17:24 -0700 | [diff] [blame] | 426 | case MSM8274: |
| 427 | case MSM8674: |
Deepa Dinamani | caf9e77 | 2013-06-14 12:39:41 -0700 | [diff] [blame] | 428 | case MSM8274AA: |
| 429 | case MSM8274AB: |
| 430 | case MSM8274AC: |
| 431 | case MSM8674AA: |
| 432 | case MSM8674AB: |
| 433 | case MSM8674AC: |
| 434 | case MSM8974AA: |
| 435 | case MSM8974AB: |
| 436 | case MSM8974AC: |
Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 437 | case MSMSAMARIUM2: |
| 438 | case MSMSAMARIUM9: |
Neeti Desai | 465491e | 2012-07-31 12:53:35 -0700 | [diff] [blame] | 439 | board->baseband = BASEBAND_MSM; |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 440 | break; |
| 441 | case APQ8074: |
Deepa Dinamani | caf9e77 | 2013-06-14 12:39:41 -0700 | [diff] [blame] | 442 | case APQ8074AA: |
| 443 | case APQ8074AB: |
| 444 | case APQ8074AC: |
Channagoud Kadabi | a7ab931 | 2014-01-08 12:11:23 -0800 | [diff] [blame] | 445 | case MSMSAMARIUM0: |
Channagoud Kadabi | f1d4442 | 2013-02-21 22:59:35 -0800 | [diff] [blame] | 446 | board->baseband = BASEBAND_APQ; |
| 447 | break; |
| 448 | default: |
| 449 | dprintf(CRITICAL, "Platform type: %u is not supported\n",platform); |
| 450 | ASSERT(0); |
| 451 | }; |
Neeti Desai | 465491e | 2012-07-31 12:53:35 -0700 | [diff] [blame] | 452 | } |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 453 | |
Deepa Dinamani | 927a6b6 | 2013-03-28 17:05:32 -0700 | [diff] [blame] | 454 | unsigned target_baseband() |
| 455 | { |
| 456 | return board_baseband(); |
| 457 | } |
| 458 | |
Deepa Dinamani | 9a61293 | 2012-08-14 16:15:03 -0700 | [diff] [blame] | 459 | void target_serialno(unsigned char *buf) |
| 460 | { |
| 461 | unsigned int serialno; |
| 462 | if (target_is_emmc_boot()) { |
| 463 | serialno = mmc_get_psn(); |
| 464 | snprintf((char *)buf, 13, "%x", serialno); |
| 465 | } |
| 466 | } |
Amol Jadi | 6639d45 | 2012-08-16 14:51:19 -0700 | [diff] [blame] | 467 | |
| 468 | unsigned check_reboot_mode(void) |
| 469 | { |
| 470 | uint32_t restart_reason = 0; |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 471 | uint32_t soc_ver = 0; |
| 472 | uint32_t restart_reason_addr; |
| 473 | |
| 474 | soc_ver = board_soc_version(); |
| 475 | |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 476 | if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver)) |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 477 | restart_reason_addr = RESTART_REASON_ADDR; |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 478 | else |
| 479 | restart_reason_addr = RESTART_REASON_ADDR_V2; |
Amol Jadi | 6639d45 | 2012-08-16 14:51:19 -0700 | [diff] [blame] | 480 | |
| 481 | /* Read reboot reason and scrub it */ |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 482 | restart_reason = readl(restart_reason_addr); |
| 483 | writel(0x00, restart_reason_addr); |
Amol Jadi | 6639d45 | 2012-08-16 14:51:19 -0700 | [diff] [blame] | 484 | |
| 485 | return restart_reason; |
| 486 | } |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 487 | |
| 488 | void reboot_device(unsigned reboot_reason) |
| 489 | { |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 490 | uint32_t soc_ver = 0; |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 491 | uint8_t reset_type = 0; |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 492 | |
| 493 | soc_ver = board_soc_version(); |
| 494 | |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 495 | /* Write the reboot reason */ |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 496 | if (platform_is_8974() && BOARD_SOC_VERSION1(soc_ver)) |
Channagoud Kadabi | 8c8587f | 2013-02-08 12:46:09 -0800 | [diff] [blame] | 497 | writel(reboot_reason, RESTART_REASON_ADDR); |
Channagoud Kadabi | c48b3e9 | 2013-06-23 16:19:10 -0700 | [diff] [blame] | 498 | else |
| 499 | writel(reboot_reason, RESTART_REASON_ADDR_V2); |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 500 | |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 501 | if(reboot_reason == FASTBOOT_MODE) |
| 502 | reset_type = PON_PSHOLD_WARM_RESET; |
| 503 | else |
| 504 | reset_type = PON_PSHOLD_HARD_RESET; |
| 505 | |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 506 | /* Configure PMIC for warm reset */ |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 507 | if (platform_is_8974() && (pmic_ver == PM8X41_VERSION_V2)) |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 508 | pm8x41_v2_reset_configure(reset_type); |
Deepa Dinamani | 07f1571 | 2013-03-08 17:02:13 -0800 | [diff] [blame] | 509 | else |
Sundarajan Srinivasan | d00f31d | 2013-07-19 12:09:15 -0700 | [diff] [blame] | 510 | pm8x41_reset_configure(reset_type); |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 511 | |
Deepa Dinamani | 1e09494 | 2012-10-30 15:49:02 -0700 | [diff] [blame] | 512 | /* Disable Watchdog Debug. |
| 513 | * Required becuase of a H/W bug which causes the system to |
| 514 | * reset partially even for non watchdog resets. |
| 515 | */ |
| 516 | writel(readl(GCC_WDOG_DEBUG) & ~(1 << WDOG_DEBUG_DISABLE_BIT), GCC_WDOG_DEBUG); |
| 517 | |
Deepa Dinamani | e0808e5 | 2012-11-26 15:22:46 -0800 | [diff] [blame] | 518 | dsb(); |
| 519 | |
| 520 | /* Wait until the write takes effect. */ |
| 521 | while(readl(GCC_WDOG_DEBUG) & (1 << WDOG_DEBUG_DISABLE_BIT)); |
| 522 | |
Neeti Desai | 120b55d | 2012-08-20 17:15:56 -0700 | [diff] [blame] | 523 | /* Drop PS_HOLD for MSM */ |
| 524 | writel(0x00, MPM2_MPM_PS_HOLD); |
| 525 | |
| 526 | mdelay(5000); |
| 527 | |
| 528 | dprintf(CRITICAL, "Rebooting failed\n"); |
| 529 | } |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 530 | |
Pavel Nedev | a4c9d3a | 2013-05-15 14:42:34 +0300 | [diff] [blame] | 531 | int set_download_mode(enum dload_mode mode) |
Pavel Nedev | 0351149 | 2013-03-08 19:05:32 -0800 | [diff] [blame] | 532 | { |
Pavel Nedev | a4c9d3a | 2013-05-15 14:42:34 +0300 | [diff] [blame] | 533 | dload_util_write_cookie(mode == NORMAL_DLOAD ? |
| 534 | DLOAD_MODE_ADDR_V2 : EMERGENCY_DLOAD_MODE_ADDR_V2, mode); |
Pavel Nedev | 0351149 | 2013-03-08 19:05:32 -0800 | [diff] [blame] | 535 | |
| 536 | return 0; |
| 537 | } |
| 538 | |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 539 | /* Check if MSM needs VBUS mimic for USB */ |
| 540 | static int target_needs_vbus_mimic() |
| 541 | { |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 542 | if (platform_is_8974()) |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 543 | return 0; |
| 544 | |
| 545 | return 1; |
| 546 | } |
| 547 | |
Eugene Yasman | a0d1812 | 2013-02-26 13:23:05 +0200 | [diff] [blame] | 548 | /* Do target specific usb initialization */ |
| 549 | void target_usb_init(void) |
| 550 | { |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 551 | uint32_t val; |
| 552 | |
Eugene Yasman | a0d1812 | 2013-02-26 13:23:05 +0200 | [diff] [blame] | 553 | /* Enable secondary USB PHY on DragonBoard8074 */ |
| 554 | if (board_hardware_id() == HW_PLATFORM_DRAGON) { |
| 555 | /* Route ChipIDea to use secondary USB HS port2 */ |
| 556 | writel_relaxed(1, USB2_PHY_SEL); |
| 557 | |
| 558 | /* Enable access to secondary PHY by clamping the low |
| 559 | * voltage interface between DVDD of the PHY and Vddcx |
| 560 | * (set bit16 (USB2_PHY_HS2_DIG_CLAMP_N_2) = 1) */ |
| 561 | writel_relaxed(readl_relaxed(USB_OTG_HS_PHY_SEC_CTRL) |
| 562 | | 0x00010000, USB_OTG_HS_PHY_SEC_CTRL); |
| 563 | |
| 564 | /* Perform power-on-reset of the PHY. |
| 565 | * Delay values are arbitrary */ |
| 566 | writel_relaxed(readl_relaxed(USB_OTG_HS_PHY_CTRL)|1, |
| 567 | USB_OTG_HS_PHY_CTRL); |
| 568 | thread_sleep(10); |
| 569 | writel_relaxed(readl_relaxed(USB_OTG_HS_PHY_CTRL) & 0xFFFFFFFE, |
| 570 | USB_OTG_HS_PHY_CTRL); |
| 571 | thread_sleep(10); |
| 572 | |
| 573 | /* Enable HSUSB PHY port for ULPI interface, |
| 574 | * then configure related parameters within the PHY */ |
| 575 | writel_relaxed(((readl_relaxed(USB_PORTSC) & 0xC0000000) |
| 576 | | 0x8c000004), USB_PORTSC); |
| 577 | } |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 578 | |
| 579 | if (target_needs_vbus_mimic()) |
| 580 | { |
| 581 | /* Select and enable external configuration with USB PHY */ |
| 582 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET); |
| 583 | |
| 584 | /* Enable sess_vld */ |
| 585 | val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN; |
| 586 | writel(val, USB_GENCONFIG_2); |
| 587 | |
| 588 | /* Enable external vbus configuration in the LINK */ |
| 589 | val = readl(USB_USBCMD); |
| 590 | val |= SESS_VLD_CTRL; |
| 591 | writel(val, USB_USBCMD); |
| 592 | } |
Eugene Yasman | a0d1812 | 2013-02-26 13:23:05 +0200 | [diff] [blame] | 593 | } |
| 594 | |
Casey Piper | 74f8e5c | 2013-09-05 15:00:30 -0700 | [diff] [blame] | 595 | uint8_t target_panel_auto_detect_enabled() |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 596 | { |
Siddhartha Agrawal | 17a6b83 | 2013-02-17 18:36:25 -0800 | [diff] [blame] | 597 | switch(board_hardware_id()) |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 598 | { |
Siddhartha Agrawal | 17a6b83 | 2013-02-17 18:36:25 -0800 | [diff] [blame] | 599 | case HW_PLATFORM_SURF: |
| 600 | case HW_PLATFORM_MTP: |
| 601 | case HW_PLATFORM_FLUID: |
Siddhartha Agrawal | 17a6b83 | 2013-02-17 18:36:25 -0800 | [diff] [blame] | 602 | return 1; |
| 603 | break; |
| 604 | default: |
Siddhartha Agrawal | 17a6b83 | 2013-02-17 18:36:25 -0800 | [diff] [blame] | 605 | return 0; |
Casey Piper | 74f8e5c | 2013-09-05 15:00:30 -0700 | [diff] [blame] | 606 | break; |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 607 | } |
Casey Piper | 74f8e5c | 2013-09-05 15:00:30 -0700 | [diff] [blame] | 608 | return 0; |
| 609 | } |
| 610 | |
Casey Piper | 74f67a3 | 2013-11-18 13:26:18 -0800 | [diff] [blame] | 611 | uint8_t target_is_edp() |
| 612 | { |
| 613 | switch(board_hardware_id()) |
| 614 | { |
| 615 | case HW_PLATFORM_LIQUID: |
| 616 | return 1; |
| 617 | break; |
| 618 | default: |
| 619 | return 0; |
| 620 | break; |
| 621 | } |
| 622 | return 0; |
| 623 | } |
| 624 | |
Casey Piper | 74f8e5c | 2013-09-05 15:00:30 -0700 | [diff] [blame] | 625 | static uint8_t splash_override; |
| 626 | /* Returns 1 if target supports continuous splash screen. */ |
| 627 | int target_cont_splash_screen() |
| 628 | { |
| 629 | uint8_t splash_screen = 0; |
| 630 | if(!splash_override) { |
| 631 | switch(board_hardware_id()) |
| 632 | { |
| 633 | case HW_PLATFORM_SURF: |
| 634 | case HW_PLATFORM_MTP: |
| 635 | case HW_PLATFORM_FLUID: |
| 636 | case HW_PLATFORM_DRAGON: |
| 637 | case HW_PLATFORM_LIQUID: |
| 638 | dprintf(SPEW, "Target_cont_splash=1\n"); |
| 639 | splash_screen = 1; |
| 640 | break; |
| 641 | default: |
| 642 | dprintf(SPEW, "Target_cont_splash=0\n"); |
| 643 | splash_screen = 0; |
| 644 | } |
| 645 | } |
| 646 | return splash_screen; |
| 647 | } |
| 648 | |
| 649 | void target_force_cont_splash_disable(uint8_t override) |
| 650 | { |
| 651 | splash_override = override; |
Siddhartha Agrawal | 7ac6d51 | 2013-01-22 18:39:50 -0800 | [diff] [blame] | 652 | } |
sundarajan srinivasan | b5db0a9 | 2013-02-12 19:19:27 -0800 | [diff] [blame] | 653 | |
| 654 | unsigned target_pause_for_battery_charge(void) |
| 655 | { |
| 656 | uint8_t pon_reason = pm8x41_get_pon_reason(); |
| 657 | |
| 658 | /* This function will always return 0 to facilitate |
| 659 | * automated testing/reboot with usb connected. |
| 660 | * uncomment if this feature is needed */ |
| 661 | /* if ((pon_reason == USB_CHG) || (pon_reason == DC_CHG)) |
| 662 | return 1;*/ |
| 663 | |
| 664 | return 0; |
| 665 | } |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 666 | |
Channagoud Kadabi | 9faa45b | 2013-06-18 18:33:02 -0700 | [diff] [blame] | 667 | void target_uninit(void) |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 668 | { |
Channagoud Kadabi | 9faa45b | 2013-06-18 18:33:02 -0700 | [diff] [blame] | 669 | #if MMC_SDHCI_SUPPORT |
| 670 | mmc_put_card_to_sleep(dev); |
| 671 | #else |
| 672 | mmc_put_card_to_sleep(); |
| 673 | #endif |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 674 | #ifdef SSD_ENABLE |
| 675 | clock_ce_disable(SSD_CE_INSTANCE_1); |
| 676 | #endif |
Channagoud Kadabi | 2095a41 | 2013-12-04 12:37:06 -0800 | [diff] [blame] | 677 | if (crypto_initialized()) |
| 678 | crypto_eng_cleanup(); |
sundarajan srinivasan | a098d83 | 2013-03-07 12:19:30 -0800 | [diff] [blame] | 679 | } |
Deepa Dinamani | 65df982 | 2013-03-08 13:38:34 -0800 | [diff] [blame] | 680 | |
| 681 | void shutdown_device() |
| 682 | { |
| 683 | dprintf(CRITICAL, "Going down for shutdown.\n"); |
| 684 | |
| 685 | /* Configure PMIC for shutdown. */ |
Channagoud Kadabi | 0de103c | 2013-09-26 10:44:57 -0700 | [diff] [blame] | 686 | if (platform_is_8974() && (pmic_ver == PM8X41_VERSION_V2)) |
Deepa Dinamani | 65df982 | 2013-03-08 13:38:34 -0800 | [diff] [blame] | 687 | pm8x41_v2_reset_configure(PON_PSHOLD_SHUTDOWN); |
| 688 | else |
| 689 | pm8x41_reset_configure(PON_PSHOLD_SHUTDOWN); |
| 690 | |
| 691 | /* Drop PS_HOLD for MSM */ |
| 692 | writel(0x00, MPM2_MPM_PS_HOLD); |
| 693 | |
| 694 | mdelay(5000); |
| 695 | |
| 696 | dprintf(CRITICAL, "Shutdown failed\n"); |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 697 | } |
| 698 | |
| 699 | static void set_sdc_power_ctrl() |
| 700 | { |
Channagoud Kadabi | 224d832 | 2013-09-27 14:25:22 -0700 | [diff] [blame] | 701 | uint8_t tlmm_hdrv_clk = 0; |
| 702 | uint32_t platform_id = 0; |
| 703 | |
| 704 | platform_id = board_platform_id(); |
| 705 | |
| 706 | switch(platform_id) |
| 707 | { |
| 708 | case MSM8274AA: |
| 709 | case MSM8274AB: |
| 710 | case MSM8674AA: |
| 711 | case MSM8674AB: |
| 712 | case MSM8974AA: |
| 713 | case MSM8974AB: |
| 714 | if (board_hardware_id() == HW_PLATFORM_MTP) |
| 715 | tlmm_hdrv_clk = TLMM_CUR_VAL_10MA; |
| 716 | else |
| 717 | tlmm_hdrv_clk = TLMM_CUR_VAL_16MA; |
| 718 | break; |
| 719 | default: |
| 720 | tlmm_hdrv_clk = TLMM_CUR_VAL_16MA; |
| 721 | }; |
| 722 | |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 723 | /* Drive strength configs for sdc pins */ |
| 724 | struct tlmm_cfgs sdc1_hdrv_cfg[] = |
| 725 | { |
Channagoud Kadabi | 224d832 | 2013-09-27 14:25:22 -0700 | [diff] [blame] | 726 | { SDC1_CLK_HDRV_CTL_OFF, tlmm_hdrv_clk, TLMM_HDRV_MASK }, |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 727 | { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK }, |
| 728 | { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK }, |
| 729 | }; |
| 730 | |
| 731 | /* Pull configs for sdc pins */ |
| 732 | struct tlmm_cfgs sdc1_pull_cfg[] = |
| 733 | { |
| 734 | { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK }, |
| 735 | { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK }, |
| 736 | { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK }, |
| 737 | }; |
| 738 | |
Channagoud Kadabi | 389cab2 | 2013-08-20 15:29:15 -0700 | [diff] [blame] | 739 | struct tlmm_cfgs sdc1_rclk_cfg[] = |
| 740 | { |
| 741 | { SDC1_RCLK_PULL_CTL_OFF, TLMM_PULL_DOWN, TLMM_PULL_MASK }, |
| 742 | }; |
| 743 | |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 744 | /* Set the drive strength & pull control values */ |
| 745 | tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg)); |
| 746 | tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg)); |
Channagoud Kadabi | 389cab2 | 2013-08-20 15:29:15 -0700 | [diff] [blame] | 747 | |
| 748 | /* RCLK is supported only with 8974 pro, set rclk to pull down |
| 749 | * only for 8974 pro targets |
| 750 | */ |
| 751 | if (!platform_is_8974()) |
| 752 | tlmm_set_pull_ctrl(sdc1_rclk_cfg, ARRAY_SIZE(sdc1_rclk_cfg)); |
Channagoud Kadabi | 744c890 | 2013-04-02 11:54:53 -0700 | [diff] [blame] | 753 | } |
Stanimir Varbanov | f64a029 | 2013-04-29 11:58:27 +0300 | [diff] [blame] | 754 | |
| 755 | int emmc_recovery_init(void) |
| 756 | { |
| 757 | return _emmc_recovery_init(); |
| 758 | } |
Channagoud Kadabi | 6d215b9 | 2013-06-23 16:47:07 -0700 | [diff] [blame] | 759 | |
| 760 | void target_usb_stop(void) |
| 761 | { |
| 762 | uint32_t platform = board_platform_id(); |
| 763 | |
| 764 | /* Disable VBUS mimicing in the controller. */ |
| 765 | if (target_needs_vbus_mimic()) |
| 766 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR); |
| 767 | } |
Amol Jadi | 4c3229f | 2013-10-07 14:38:06 -0700 | [diff] [blame] | 768 | |
| 769 | /* identify the usb controller to be used for the target */ |
| 770 | const char * target_usb_controller() |
| 771 | { |
| 772 | switch(board_platform_id()) |
| 773 | { |
| 774 | /* use dwc controller for PRO chips (with some exceptions) */ |
| 775 | case MSM8974AA: |
| 776 | case MSM8974AB: |
| 777 | case MSM8974AC: |
| 778 | /* exceptions based on hardware id */ |
| 779 | if (board_hardware_id() != HW_PLATFORM_DRAGON) |
| 780 | return "dwc"; |
| 781 | /* fall through to default "ci" for anything that did'nt select "dwc" */ |
| 782 | default: |
| 783 | return "ci"; |
| 784 | } |
| 785 | } |
Amol Jadi | 28864bb | 2013-10-11 14:12:59 -0700 | [diff] [blame] | 786 | |
| 787 | /* UTMI MUX configuration to connect PHY to SNPS controller: |
| 788 | * Configure primary HS phy mux to use UTMI interface |
| 789 | * (connected to usb30 controller). |
| 790 | */ |
| 791 | static void tcsr_hs_phy_mux_configure(void) |
| 792 | { |
| 793 | uint32_t reg; |
| 794 | |
| 795 | reg = readl(USB2_PHY_SEL); |
| 796 | |
| 797 | writel(reg | 0x1, USB2_PHY_SEL); |
| 798 | } |
| 799 | |
| 800 | /* configure hs phy mux if using dwc controller */ |
| 801 | void target_usb_phy_mux_configure(void) |
| 802 | { |
| 803 | if(!strcmp(target_usb_controller(), "dwc")) |
| 804 | { |
| 805 | tcsr_hs_phy_mux_configure(); |
| 806 | } |
| 807 | } |