lijuang | c518f5d | 2015-02-10 10:22:53 +0800 | [diff] [blame] | 1 | /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
| 12 | * * Neither the name of The Linux Foundation nor the names of its |
| 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #include <debug.h> |
| 30 | #include <platform/iomap.h> |
| 31 | #include <reg.h> |
| 32 | #include <target.h> |
| 33 | #include <platform.h> |
| 34 | #include <uart_dm.h> |
| 35 | #include <mmc.h> |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 36 | #include <platform/gpio.h> |
| 37 | #include <dev/keys.h> |
| 38 | #include <spmi_v2.h> |
| 39 | #include <pm8x41.h> |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 40 | #include <board.h> |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 41 | #include <baseband.h> |
| 42 | #include <hsusb.h> |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 43 | #include <scm.h> |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 44 | #include <platform/gpio.h> |
| 45 | #include <platform/gpio.h> |
| 46 | #include <platform/irqs.h> |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 47 | #include <platform/clock.h> |
| 48 | #include <crypto5_wrapper.h> |
| 49 | #include <partition_parser.h> |
| 50 | #include <stdlib.h> |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 51 | |
Matthew Qin | f3ebf18 | 2014-04-08 11:38:14 +0800 | [diff] [blame] | 52 | #if LONG_PRESS_POWER_ON |
| 53 | #include <shutdown_detect.h> |
| 54 | #endif |
| 55 | |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 56 | #if PON_VIB_SUPPORT |
| 57 | #include <vibrator.h> |
| 58 | #endif |
| 59 | |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 60 | #define PMIC_ARB_CHANNEL_NUM 0 |
| 61 | #define PMIC_ARB_OWNER_ID 0 |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 62 | #define TLMM_VOL_UP_BTN_GPIO 107 |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 63 | |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 64 | #if PON_VIB_SUPPORT |
| 65 | #define VIBRATE_TIME 250 |
| 66 | #endif |
| 67 | |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 68 | #define CE1_INSTANCE 1 |
| 69 | #define CE_EE 1 |
| 70 | #define CE_FIFO_SIZE 64 |
| 71 | #define CE_READ_PIPE 3 |
| 72 | #define CE_WRITE_PIPE 2 |
| 73 | #define CE_READ_PIPE_LOCK_GRP 0 |
| 74 | #define CE_WRITE_PIPE_LOCK_GRP 0 |
| 75 | #define CE_ARRAY_SIZE 20 |
| 76 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 77 | static void set_sdc_power_ctrl(void); |
| 78 | |
| 79 | struct mmc_device *dev; |
| 80 | |
| 81 | static uint32_t mmc_pwrctl_base[] = |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 82 | { MSM_SDC1_BASE, MSM_SDC2_BASE }; |
| 83 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 84 | static uint32_t mmc_sdhci_base[] = |
| 85 | { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE }; |
| 86 | |
| 87 | static uint32_t mmc_sdc_pwrctl_irq[] = |
| 88 | { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ }; |
| 89 | |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 90 | void target_early_init(void) |
| 91 | { |
| 92 | #if WITH_DEBUG_UART |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 93 | uart_dm_init(2, 0, BLSP1_UART1_BASE); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 94 | #endif |
| 95 | } |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 96 | |
| 97 | void target_sdc_init() |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 98 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 99 | struct mmc_config_data config; |
| 100 | |
| 101 | /* Set drive strength & pull ctrl values */ |
| 102 | set_sdc_power_ctrl(); |
| 103 | |
| 104 | config.bus_width = DATA_BUS_WIDTH_8BIT; |
Aparna Mallavarapu | 53b0940 | 2014-03-26 14:46:43 +0530 | [diff] [blame] | 105 | config.max_clk_rate = MMC_CLK_177MHZ; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 106 | |
| 107 | /* Try slot 1*/ |
| 108 | config.slot = 1; |
| 109 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 110 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 111 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 112 | config.hs400_support = 0; |
| 113 | |
| 114 | if (!(dev = mmc_init(&config))) { |
| 115 | /* Try slot 2 */ |
| 116 | config.slot = 2; |
Aparna Mallavarapu | 53b0940 | 2014-03-26 14:46:43 +0530 | [diff] [blame] | 117 | config.max_clk_rate = MMC_CLK_200MHZ; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 118 | config.sdhc_base = mmc_sdhci_base[config.slot - 1]; |
| 119 | config.pwrctl_base = mmc_pwrctl_base[config.slot - 1]; |
| 120 | config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1]; |
| 121 | |
| 122 | if (!(dev = mmc_init(&config))) { |
| 123 | dprintf(CRITICAL, "mmc init failed!"); |
| 124 | ASSERT(0); |
| 125 | } |
| 126 | } |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 127 | } |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 128 | |
| 129 | void *target_mmc_device() |
| 130 | { |
| 131 | return (void *) dev; |
| 132 | } |
| 133 | |
| 134 | /* Return 1 if vol_up pressed */ |
| 135 | static int target_volume_up() |
| 136 | { |
| 137 | uint8_t status = 0; |
| 138 | |
| 139 | gpio_tlmm_config(TLMM_VOL_UP_BTN_GPIO, 0, GPIO_INPUT, GPIO_PULL_UP, GPIO_2MA, GPIO_ENABLE); |
| 140 | |
| 141 | /* Wait for the gpio config to take effect - debounce time */ |
| 142 | thread_sleep(10); |
| 143 | |
| 144 | /* Get status of GPIO */ |
| 145 | status = gpio_status(TLMM_VOL_UP_BTN_GPIO); |
| 146 | |
| 147 | /* Active low signal. */ |
| 148 | return !status; |
| 149 | } |
| 150 | |
| 151 | /* Return 1 if vol_down pressed */ |
| 152 | uint32_t target_volume_down() |
| 153 | { |
| 154 | /* Volume down button tied in with PMIC RESIN. */ |
| 155 | return pm8x41_resin_status(); |
| 156 | } |
| 157 | |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 158 | static void target_keystatus() |
| 159 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 160 | keys_init(); |
| 161 | |
| 162 | if(target_volume_down()) |
| 163 | keys_post_event(KEY_VOLUMEDOWN, 1); |
| 164 | |
| 165 | if(target_volume_up()) |
| 166 | keys_post_event(KEY_VOLUMEUP, 1); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 167 | } |
| 168 | |
| 169 | void target_init(void) |
| 170 | { |
| 171 | uint32_t base_addr; |
| 172 | uint8_t slot; |
| 173 | |
| 174 | dprintf(INFO, "target_init()\n"); |
| 175 | |
| 176 | spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID); |
| 177 | |
| 178 | target_keystatus(); |
| 179 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 180 | target_sdc_init(); |
| 181 | if (partition_read_table()) |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 182 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 183 | dprintf(CRITICAL, "Error reading the partition table info\n"); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 184 | ASSERT(0); |
| 185 | } |
Matthew Qin | f3ebf18 | 2014-04-08 11:38:14 +0800 | [diff] [blame] | 186 | |
| 187 | #if LONG_PRESS_POWER_ON |
| 188 | shutdown_detect(); |
| 189 | #endif |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 190 | |
| 191 | #if PON_VIB_SUPPORT |
| 192 | /* turn on vibrator to indicate that phone is booting up to end user */ |
| 193 | vib_timed_turn_on(VIBRATE_TIME); |
| 194 | #endif |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 195 | |
| 196 | if (target_use_signed_kernel()) |
| 197 | target_crypto_init_params(); |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 198 | } |
| 199 | |
| 200 | void target_serialno(unsigned char *buf) |
| 201 | { |
| 202 | uint32_t serialno; |
| 203 | if (target_is_emmc_boot()) { |
| 204 | serialno = mmc_get_psn(); |
| 205 | snprintf((char *)buf, 13, "%x", serialno); |
| 206 | } |
| 207 | } |
| 208 | |
| 209 | unsigned board_machtype(void) |
| 210 | { |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 211 | return LINUX_MACHTYPE_UNKNOWN; |
| 212 | } |
| 213 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 214 | /* Detect the target type */ |
| 215 | void target_detect(struct board_data *board) |
| 216 | { |
| 217 | /* |
| 218 | * already fill the board->target on board.c |
| 219 | */ |
| 220 | } |
| 221 | |
| 222 | void target_baseband_detect(struct board_data *board) |
| 223 | { |
| 224 | uint32_t platform; |
| 225 | |
| 226 | platform = board->platform; |
| 227 | switch(platform) |
| 228 | { |
| 229 | case MSM8916: |
Aparna Mallavarapu | 9b482a8 | 2014-06-02 21:18:34 +0530 | [diff] [blame] | 230 | case MSM8116: |
| 231 | case MSM8216: |
| 232 | case MSM8616: |
Aparna Mallavarapu | d81c99e | 2014-04-20 23:32:51 +0530 | [diff] [blame] | 233 | case MSM8939: |
| 234 | case MSM8236: |
| 235 | case MSM8636: |
Unnati Gandhi | ad17b72 | 2014-06-11 23:04:54 +0530 | [diff] [blame] | 236 | case MSM8936: |
Aparna Mallavarapu | 36cae9d | 2014-08-04 12:51:10 +0530 | [diff] [blame] | 237 | case MSM8239: |
vijay kumar | dd51c59 | 2015-01-05 12:46:28 +0530 | [diff] [blame] | 238 | case MSM8929: |
| 239 | case MSM8629: |
| 240 | case MSM8229: |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 241 | board->baseband = BASEBAND_MSM; |
| 242 | break; |
Aparna Mallavarapu | 9b482a8 | 2014-06-02 21:18:34 +0530 | [diff] [blame] | 243 | case APQ8016: |
Aparna Mallavarapu | d81c99e | 2014-04-20 23:32:51 +0530 | [diff] [blame] | 244 | case APQ8039: |
| 245 | case APQ8036: |
vijay kumar | dd51c59 | 2015-01-05 12:46:28 +0530 | [diff] [blame] | 246 | case APQ8029: |
Aparna Mallavarapu | d81c99e | 2014-04-20 23:32:51 +0530 | [diff] [blame] | 247 | board->baseband = BASEBAND_APQ; |
| 248 | break; |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 249 | default: |
| 250 | dprintf(CRITICAL, "Platform type: %u is not supported\n", platform); |
| 251 | ASSERT(0); |
| 252 | }; |
| 253 | } |
| 254 | |
| 255 | unsigned target_baseband() |
| 256 | { |
| 257 | return board_baseband(); |
| 258 | } |
| 259 | |
| 260 | int emmc_recovery_init(void) |
| 261 | { |
| 262 | return _emmc_recovery_init(); |
| 263 | } |
| 264 | |
| 265 | static void set_sdc_power_ctrl() |
| 266 | { |
| 267 | /* Drive strength configs for sdc pins */ |
| 268 | struct tlmm_cfgs sdc1_hdrv_cfg[] = |
| 269 | { |
vijay kumar | 34f5410 | 2014-10-27 21:55:47 +0530 | [diff] [blame] | 270 | { SDC1_CLK_HDRV_CTL_OFF, TLMM_CUR_VAL_16MA, TLMM_HDRV_MASK, 0}, |
| 271 | { SDC1_CMD_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK, 0}, |
vijay kumar | f1d659c | 2015-03-17 19:54:14 +0530 | [diff] [blame] | 272 | { SDC1_DATA_HDRV_CTL_OFF, TLMM_CUR_VAL_10MA, TLMM_HDRV_MASK , 0}, |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 273 | }; |
| 274 | |
| 275 | /* Pull configs for sdc pins */ |
| 276 | struct tlmm_cfgs sdc1_pull_cfg[] = |
| 277 | { |
vijay kumar | 34f5410 | 2014-10-27 21:55:47 +0530 | [diff] [blame] | 278 | { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, 0}, |
| 279 | { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0}, |
| 280 | { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, 0}, |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 281 | }; |
| 282 | |
| 283 | /* Set the drive strength & pull control values */ |
| 284 | tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg)); |
| 285 | tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg)); |
| 286 | } |
| 287 | |
| 288 | void target_usb_init(void) |
| 289 | { |
| 290 | uint32_t val; |
| 291 | |
| 292 | /* Select and enable external configuration with USB PHY */ |
| 293 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_SET); |
| 294 | |
| 295 | /* Enable sess_vld */ |
| 296 | val = readl(USB_GENCONFIG_2) | GEN2_SESS_VLD_CTRL_EN; |
| 297 | writel(val, USB_GENCONFIG_2); |
| 298 | |
| 299 | /* Enable external vbus configuration in the LINK */ |
| 300 | val = readl(USB_USBCMD); |
| 301 | val |= SESS_VLD_CTRL; |
| 302 | writel(val, USB_USBCMD); |
| 303 | } |
| 304 | |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 305 | uint8_t target_panel_auto_detect_enabled() |
| 306 | { |
| 307 | uint8_t ret = 0; |
| 308 | uint32_t hw_subtype = board_hardware_subtype(); |
| 309 | |
| 310 | switch(board_hardware_id()) { |
| 311 | case HW_PLATFORM_SURF: |
Vineet Bajaj | 5cd5b11 | 2015-02-09 16:13:30 +0530 | [diff] [blame] | 312 | case HW_PLATFORM_MTP: |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 313 | ret = 1; |
| 314 | break; |
| 315 | default: |
| 316 | ret = 0; |
| 317 | break; |
| 318 | } |
| 319 | return ret; |
| 320 | } |
| 321 | |
| 322 | static uint8_t splash_override; |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 323 | /* Returns 1 if target supports continuous splash screen. */ |
| 324 | int target_cont_splash_screen() |
| 325 | { |
| 326 | uint8_t splash_screen = 0; |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 327 | if (!splash_override) { |
| 328 | switch (board_hardware_id()) { |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 329 | case HW_PLATFORM_MTP: |
| 330 | case HW_PLATFORM_SURF: |
Mao Flynn | 8140947 | 2014-04-10 15:01:30 +0800 | [diff] [blame] | 331 | case HW_PLATFORM_QRD: |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 332 | splash_screen = 1; |
| 333 | break; |
| 334 | default: |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 335 | splash_screen = 0; |
| 336 | break; |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 337 | } |
| 338 | dprintf(SPEW, "Target_cont_splash=%d\n", splash_screen); |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 339 | } |
Padmanabhan Komanduru | 1869a76 | 2014-04-01 20:12:05 +0530 | [diff] [blame] | 340 | return splash_screen; |
| 341 | } |
| 342 | |
| 343 | void target_force_cont_splash_disable(uint8_t override) |
| 344 | { |
| 345 | splash_override = override; |
Padmanabhan Komanduru | cd5645e | 2014-03-25 20:34:18 +0530 | [diff] [blame] | 346 | } |
| 347 | |
Zhenhua Huang | 9b8cb1c | 2014-04-11 15:23:05 +0800 | [diff] [blame] | 348 | unsigned target_pause_for_battery_charge(void) |
| 349 | { |
| 350 | uint8_t pon_reason = pm8x41_get_pon_reason(); |
| 351 | uint8_t is_cold_boot = pm8x41_get_is_cold_boot(); |
| 352 | dprintf(INFO, "%s : pon_reason is %d cold_boot:%d\n", __func__, |
| 353 | pon_reason, is_cold_boot); |
| 354 | /* In case of fastboot reboot,adb reboot or if we see the power key |
| 355 | * pressed we do not want go into charger mode. |
| 356 | * fastboot reboot is warm boot with PON hard reset bit not set |
| 357 | * adb reboot is a cold boot with PON hard reset bit set |
| 358 | */ |
| 359 | if (is_cold_boot && |
| 360 | (!(pon_reason & HARD_RST)) && |
| 361 | (!(pon_reason & KPDPWR_N)) && |
Zhenhua Huang | d01ef5f | 2015-02-16 11:22:10 +0800 | [diff] [blame] | 362 | ((pon_reason & USB_CHG) || (pon_reason & DC_CHG) || (pon_reason & CBLPWR_N))) |
Zhenhua Huang | 9b8cb1c | 2014-04-11 15:23:05 +0800 | [diff] [blame] | 363 | return 1; |
| 364 | else |
| 365 | return 0; |
| 366 | } |
| 367 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 368 | void target_usb_stop(void) |
| 369 | { |
| 370 | /* Disable VBUS mimicing in the controller. */ |
| 371 | ulpi_write(ULPI_MISC_A_VBUSVLDEXTSEL | ULPI_MISC_A_VBUSVLDEXT, ULPI_MISC_A_CLEAR); |
| 372 | } |
| 373 | |
| 374 | |
| 375 | void target_uninit(void) |
| 376 | { |
Matthew Qin | 7f5ab93 | 2014-04-08 15:25:54 +0800 | [diff] [blame] | 377 | #if PON_VIB_SUPPORT |
| 378 | /* wait for the vibrator timer is expried */ |
| 379 | wait_vib_timeout(); |
| 380 | #endif |
| 381 | |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 382 | mmc_put_card_to_sleep(dev); |
| 383 | sdhci_mode_disable(&dev->host); |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 384 | |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 385 | if (crypto_initialized()) |
| 386 | crypto_eng_cleanup(); |
Aparna Mallavarapu | 25aff01 | 2014-05-08 12:21:44 +0530 | [diff] [blame] | 387 | |
| 388 | if (target_is_ssd_enabled()) |
| 389 | clock_ce_disable(CE1_INSTANCE); |
Aparna Mallavarapu | 7cc5a79 | 2014-02-27 21:49:59 -0800 | [diff] [blame] | 390 | } |
| 391 | |
| 392 | /* Do any target specific intialization needed before entering fastboot mode */ |
| 393 | void target_fastboot_init(void) |
| 394 | { |
| 395 | /* Set the BOOT_DONE flag in PM8916 */ |
| 396 | pm8x41_set_boot_done(); |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 397 | |
| 398 | if (target_is_ssd_enabled()) { |
| 399 | clock_ce_enable(CE1_INSTANCE); |
| 400 | target_load_ssd_keystore(); |
| 401 | } |
Aparna Mallavarapu | fe1f3d1 | 2013-10-19 15:05:30 +0530 | [diff] [blame] | 402 | } |
Aparna Mallavarapu | acb6ede | 2014-03-21 19:22:00 +0530 | [diff] [blame] | 403 | |
| 404 | int set_download_mode(enum dload_mode mode) |
| 405 | { |
| 406 | int ret = 0; |
| 407 | ret = scm_dload_mode(mode); |
| 408 | |
| 409 | pm8x41_clear_pmic_watchdog(); |
| 410 | |
| 411 | return ret; |
| 412 | } |
Aparna Mallavarapu | 7c8e75f | 2014-04-22 20:20:28 +0530 | [diff] [blame] | 413 | |
| 414 | void target_load_ssd_keystore(void) |
| 415 | { |
| 416 | uint64_t ptn; |
| 417 | int index; |
| 418 | uint64_t size; |
| 419 | uint32_t *buffer = NULL; |
| 420 | |
| 421 | if (!target_is_ssd_enabled()) |
| 422 | return; |
| 423 | |
| 424 | index = partition_get_index("ssd"); |
| 425 | |
| 426 | ptn = partition_get_offset(index); |
| 427 | if (ptn == 0){ |
| 428 | dprintf(CRITICAL, "Error: ssd partition not found\n"); |
| 429 | return; |
| 430 | } |
| 431 | |
| 432 | size = partition_get_size(index); |
| 433 | if (size == 0) { |
| 434 | dprintf(CRITICAL, "Error: invalid ssd partition size\n"); |
| 435 | return; |
| 436 | } |
| 437 | |
| 438 | buffer = memalign(CACHE_LINE, ROUNDUP(size, CACHE_LINE)); |
| 439 | if (!buffer) { |
| 440 | dprintf(CRITICAL, "Error: allocating memory for ssd buffer\n"); |
| 441 | return; |
| 442 | } |
| 443 | |
| 444 | if (mmc_read(ptn, buffer, size)) { |
| 445 | dprintf(CRITICAL, "Error: cannot read data\n"); |
| 446 | free(buffer); |
| 447 | return; |
| 448 | } |
| 449 | |
| 450 | clock_ce_enable(CE1_INSTANCE); |
| 451 | scm_protect_keystore(buffer, size); |
| 452 | clock_ce_disable(CE1_INSTANCE); |
| 453 | free(buffer); |
| 454 | } |
| 455 | |
| 456 | crypto_engine_type board_ce_type(void) |
| 457 | { |
| 458 | return CRYPTO_ENGINE_TYPE_HW; |
| 459 | } |
| 460 | |
| 461 | /* Set up params for h/w CE. */ |
| 462 | void target_crypto_init_params() |
| 463 | { |
| 464 | struct crypto_init_params ce_params; |
| 465 | |
| 466 | /* Set up base addresses and instance. */ |
| 467 | ce_params.crypto_instance = CE1_INSTANCE; |
| 468 | ce_params.crypto_base = MSM_CE1_BASE; |
| 469 | ce_params.bam_base = MSM_CE1_BAM_BASE; |
| 470 | |
| 471 | /* Set up BAM config. */ |
| 472 | ce_params.bam_ee = CE_EE; |
| 473 | ce_params.pipes.read_pipe = CE_READ_PIPE; |
| 474 | ce_params.pipes.write_pipe = CE_WRITE_PIPE; |
| 475 | ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP; |
| 476 | ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP; |
| 477 | |
| 478 | /* Assign buffer sizes. */ |
| 479 | ce_params.num_ce = CE_ARRAY_SIZE; |
| 480 | ce_params.read_fifo_size = CE_FIFO_SIZE; |
| 481 | ce_params.write_fifo_size = CE_FIFO_SIZE; |
| 482 | |
| 483 | /* BAM is initialized by TZ for this platform. |
| 484 | * Do not do it again as the initialization address space |
| 485 | * is locked. |
| 486 | */ |
| 487 | ce_params.do_bam_init = 0; |
| 488 | |
| 489 | crypto_init_params(&ce_params); |
| 490 | } |
Aparna Mallavarapu | a115824 | 2014-05-23 14:47:44 +0530 | [diff] [blame] | 491 | |
| 492 | uint32_t target_get_hlos_subtype() |
| 493 | { |
| 494 | return board_hlos_subtype(); |
| 495 | } |
Channagoud Kadabi | b7dabeb | 2015-08-05 16:18:27 -0700 | [diff] [blame^] | 496 | |
| 497 | void pmic_reset_configure(uint8_t reset_type) |
| 498 | { |
| 499 | pm8x41_reset_configure(reset_type); |
| 500 | } |