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Channagoud Kadabi31d648c2015-01-29 12:59:00 -08001/* Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
vijay kumar4f4405f2014-08-08 11:49:53 +053039#include <platform.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070040
41extern void clock_init_mmc(uint32_t);
42extern void clock_config_mmc(uint32_t, uint32_t);
43
44/* data access time unit in ns */
45static const uint32_t taac_unit[] =
46{
47 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
48};
49
50/* data access time value x 10 */
51static const uint32_t taac_value[] =
52{
53 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
54};
55
56/* data transfer rate in kbit/s */
57static const uint32_t xfer_rate_unit[] =
58{
59 100, 1000, 10000, 100000, 0, 0, 0, 0
60};
61
62/* data transfer rate value x 10*/
63static const uint32_t xfer_rate_value[] =
64{
65 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
66};
67
68/*
69 * Function: mmc decode and save csd
70 * Arg : Card structure & raw csd
71 * Return : 0 on Success, 1 on Failure
72 * Flow : Decodes CSD response received from the card.
73 * Note that we have defined only few of the CSD elements
74 * in csd structure. We'll only decode those values.
75 */
76static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
77{
78 uint32_t mmc_sizeof = 0;
79 uint32_t mmc_unit = 0;
80 uint32_t mmc_value = 0;
81 uint32_t mmc_temp = 0;
82 uint32_t *raw_csd = card->raw_csd;
83
84 struct mmc_csd mmc_csd;
85
86 mmc_sizeof = sizeof(uint32_t) * 8;
87
88 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
89
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070090 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070091 /* Parse CSD according to SD card spec. */
92
93 /* CSD register is little bit differnet for CSD version 2.0 High
94 * Capacity and CSD version 1.0/2.0 Standard memory cards.
95 * In Version 2.0 some of the fields have fixed values and it's
96 * not necessary for host to refer these fields in CSD sent by
97 * card
98 */
99
100 if (mmc_csd.cmmc_structure == 1) {
101 /* CSD Version 2.0 */
102 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
103 /* Fixed value is 9 = 2^9 = 512 */
104 mmc_csd.write_blk_len = 512;
105 /* Fixed value is 9 = 512 */
106 mmc_csd.read_blk_len = 512;
107 /* Fixed value: 010b */
108 mmc_csd.r2w_factor = 0x2;
109 /* Not there in version 2.0 */
110 mmc_csd.c_size_mult = 0;
111 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
112 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
113 * 100;
114
115 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
116 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
117 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
118 / 10;
119
120 mmc_csd.erase_blk_len = 1;
121 mmc_csd.read_blk_misalign = 0;
122 mmc_csd.write_blk_misalign = 0;
123 mmc_csd.read_blk_partial = 0;
124 mmc_csd.write_blk_partial = 0;
125
126 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
127 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
128 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
129 xfer_rate_unit[mmc_unit]) / 10;
130
131 mmc_csd.wp_grp_size = 0x0;
132 mmc_csd.wp_grp_enable = 0x0;
133 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
134 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
135
136 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700137 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700138 } else {
139 /* CSD Version 1.0 */
140 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
141
142 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
143 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
144 (1 << mmc_temp) : 512;
145
146 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
147 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
148 (1 << mmc_temp) : 512;
149
150 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
151 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
152 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
153 / 10;
154
155 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
156 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
157 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
158 xfer_rate_unit[mmc_unit]) / 10;
159
160 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
161 * 100;
162
163 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
164 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
165
166 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
167 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
168 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
169 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
170 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
171
172 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
173 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
174 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
175 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
176 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
177 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
178
179 /* Calculate the card capacity */
180 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700181 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700182 }
183 } else {
184 /* Parse CSD according to MMC card spec. */
185 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
186 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
187 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
188 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
189 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
190 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
191 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
192 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
193
194 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
195 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
196 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
197
198 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
199 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
200 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
201 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
202
203 /* Ignore -- no use of this value. */
204 mmc_csd.tran_speed = 0x00;
205
206 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
207 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
208 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
209 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
210 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
211 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
212
213 /* Calculate the card capcity */
214 if (mmc_csd.c_size != 0xFFF) {
215 /* For cards less than or equal to 2GB */
216 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700217 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700218 } else {
219 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
220 * is used to calculate the size.
221 */
222 uint64_t sec_count;
223
224 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
226 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
227 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700228 card->capacity = sec_count * MMC_BLK_SZ;
229 }
230 }
231
232 /* save the information in card structure */
233 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
234 sizeof(struct mmc_csd));
235
vijay kumar488e4842015-08-21 20:37:29 +0530236 if (MMC_CARD_MMC(card)) {
vijay kumar697dbfd2014-04-24 17:12:49 +0530237
vijay kumar488e4842015-08-21 20:37:29 +0530238 /* Calculate the wp grp size */
239 if (card->ext_csd[MMC_ERASE_GRP_DEF])
240 card->wp_grp_size = MMC_HC_ERASE_MULT * card->ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
241 else
242 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
243 * (card->csd.erase_grp_mult + 1);
244
245 card->rpmb_size = RPMB_PART_MIN_SIZE * card->ext_csd[RPMB_SIZE_MULT];
246 card->rel_wr_count = card->ext_csd[REL_WR_SEC_C];
247 }
248 else {
249 card->wp_grp_size = (card->csd.wp_grp_size + 1) * (card->csd.erase_grp_size + 1) \
250 * (card->csd.erase_grp_mult + 1);
251 }
Channagoud Kadabi31d648c2015-01-29 12:59:00 -0800252
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700253 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700254 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700255 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700256 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
257 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
258 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
259 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
260 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
261 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
262 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
263 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
264 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
265 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
266 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
267 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
268 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
269 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
vijay kumar697dbfd2014-04-24 17:12:49 +0530270 dprintf(SPEW, "wp_grp_size: %u\n", card->wp_grp_size);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700271 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
272
273 return 0;
274}
275
276/*
277 * Function: mmc decode & save cid
278 * Arg : card structure & raw cid
279 * Return : 0 on Success, 1 on Failure
280 * Flow : Decode CID sent by the card.
281 */
282static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
283 uint32_t *raw_cid)
284{
285 struct mmc_cid mmc_cid;
286 uint32_t mmc_sizeof = 0;
287 int i = 0;
288
289 if (!raw_cid) {
290 return 1;
291 }
292
293 mmc_sizeof = sizeof(uint32_t) * 8;
294
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700295 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700296 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
297 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
298
299 for (i = 0; i < 5; i++) {
300 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
301 (104 - 8 * (i + 1)),
302 8,
303 mmc_sizeof);
304 }
305 mmc_cid.pnm[5] = 0;
306 mmc_cid.pnm[6] = 0;
307
308 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700309 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700310 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
311 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
312 mmc_cid.year += 2000;
313 } else {
314 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
315 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
316
317 for (i = 0; i < 6; i++) {
318 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
319 8, mmc_sizeof);
320 }
321 mmc_cid.pnm[6] = 0;
322
323 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700324 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700325 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
326 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
327 mmc_cid.year += 1997;
328 }
329
330 /* save it in card database */
331 memcpy((struct mmc_cid *)&card->cid,
332 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
333
334 dprintf(SPEW, "Decoded CID fields:\n");
335 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
336 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
337 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
338 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
339 (mmc_cid.prv & 0xF));
340 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
341 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
342
343 return 0;
344}
345
346/*
347 * Function: mmc reset cards
348 * Arg : host structure
349 * Return : 0 on Success, 1 on Failure
350 * Flow : Reset all the cards to idle condition (CMD 0)
351 */
352static uint8_t mmc_reset_card(struct sdhci_host *host)
353{
354 struct mmc_command cmd;
355
356 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
357
358 cmd.cmd_index = CMD0_GO_IDLE_STATE;
359 cmd.argument = 0;
360 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
361 cmd.resp_type = SDHCI_CMD_RESP_NONE;
362
363 /* send command */
364 return sdhci_send_command(host, &cmd);
365}
366
367/*
368 * Function: mmc operations command
369 * Arg : host & card structure
370 * Return : 0 on Success, 1 on Failure
371 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
372 */
373static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
374{
375 struct mmc_command cmd;
376 uint32_t mmc_resp = 0;
377 uint32_t mmc_ret = 0;
378 uint32_t mmc_retry = 0;
379
380 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
381
382 /* CMD1 format:
383 * [31] Busy bit
384 * [30:29] Access mode
385 * [28:24] reserved
386 * [23:15] 2.7-3.6
387 * [14:8] 2.0-2.6
388 * [7] 1.7-1.95
389 * [6:0] reserved
390 */
391
392 cmd.cmd_index = CMD1_SEND_OP_COND;
393 cmd.argument = card->ocr;
394 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
395 cmd.resp_type = SDHCI_CMD_RESP_R3;
396
397 do {
398 mmc_ret = sdhci_send_command(host, &cmd);
399 if (mmc_ret)
400 return mmc_ret;
401
402 /* Command returned success, now it's time to examine response */
403 mmc_resp = cmd.resp[0];
404
405 /* Check the response for busy status */
406 if (!(mmc_resp & MMC_OCR_BUSY)) {
407 mmc_retry++;
408 mdelay(1);
409 continue;
410 } else
411 break;
412 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
413
414 /* If we reached here after max retries, we failed to get OCR */
415 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
416 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
417 return 1;
418 }
419
420 /* Response contains card's ocr. Update card's information */
421 card->ocr = mmc_resp;
422
423 if (mmc_resp & MMC_OCR_SEC_MODE)
424 card->type = MMC_TYPE_MMCHC;
425 else
426 card->type = MMC_TYPE_STD_MMC;
427
428 return 0;
429}
430
431/*
432 * Function: mmc send cid
433 * Arg : host & card structure
434 * Return : 0 on Success, 1 on Failure
435 * Flow : Request any card to send its uniquie card identification
436 * (CID) number (CMD2).
437 */
438static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
439{
440 struct mmc_command cmd;
441 uint32_t mmc_ret = 0;
442
443 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
444
445 /* CMD2 Format:
446 * [31:0] stuff bits
447 */
448 cmd.cmd_index = CMD2_ALL_SEND_CID;
449 cmd.argument = 0;
450 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
451 cmd.resp_type = SDHCI_CMD_RESP_R2;
452
453 /* send command */
454 mmc_ret = sdhci_send_command(host, &cmd);
455 if (mmc_ret) {
456 return mmc_ret;
457 }
458
459 /* Response contains card's 128 bits CID register */
460 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
461 if (mmc_ret) {
462 return mmc_ret;
463 }
464
465 return 0;
466}
467
468/*
469 * Function: mmc send relative address
470 * Arg : host & card structure
471 * Return : 0 on Success, 1 on Failure
472 * Flow : Ask card to send it's relative card address (RCA).
473 * This RCA number is shorter than CID and is used by
474 * the host to address the card in future (CMD3)
475 */
476static uint32_t mmc_send_relative_address(struct sdhci_host *host,
477 struct mmc_card *card)
478{
479 struct mmc_command cmd;
480 uint32_t mmc_ret = 0;
481
482 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
483
484 /* CMD3 Format:
485 * [31:0] stuff bits
486 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700487 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700488 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
489 cmd.argument = 0;
490 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
491 cmd.resp_type = SDHCI_CMD_RESP_R6;
492
493 /* send command */
494 mmc_ret = sdhci_send_command(host, &cmd);
495 if (mmc_ret)
496 return mmc_ret;
497
498 /* For sD, card will send RCA. Store it */
499 card->rca = (cmd.resp[0] >> 16);
500 } else {
501 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
502 cmd.argument = (MMC_RCA << 16);
503 card->rca = (cmd.argument >> 16);
504 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
505 cmd.resp_type = SDHCI_CMD_RESP_R6;
506
507 /* send command */
508 mmc_ret = sdhci_send_command(host, &cmd);
509 if (mmc_ret)
510 return mmc_ret;
511 }
512
513 return 0;
514}
515
516/*
517 * Function: mmc send csd
518 * Arg : host, card structure & o/p arg to store csd
519 * Return : 0 on Success, 1 on Failure
520 * Flow : Requests card to send it's CSD register's contents. (CMD9)
521 */
522static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
523{
524 struct mmc_command cmd;
525 uint32_t mmc_arg = 0;
526 uint32_t mmc_ret = 0;
527
528 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
529
530 /* CMD9 Format:
531 * [31:16] RCA
532 * [15:0] stuff bits
533 */
534 mmc_arg |= card->rca << 16;
535
536 cmd.cmd_index = CMD9_SEND_CSD;
537 cmd.argument = mmc_arg;
538 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
539 cmd.resp_type = SDHCI_CMD_RESP_R2;
540
541 /* send command */
542 mmc_ret = sdhci_send_command(host, &cmd);
543 if (mmc_ret)
544 return mmc_ret;
545
546 /* response contains the card csd */
547 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
548
549 return 0;
550}
551
552/*
553 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700554 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700555 * Return : 0 on Success, 1 on Failure
556 * Flow : Selects a card by sending CMD7 to the card with its RCA.
557 * If RCA field is set as 0 ( or any other address ),
558 * the card will be de-selected. (CMD7)
559 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700560static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700561{
562 struct mmc_command cmd;
563 uint32_t mmc_arg = 0;
564 uint32_t mmc_ret = 0;
565
566 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
567
568 /* CMD7 Format:
569 * [31:16] RCA
570 * [15:0] stuff bits
571 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700572 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700573
574 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
575 cmd.argument = mmc_arg;
576 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
577
578 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700579 if (card->rca) {
580 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700581 cmd.resp_type = SDHCI_CMD_RESP_R1B;
582 else
583 cmd.resp_type = SDHCI_CMD_RESP_R1;
584 } else
585 cmd.resp_type = SDHCI_CMD_RESP_NONE;
586
587 /* send command */
588 mmc_ret = sdhci_send_command(host, &cmd);
589 if (mmc_ret)
590 return mmc_ret;
591
592 return 0;
593}
594
595/*
596 * Function: mmc set block len
597 * Arg : host, card structure & block length
598 * Return : 0 on Success, 1 on Failure
599 * Flow : Send command to set block length.
600 */
601static uint32_t mmc_set_block_len(struct sdhci_host *host,
602 struct mmc_card *card,
603 uint32_t block_len)
604{
605 struct mmc_command cmd;
606 uint32_t mmc_ret = 0;
607
608 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
609
610 /* CMD16 Format:
611 * [31:0] block length
612 */
613
614 cmd.cmd_index = CMD16_SET_BLOCKLEN;
615 cmd.argument = block_len;
616 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
617 cmd.resp_type = SDHCI_CMD_RESP_R1;
618
619 /* send command */
620 mmc_ret = sdhci_send_command(host, &cmd);
621 if (mmc_ret)
622 return mmc_ret;
623
624 /*
625 * If blocklength is larger than 512 bytes,
626 * the card sets BLOCK_LEN_ERROR bit.
627 */
628 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
629 dprintf(CRITICAL, "The block length is not supported by the card\n");
630 return 1;
631 }
632
633 return 0;
634}
635
636/*
637 * Function: mmc get card status
638 * Arg : host, card structure & o/p argument card status
639 * Return : 0 on Success, 1 on Failure
640 * Flow : Get the current status of the card
641 */
642static uint32_t mmc_get_card_status(struct sdhci_host *host,
643 struct mmc_card *card, uint32_t *status)
644{
645 struct mmc_command cmd;
646 uint32_t mmc_ret = 0;
647
648 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
649
650 /* CMD13 Format:
651 * [31:16] RCA
652 * [15:0] stuff bits
653 */
654 cmd.cmd_index = CMD13_SEND_STATUS;
655 cmd.argument = card->rca << 16;
656 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
657 cmd.resp_type = SDHCI_CMD_RESP_R1;
658
659 /* send command */
660 mmc_ret = sdhci_send_command(host, &cmd);
661 if (mmc_ret)
662 return mmc_ret;
663
664 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
665 if ((cmd.resp[0] >> 31) & 0x01)
666 return 1;
667
668 *status = cmd.resp[0];
669 return 0;
670}
671
672/*
673 * Function: mmc get ext csd
674 * Arg : host, card structure & array to hold ext attributes
675 * Return : 0 on Success, 1 on Failure
676 * Flow : Send ext csd command & get the card attributes
677 */
678static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
679{
680 struct mmc_command cmd;
681 uint32_t mmc_ret = 0;
682
683 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
684
685 ASSERT(card->ext_csd);
686
687 memset(card->ext_csd, 0, sizeof(card->ext_csd));
688
689 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
690
691 /* CMD8 */
692 cmd.cmd_index = CMD8_SEND_EXT_CSD;
693 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
694 cmd.resp_type = SDHCI_CMD_RESP_R1;
695 cmd.data.data_ptr = card->ext_csd;
696 cmd.data.num_blocks = 1;
697 cmd.data_present = 0x1;
698 cmd.trans_mode = SDHCI_MMC_READ;
699
700 /* send command */
701 mmc_ret = sdhci_send_command(host, &cmd);
702 if (mmc_ret)
703 return mmc_ret;
704
705 return mmc_ret;
706}
707
708/*
709 * Function: mmc switch command
710 * Arg : Host, card structure, access mode, index & value to be set
711 * Return : 0 on Success, 1 on Failure
712 * Flow : Send switch command to the card to set the ext attribute @ index
713 */
714static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
715 uint32_t access, uint32_t index, uint32_t value)
716{
717
718 struct mmc_command cmd;
719 uint32_t mmc_ret = 0;
720 uint32_t mmc_status;
721
722 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
723
724 /* CMD6 Format:
725 * [31:26] set to 0
726 * [25:24] access
727 * [23:16] index
728 * [15:8] value
729 * [7:3] set to 0
730 * [2:0] cmd set
731 */
732 cmd.cmd_index = CMD6_SWITCH_FUNC;
733 cmd.argument |= (access << 24);
734 cmd.argument |= (index << 16);
735 cmd.argument |= (value << 8);
736 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
737 cmd.resp_type = SDHCI_CMD_RESP_R1B;
738
739 mmc_ret = sdhci_send_command(host, &cmd);
740 if (mmc_ret) {
741 dprintf(CRITICAL, "CMD6 send failed\n");
742 return mmc_ret;
743 }
744
745 /* Check if the card completed the switch command processing */
746 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
747 if (mmc_ret) {
748 dprintf(CRITICAL, "Get card status failed\n");
749 return mmc_ret;
750 }
751
752 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700753 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state %x\n", mmc_status);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700754 mmc_ret = 1;
755 }
756
757 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
758 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
759 mmc_ret = 1;
760 }
761
762 return mmc_ret;
763}
764
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700765bool mmc_set_drv_type(struct sdhci_host *host, struct mmc_card *card, uint8_t drv_type)
766{
767 uint32_t ret = 0;
768 bool drv_type_changed = false;
769
770 uint32_t value = ((drv_type << 4) | MMC_HS200_TIMING);
771
vijay kumar488e4842015-08-21 20:37:29 +0530772 if (MMC_CARD_MMC(card)) {
773 if (card->ext_csd[MMC_EXT_MMC_DRV_STRENGTH] & (1 << drv_type))
774 ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, value);
775 if (!ret)
776 drv_type_changed = true;
777 }
Channagoud Kadabie106d1f2014-04-25 18:26:26 -0700778 return drv_type_changed;
779}
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700780/*
781 * Function: mmc set bus width
782 * Arg : Host, card structure & width
783 * Return : 0 on Success, 1 on Failure
784 * Flow : Send switch command to set bus width
785 */
786static uint32_t mmc_set_bus_width(struct sdhci_host *host,
787 struct mmc_card *card,
788 uint32_t width)
789{
790 uint32_t mmc_ret = 0;
791
792 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
793 MMC_EXT_MMC_BUS_WIDTH, width);
794
795 if (mmc_ret) {
796 dprintf(CRITICAL, "Switch cmd failed\n");
797 return mmc_ret;
798 }
799
800 return 0;
801}
802
803
804/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700805 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700806 * Arg : None
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700807 * Return : 1 if hs400 mode is supported, 0 otherwise
808 * Flow : Check the ext csd attributes of the card
809 */
810static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
811{
vijay kumar488e4842015-08-21 20:37:29 +0530812 if (MMC_CARD_MMC(card)) {
813 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
814 return 1;
815 else
816 return 0;
817 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700818 else
819 return 0;
820}
821
822/*
823 * Function: mmc card supports hs200 mode
824 * Arg : None
825 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700826 * Flow : Check the ext csd attributes of the card
827 */
828static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
829{
vijay kumar488e4842015-08-21 20:37:29 +0530830 if (MMC_CARD_MMC(card)) {
831 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
832 return 1;
833 else
834 return 0;
835 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700836 else
837 return 0;
838}
839
840/*
841 * Function: mmc card supports ddr mode
842 * Arg : None
843 * Return : 1 if DDR mode is supported, 0 otherwise
844 * Flow : Check the ext csd attributes of the card
845 */
846static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
847{
vijay kumar488e4842015-08-21 20:37:29 +0530848 if (MMC_CARD_MMC(card)) {
849 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
850 return 1;
851 else
852 return 0;
853 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700854 else
855 return 0;
856}
857
858/*
859 * Function : Enable HS200 mode
860 * Arg : Host, card structure and bus width
861 * Return : 0 on Success, 1 on Failure
862 * Flow :
863 * - Set the bus width to 4/8 bit SDR as supported by the target & host
864 * - Set the HS_TIMING on ext_csd 185 for the card
865 */
866static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
867 struct mmc_card *card, uint32_t width)
868{
869 uint32_t mmc_ret = 0;
870
Channagoud Kadabie632e252014-03-31 15:26:00 -0700871 DBG("\n Enabling HS200 Mode Start\n");
872
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700873 /* Set 4/8 bit SDR bus width */
874 mmc_ret = mmc_set_bus_width(host, card, width);
875 if (mmc_ret) {
876 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
877 card->rca);
878 return mmc_ret;
879 }
880
881 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
882 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
883
884 if (mmc_ret) {
885 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
886 return mmc_ret;
887 }
888
Channagoud Kadabi1dc6aab2013-11-20 12:46:15 -0800889 /* Enable SDR104 mode in controller */
890 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
891
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700892 /* Run the clock @ 400 Mhz */
Channagoud Kadabie9168e82014-01-28 21:33:34 -0800893 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700894 {
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700895 /* Save the timing value, before changing the clock */
896 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
Channagoud Kadabi86756c12014-03-12 17:16:39 -0700897 /*
898 * Set the MCI_CLK divider before changing the sdcc core
899 * core clk to ensure card receives no more than 200 MHZ
900 * clock frequency
901 */
902 sdhci_msm_set_mci_clk(host);
903 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700904 }
Channagoud Kadabi642ff552014-08-12 21:40:59 -0700905
906 /* Execute Tuning for hs200 mode */
907 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
908 dprintf(CRITICAL, "Tuning for hs200 failed\n");
909
910 /* Once the tuning is executed revert back the clock to 200MHZ
911 * and disable the MCI_CLK divider so that we can use SDHC clock
912 * divider to supply clock to the card
913 */
914 if (host->timing == MMC_HS400_TIMING)
915 {
916 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
917 sdhci_msm_set_mci_clk(host);
918 clock_config_mmc(host->msm_host->slot, MMC_CLK_192MHZ);
919 }
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700920 else
921 {
922 /* Save the timing value, before changing the clock */
923 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
924 }
925
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700926
Channagoud Kadabie632e252014-03-31 15:26:00 -0700927 DBG("\n Enabling HS200 Mode Done\n");
928
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700929 return mmc_ret;
930}
931
932/*
933 * Function: mmc set ddr mode
934 * Arg : Host & card structure
935 * Return : 0 on Success, 1 on Failure
936 * Flow : Set bus width for ddr mode & set controller in DDR mode
937*/
938static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
939{
940 uint8_t mmc_ret = 0;
941
Channagoud Kadabie632e252014-03-31 15:26:00 -0700942 DBG("\n Enabling DDR Mode Start\n");
943
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700944 /* Set width for 8 bit DDR mode by default */
945 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
946
947 if (mmc_ret) {
948 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
949 card->rca);
950 return mmc_ret;
951 }
952
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700953 /* Save the timing value, before changing the clock */
954 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
955
956 /* Set the DDR mode in controller */
957 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700958
Channagoud Kadabie632e252014-03-31 15:26:00 -0700959 DBG("\n Enabling DDR Mode Done\n");
960
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700961 return 0;
962}
963
964/*
965 * Function: mmc set high speed interface
966 * Arg : Host & card structure
967 * Return : None
968 * Flow : Sets the sdcc clock & clock divider in the host controller
969 * Adjust the interface speed to optimal speed
970 */
971static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
972 struct mmc_card *card)
973{
974 uint32_t mmc_ret = 0;
975
976 /* Setting HS_TIMING in EXT_CSD (CMD6) */
977 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
978 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
979
980 if (mmc_ret) {
981 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
982 return mmc_ret;
983 }
984
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700985 /* Save the timing value, before changing the clock */
986 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
987
988 /* Set the SDR25 mode in controller */
989 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
990
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700991 return 0;
992}
993
994/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700995 * Function : Enable HS400 mode
996 * Arg : Host, card structure and bus width
997 * Return : 0 on Success, 1 on Failure
998 * Flow :
999 * - Set the bus width to 8 bit DDR
1000 * - Set the HS_TIMING on ext_csd 185 for the card
1001 */
1002uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
1003 struct mmc_card *card, uint32_t width)
1004{
1005 uint32_t mmc_ret = 0;
1006
1007 /*
1008 * Emmc 5.0 spec does not allow changing to hs400 mode directly
1009 * Need to follow the sequence to change to hs400 mode
1010 * 1. Enable HS200 mode, perform tuning
1011 * 2. Change to high speed mode
1012 * 3. Enable DDR mode
1013 * 4. Enable HS400 mode & execute tuning
1014 */
1015
Channagoud Kadabie632e252014-03-31 15:26:00 -07001016 DBG("\n Enabling HS400 Mode Start\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001017 /* HS400 mode is supported only in DDR 8-bit */
1018 if (width != DATA_BUS_WIDTH_8BIT)
1019 {
1020 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
1021 return 1;
1022 }
1023
1024 /* 1.Enable HS200 mode */
1025 mmc_ret = mmc_set_hs200_mode(host, card, width);
1026
1027 if (mmc_ret)
1028 {
1029 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
1030 return mmc_ret;
1031 }
1032
1033 /* 2. Enable High speed mode */
1034 /* This is needed to set the clock to a low value &
1035 * so that we can switch to hs_timing --> 0x1 */
1036 /* Save the timing value, before changing the clock */
1037 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
1038 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
1039
1040 /* 3. Set HS_TIMING to 0x1 */
1041 mmc_ret = mmc_set_hs_interface(host, card);
1042 if (mmc_ret)
1043 {
1044 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
1045 return mmc_ret;
1046 }
1047
1048 /*4. Enable DDR mode */
1049 mmc_ret = mmc_set_ddr_mode(host, card);
1050 if (mmc_ret)
1051 {
1052 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
1053 return mmc_ret;
1054 }
1055
1056 /*5. Set hs400 timing */
1057 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
1058
1059 if (mmc_ret)
1060 {
1061 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
1062 return mmc_ret;
1063 }
1064
1065 /* 6. Enable SDR104 mode in controller */
1066 /* Save the timing value, before changing the clock */
1067 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
1068 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
Channagoud Kadabi86756c12014-03-12 17:16:39 -07001069 /*
1070 * Enable HS400 mode
1071 */
1072 sdhci_msm_set_mci_clk(host);
Channagoud Kadabi642ff552014-08-12 21:40:59 -07001073 /* Set the clock back to 400 MHZ */
1074 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001075
1076 /* 7. Execute Tuning for hs400 mode */
Channagoud Kadabie106d1f2014-04-25 18:26:26 -07001077 if ((mmc_ret = sdhci_msm_execute_tuning(host, card, width)))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001078 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1079
Channagoud Kadabie632e252014-03-31 15:26:00 -07001080 DBG("\n Enabling HS400 Mode Done\n");
1081
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001082 return mmc_ret;
1083}
1084
1085/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001086 * Function: mmc_host_init
1087 * Arg : mmc device structure
1088 * Return : 0 on success, 1 on Failure
1089 * Flow : Initialize the host contoller
1090 * Set the clock rate to 400 KHZ for init
1091 */
1092static uint8_t mmc_host_init(struct mmc_device *dev)
1093{
1094 uint8_t mmc_ret = 0;
1095
1096 struct sdhci_host *host;
1097 struct mmc_config_data *cfg;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001098 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001099
1100 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001101
1102 host = &dev->host;
1103 cfg = &dev->config;
1104
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001105 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1106
1107 host->base = cfg->sdhc_base;
1108 host->sdhc_event = &sdhc_event;
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001109 host->caps.hs200_support = cfg->hs200_support;
Aparna Mallavarapue1cdd302014-03-07 07:12:44 +05301110 host->caps.hs400_support = cfg->hs400_support;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001111
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001112 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1113 ASSERT(data);
1114
1115 data->sdhc_event = &sdhc_event;
1116 data->pwrctl_base = cfg->pwrctl_base;
1117 data->pwr_irq = cfg->pwr_irq;
1118 data->slot = cfg->slot;
Channagoud Kadabi17e69972014-10-13 11:42:24 -07001119 data->use_io_switch = cfg->use_io_switch;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001120
1121 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001122
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001123 /* Initialize any clocks needed for SDC controller */
1124 clock_init_mmc(cfg->slot);
1125
1126 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1127
Channagoud Kadabie632e252014-03-31 15:26:00 -07001128 /* Configure the CDC clocks needed for emmc storage
1129 * we use slot '1' for emmc
1130 */
1131 if (cfg->slot == 1)
1132 clock_config_cdc(cfg->slot);
1133
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001134 /*
1135 * MSM specific sdhc init
1136 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001137 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001138
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001139 /*
1140 * Initialize the controller, read the host capabilities
1141 * set power on mode
1142 */
1143 sdhci_init(host);
1144
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001145 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001146 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1147
1148 return mmc_ret;
1149}
1150
1151/*
1152 * Function: mmc identify card
1153 * Arg : host & card structure
1154 * Return : 0 on Success, 1 on Failure
1155 * Flow : Performs card identification process:
1156 * 1. Get card's unique identification number (CID)
1157 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1158 * 3. Select the card to put it in TRAN state
1159 */
1160static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1161{
1162 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001163
1164 /* Ask card to send its unique card identification (CID) number (CMD2) */
1165 mmc_return = mmc_all_send_cid(host, card);
1166 if (mmc_return) {
1167 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1168 return mmc_return;
1169 }
1170
1171 /* Ask card to send a relative card address (RCA) (CMD3) */
1172 mmc_return = mmc_send_relative_address(host, card);
1173 if (mmc_return) {
1174 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1175 return mmc_return;
1176 }
1177
1178 /* Get card's CSD register (CMD9) */
1179 mmc_return = mmc_send_csd(host, card);
1180 if (mmc_return) {
1181 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1182 return mmc_return;
1183 }
1184
1185 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001186 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001187 if (mmc_return) {
1188 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1189 return mmc_return;
1190 }
1191
1192 /* Set the card status as active */
1193 card->status = MMC_STATUS_ACTIVE;
1194
1195 return 0;
1196}
1197
1198/*
1199 * Function: mmc_reset_card_and_send_op
1200 * Arg : Host & Card structure
1201 * Return : 0 on Success, 1 on Failure
1202 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1203 * verify operating voltage and set the card in ready state.
1204 */
1205static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1206{
1207 uint32_t mmc_return = 0;
1208
1209 /* 1. Card Reset - CMD0 */
1210 mmc_return = mmc_reset_card(host);
1211 if (mmc_return) {
1212 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1213 return mmc_return;
1214 }
1215
1216 /* 2. Card Initialization process */
1217
1218 /*
1219 * Send CMD1 to identify and reject cards that do not match host's VDD range
1220 * profile. Cards sends its OCR register in response.
1221 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001222
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001223 mmc_return = mmc_send_op_cond(host, card);
1224
1225 /* OCR is not received, init could not complete */
1226 if (mmc_return) {
1227 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1228 return mmc_return;
1229 }
1230
1231 return 0;
1232}
1233
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001234static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1235{
1236 struct mmc_command cmd = {0};
1237
1238 cmd.cmd_index = CMD55_APP_CMD;
1239 cmd.argument = (card->rca << 16);
1240 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1241 cmd.resp_type = SDHCI_CMD_RESP_R1;
1242
1243 if (sdhci_send_command(host, &cmd))
1244 {
1245 dprintf(CRITICAL, "Failed Sending CMD55\n");
1246 return 1;
1247 }
1248 return 0;
1249}
1250
1251uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1252{
1253 uint8_t i;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001254 struct mmc_command cmd;
1255
1256 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1257
1258 /* Use the SD card RCA 0x0 during init */
1259 card->rca = SD_CARD_RCA;
1260
1261 /* Send CMD8 for voltage check*/
1262 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1263 {
1264 cmd.cmd_index = CMD8_SEND_IF_COND;
1265 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1266 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1267 cmd.resp_type = SDHCI_CMD_RESP_R7;
1268
1269 if (sdhci_send_command(host, &cmd))
1270 {
1271 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1272 return 1;
1273 }
1274 else
1275 {
1276 /* If the command response echos the voltage back */
1277 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1278 break;
1279 }
1280 /* As per SDCC the spec try for max three times with
1281 * 1 ms delay
1282 */
1283 mdelay(1);
1284 }
1285
1286 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1287 {
1288 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1289 return 1;
1290 }
1291
1292 /* Send ACMD41 for OCR */
1293 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1294 {
1295 /* Send APP_CMD before ACMD41*/
1296 if (mmc_send_app_cmd(host, card))
1297 {
1298 dprintf(CRITICAL, "Failed sending App command\n");
1299 return 1;
1300 }
1301
1302 /* APP_CMD is successful, send ACMD41 now */
1303 cmd.cmd_index = ACMD41_SEND_OP_COND;
1304 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1305 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1306 cmd.resp_type = SDHCI_CMD_RESP_R3;
1307
1308 if (sdhci_send_command(host, &cmd))
1309 {
1310 dprintf(CRITICAL, "Failure sending ACMD41\n");
1311 return 1;
1312 }
1313 else
1314 {
1315 if (cmd.resp[0] & MMC_SD_DEV_READY)
1316 {
1317 if (cmd.resp[0] & (1 << 30))
1318 card->type = MMC_CARD_TYPE_SDHC;
1319 else
1320 card->type = MMC_CARD_TYPE_STD_SD;
1321
1322 break;
1323 }
1324 }
1325 /*
1326 * As per SDCC spec try for max 1 second
1327 */
1328 mdelay(50);
1329 }
1330
1331 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1332 {
1333 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1334 return 1;
1335 }
1336
1337 return 0;
1338}
1339
1340/*
1341 * Function to read SD card information from SD status
1342 */
1343static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1344{
1345 BUF_DMA_ALIGN(raw_sd_status, 64);
1346 struct mmc_command cmd = {0};
1347 uint32_t sd_status[16];
1348 uint32_t *status = sd_status;
1349 uint32_t au_size;
1350 int i;
1351 int j;
1352
1353 if (mmc_send_app_cmd(host, card))
1354 {
1355 dprintf(CRITICAL, "Failed sending App command\n");
1356 return 1;
1357 }
1358
1359 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1360 cmd.argument = 0x0;
1361 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
Channagoud Kadabi57f37a82014-08-25 13:33:49 -07001362 cmd.resp_type = SDHCI_CMD_RESP_R1;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001363 cmd.trans_mode = SDHCI_MMC_READ;
1364 cmd.data_present = 0x1;
1365 cmd.data.data_ptr = raw_sd_status;
1366 cmd.data.num_blocks = 0x1;
1367 cmd.data.blk_sz = 0x40;
1368
1369 /* send command */
1370 if (sdhci_send_command(host, &cmd))
1371 return 1;
1372
1373 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1374
1375 for (i = 15, j = 0; i >=0 ; i--, j++)
1376 sd_status[i] = swap_endian32(sd_status[j]);
1377
1378 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1379 /* Card AU size in sectors */
1380 card->ssr.au_size = 1 << (au_size + 4);
1381 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
vijay kumarb01d64c2015-08-21 20:37:29 +05301382 /*if num_aus is 0 then host should assign number of AU erased at a time*/
1383 if (!card->ssr.num_aus)
1384 card->ssr.num_aus = 0x10;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001385 return 0;
1386}
1387
1388/*
1389 * Function to read the SD CARD configuration register
1390 */
1391static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1392{
1393 BUF_DMA_ALIGN(scr_resp, 8);
1394 struct mmc_command cmd = {0};
1395 uint32_t raw_scr[2];
1396
1397 /* Now read the SCR register */
1398 /* Send APP_CMD before ACMD51*/
1399 if (mmc_send_app_cmd(host, card))
1400 {
1401 dprintf(CRITICAL, "Failed sending App command\n");
1402 return 1;
1403 }
1404
1405 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1406 cmd.argument = 0x0;
1407 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1408 cmd.resp_type = SDHCI_CMD_RESP_R1;
1409 cmd.trans_mode = SDHCI_MMC_READ;
1410 cmd.data_present = 0x1;
1411 cmd.data.data_ptr = scr_resp;
1412 cmd.data.num_blocks = 0x1;
1413 cmd.data.blk_sz = 0x8;
1414
1415 /* send command */
1416 if (sdhci_send_command(host, &cmd))
1417 return 1;
1418
1419 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1420
1421 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1422 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1423
1424 /*
1425 * Parse & Populate the SCR data as per sdcc spec
1426 */
1427 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1428 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1429 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1430 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1431
1432 return 0;
1433}
1434
1435/*
1436 * Function: mmc_set_sd_bus_width
1437 * Arg : host, device structure & width
1438 * Return : 0 on Success, 1 on Failure
1439 * Flow : Set the bus width for the card
1440 */
1441uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1442{
1443 struct mmc_command cmd = {0};
1444
1445 /* Send APP_CMD before ACMD6*/
1446 if (mmc_send_app_cmd(host, card))
1447 {
1448 dprintf(CRITICAL, "Failed sending App command\n");
1449 return 1;
1450 }
1451
1452 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1453 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1454 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1455 cmd.resp_type = SDHCI_CMD_RESP_R1;
1456
1457 /* send command */
1458 if (sdhci_send_command(host, &cmd))
1459 return 1;
1460
1461 return 0;
1462}
1463
1464uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1465{
1466 struct mmc_command cmd = {0};
1467 BUF_DMA_ALIGN(switch_resp, 64);
1468
1469 cmd.cmd_index = CMD6_SWITCH_FUNC;
1470 cmd.argument = MMC_SD_SWITCH_HS;
1471 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1472 cmd.resp_type = SDHCI_CMD_RESP_R1;
1473 cmd.trans_mode = SDHCI_MMC_READ;
1474 cmd.data_present = 0x1;
1475 cmd.data.data_ptr = switch_resp;
1476 cmd.data.num_blocks = 0x1;
1477 cmd.data.blk_sz = 0x40;
1478
1479 /* send command */
1480 if (sdhci_send_command(host, &cmd))
1481 return 1;
1482
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001483 /* Set the SDR25 mode in controller*/
1484 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1485
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001486 return 0;
1487}
1488
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001489/*
1490 * Function: mmc_init_card
1491 * Arg : mmc device structure
1492 * Return : 0 on Success, 1 on Failure
1493 * Flow : Performs initialization and identification of eMMC cards connected
1494 * to the host.
1495 */
1496
1497static uint32_t mmc_card_init(struct mmc_device *dev)
1498{
1499 uint32_t mmc_return = 0;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001500 uint8_t bus_width = 0;
1501
1502 struct sdhci_host *host;
1503 struct mmc_card *card;
1504 struct mmc_config_data *cfg;
1505
1506 host = &dev->host;
1507 card = &dev->card;
1508 cfg = &dev->config;
1509
1510 /* Initialize MMC card structure */
1511 card->status = MMC_STATUS_INACTIVE;
1512
1513 /* TODO: Get the OCR params from target */
1514 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1515
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001516 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001517 mmc_return = mmc_reset_card_and_send_op(host, card);
1518 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001519 {
1520 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1521 /* Reset the card & get the OCR */
1522 mmc_return = mmc_sd_card_init(host, card);
1523 if (mmc_return)
1524 {
1525 dprintf(CRITICAL, "Failed to initialize SD card\n");
1526 return mmc_return;
1527 }
1528 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001529
1530 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1531 mmc_return = mmc_identify_card(host, card);
1532 if (mmc_return)
1533 return mmc_return;
1534
1535 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001536 if (MMC_CARD_SD(card))
1537 {
1538 mmc_return = mmc_sd_set_hs(host, card);
1539 if (mmc_return)
1540 {
1541 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1542 return mmc_return;
1543 }
1544 }
1545 else
1546 {
1547 mmc_return = mmc_set_hs_interface(host, card);
1548 if (mmc_return) {
1549 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1550 return mmc_return;
1551 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001552 }
1553
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001554 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001555 if (MMC_CARD_MMC(card))
1556 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001557 /* For MMC cards, also get the extended csd */
1558 mmc_return = mmc_get_ext_csd(host, card);
1559
1560 if (mmc_return) {
1561 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1562 return mmc_return;
1563 }
1564 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001565 else
1566 {
1567 /*Read SCR for sd card */
1568 if (mmc_sd_get_card_scr(host, card))
1569 {
1570 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1571 return 1;
1572 }
1573 /* Read SSR for the SD card */
1574 if (mmc_sd_get_card_ssr(host, card))
1575 {
1576 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1577 return 1;
1578 }
1579 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001580
1581 /* Decode and save the CSD register */
1582 mmc_return = mmc_decode_and_save_csd(card);
1583 if (mmc_return) {
1584 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1585 return mmc_return;
1586 }
1587
1588
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001589 if (MMC_CARD_MMC(card))
1590 {
1591 /* Set the bus width based on host, target capbilities */
1592 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1593 bus_width = DATA_BUS_WIDTH_8BIT;
1594 /*
1595 * Host contoller by default supports 4 bit & 1 bit mode.
1596 * No need to check for host support here
1597 */
1598 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1599 bus_width = DATA_BUS_WIDTH_4BIT;
1600 else
1601 bus_width = DATA_BUS_WIDTH_1BIT;
1602
1603 /* Set 4/8 bit SDR bus width in controller */
1604 mmc_return = sdhci_set_bus_width(host, bus_width);
1605
1606 if (mmc_return) {
1607 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1608 return 1;
1609 }
1610
1611 /* Enable high speed mode in the follwing order:
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001612 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001613 * 1. HS200 mode if supported by host & card
1614 * 2. DDR mode host, if supported by host & card
1615 * 3. Use normal speed mode with supported bus width
1616 */
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001617 if (host->caps.hs400_support && mmc_card_supports_hs400_mode(card))
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001618 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001619 dprintf(INFO, "SDHC Running in HS400 mode\n");
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001620 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1621 if (mmc_return)
1622 {
1623 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1624 card->rca);
1625 return mmc_return;
1626 }
1627 }
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001628#if USE_TARGET_HS200_CAPS
1629 else if (host->caps.hs200_support && host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
1630#else
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001631 else if (host->caps.sdr104_support && mmc_card_supports_hs200_mode(card))
Channagoud Kadabi3091dbd2014-11-12 13:00:33 -08001632#endif
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001633 {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001634 dprintf(INFO, "SDHC Running in HS200 mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001635 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1636
1637 if (mmc_return) {
1638 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1639 card->rca);
1640 return mmc_return;
1641 }
Channagoud Kadabie9168e82014-01-28 21:33:34 -08001642 } else if (host->caps.ddr_support && mmc_card_supports_ddr_mode(card)) {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001643 dprintf(INFO, "SDHC Running in DDR mode\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001644 mmc_return = mmc_set_ddr_mode(host, card);
1645
1646 if (mmc_return) {
1647 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1648 card->rca);
1649 return mmc_return;
1650 }
1651 } else {
Channagoud Kadabiee5b3242014-06-25 11:15:06 -07001652 dprintf(INFO, "SDHC Running in High Speed mode\n");
1653 /* Set HS_TIMING mode */
1654 mmc_return = mmc_set_hs_interface(host, card);
1655 if (mmc_return) {
1656 dprintf(CRITICAL, "Failure to enalbe HS mode for Card(RCA:%x)\n",
1657 card->rca);
1658 return mmc_return;
1659 }
1660 /* Set wide bus mode */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001661 mmc_return = mmc_set_bus_width(host, card, bus_width);
1662 if (mmc_return) {
1663 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1664 card->rca);
1665 return mmc_return;
1666 }
1667 }
1668 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001669 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001670 {
1671 /* Check the supported bus width for the card from SCR register */
1672 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1673 bus_width = DATA_BUS_WIDTH_4BIT;
1674 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001675 bus_width = DATA_BUS_WIDTH_1BIT;
1676
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001677 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1678 if (mmc_return)
1679 {
1680 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001681 return mmc_return;
1682 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001683
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001684 /* Set bit SDR bus width in controller */
1685 mmc_return = sdhci_set_bus_width(host, bus_width);
1686 if (mmc_return)
1687 {
1688 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001689 return mmc_return;
1690 }
1691 }
1692
1693
Channagoud Kadabi96c629e2013-09-10 14:21:30 -07001694 card->block_size = MMC_BLK_SZ;
1695
vijay kumar488e4842015-08-21 20:37:29 +05301696 if (MMC_CARD_MMC(card)) {
1697 /* Enable RST_n_FUNCTION */
1698 if (!card->ext_csd[MMC_EXT_CSD_RST_N_FUNC])
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001699 {
vijay kumar488e4842015-08-21 20:37:29 +05301700 mmc_return = mmc_switch_cmd(host, card, MMC_SET_BIT, MMC_EXT_CSD_RST_N_FUNC, RST_N_FUNC_ENABLE);
Channagoud Kadabifaf20f62014-10-21 22:22:37 -07001701
vijay kumar488e4842015-08-21 20:37:29 +05301702 if (mmc_return)
1703 {
1704 dprintf(CRITICAL, "Failed to enable RST_n_FUNCTION\n");
1705 return mmc_return;
1706 }
1707 }
1708
1709 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001710 return mmc_return;
1711}
1712
1713/*
1714 * Function: mmc display csd
1715 * Arg : None
1716 * Return : None
1717 * Flow : Displays the csd information
1718 */
1719static void mmc_display_csd(struct mmc_card *card)
1720{
1721 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1722 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1723 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1724 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1725 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1726 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1727}
1728
1729/*
1730 * Function: mmc_init
1731 * Arg : MMC configuration data
1732 * Return : Pointer to mmc device
1733 * Flow : Entry point to MMC boot process
1734 * Initialize the sd host controller
1735 * Initialize the mmc card
1736 * Set the clock & high speed mode
1737 */
1738struct mmc_device *mmc_init(struct mmc_config_data *data)
1739{
1740 uint8_t mmc_ret = 0;
1741 struct mmc_device *dev;
1742
1743 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1744
1745 if (!dev) {
1746 dprintf(CRITICAL, "Error allocating mmc device\n");
1747 return NULL;
1748 }
1749
1750 ASSERT(data);
1751
1752 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1753
1754 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1755
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001756 /* Initialize the host & clock */
1757 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1758
1759 mmc_ret = mmc_host_init(dev);
1760 if (mmc_ret) {
1761 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1762 return NULL;
1763 }
1764
1765 /* Initialize and identify cards connected to host */
1766 mmc_ret = mmc_card_init(dev);
1767 if (mmc_ret) {
1768 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1769 dev->config.slot);
1770 return NULL;
1771 }
1772
1773 dprintf(INFO, "Done initialization of the card\n");
1774
1775 mmc_display_csd(&dev->card);
1776
1777 return dev;
1778}
1779
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001780static uint32_t mmc_parse_response(uint32_t resp)
1781{
1782 /* Trying to write beyond card capacity */
1783 if (resp & MMC_R1_ADDR_OUT_OF_RANGE) {
1784 dprintf(CRITICAL, "Attempting to read or write beyond the Device capacity\n");
1785 return 1;
1786 }
1787
1788 /* Misaligned address not matching block length */
1789 if (resp & MMC_R1_ADDR_ERR) {
1790 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1791 return 1;
1792 }
1793
1794 /* Invalid block length */
1795 if (resp & MMC_R1_BLOCK_LEN_ERR) {
1796 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1797 return 1;
1798 }
1799
1800 /* Tried to program write protected block */
1801 if (resp & MMC_R1_WP_VIOLATION) {
1802 dprintf(CRITICAL, "Attempt to program a write protected block\n");
1803 return 1;
1804 }
1805
1806 /* card controller error */
1807 if (resp & MMC_R1_CC_ERROR) {
1808 dprintf(CRITICAL, "Device error occurred, which is not related to the host command\n");
1809 return 1;
1810 }
1811
1812 /* Generic error */
1813 if (resp & MMC_R1_GENERIC_ERR) {
1814 dprintf(CRITICAL, "A generic Device error\n");
1815 return 1;
1816 }
1817
1818 /* Finally check for card in TRAN state */
1819 if (MMC_CARD_STATUS(resp) != MMC_TRAN_STATE) {
1820 dprintf(CRITICAL, "MMC card is not in TRAN state\n");
1821 return 1;
1822 }
1823
1824 return 0;
1825}
1826
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001827static uint32_t mmc_stop_command(struct mmc_device *dev)
1828{
1829 struct mmc_command cmd;
1830 uint32_t mmc_ret = 0;
1831
1832 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1833
1834 cmd.cmd_index = CMD12_STOP_TRANSMISSION;
1835 cmd.argument = (dev->card.rca << 16);
1836 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1837 cmd.resp_type = SDHCI_CMD_RESP_R1;
1838
1839 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1840 if(mmc_ret)
1841 {
1842 dprintf(CRITICAL, "Failed to send stop command\n");
1843 return mmc_ret;
1844 }
1845
1846 /* Response contains 32 bit Card status.
1847 * Parse the errors & provide relevant information */
1848
1849 return mmc_parse_response(cmd.resp[0]);
1850}
1851
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001852/*
1853 * Function: mmc sdhci read
1854 * Arg : mmc device structure, block address, number of blocks & destination
1855 * Return : 0 on Success, non zero on success
1856 * Flow : Fill in the command structure & send the command
1857 */
1858uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1859 uint64_t blk_addr, uint32_t num_blocks)
1860{
1861 uint32_t mmc_ret = 0;
1862 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001863 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001864
1865 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1866
1867 /* CMD17/18 Format:
1868 * [31:0] Data Address
1869 */
1870 if (num_blocks == 1)
1871 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1872 else
1873 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1874
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001875 /*
1876 * Standard emmc cards use byte mode addressing
1877 * convert the block address to byte address before
1878 * sending the command
1879 */
1880 if (card->type == MMC_TYPE_STD_MMC)
1881 cmd.argument = blk_addr * card->block_size;
1882 else
1883 cmd.argument = blk_addr;
1884
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001885 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1886 cmd.resp_type = SDHCI_CMD_RESP_R1;
1887 cmd.trans_mode = SDHCI_MMC_READ;
1888 cmd.data_present = 0x1;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001889
1890 /* Use CMD23 If card supports CMD23:
1891 * For SD card use the value read from SCR register
1892 * For emmc by default use CMD23.
1893 * Also as per SDCC spec always use CMD23 to stop
1894 * multiblock read/write if UHS (Ultra High Speed) is
1895 * enabled
1896 */
1897 if (MMC_CARD_SD(card))
1898 cmd.cmd23_support = dev->card.scr.cmd23_support;
1899 else
1900 cmd.cmd23_support = 0x1;
1901
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001902 cmd.data.data_ptr = dest;
1903 cmd.data.num_blocks = num_blocks;
1904
1905 /* send command */
1906 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001907
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001908 /* For multi block read failures send stop command */
1909 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001910 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001911 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001912 }
1913
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001914 /*
1915 * Response contains 32 bit Card status.
1916 * Parse the errors & provide relevant information
1917 */
1918 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001919}
1920
1921/*
1922 * Function: mmc sdhci write
1923 * Arg : mmc device structure, block address, number of blocks & source
1924 * Return : 0 on Success, non zero on success
1925 * Flow : Fill in the command structure & send the command
1926 */
1927uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1928 uint64_t blk_addr, uint32_t num_blocks)
1929{
1930 uint32_t mmc_ret = 0;
1931 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001932 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001933
1934 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1935
1936 /* CMD24/25 Format:
1937 * [31:0] Data Address
1938 */
1939
1940 if (num_blocks == 1)
1941 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1942 else
1943 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1944
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001945 /*
1946 * Standard emmc cards use byte mode addressing
1947 * convert the block address to byte address before
1948 * sending the command
1949 */
1950 if (card->type == MMC_TYPE_STD_MMC)
1951 cmd.argument = blk_addr * card->block_size;
1952 else
1953 cmd.argument = blk_addr;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001954 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1955 cmd.resp_type = SDHCI_CMD_RESP_R1;
1956 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001957
1958 /* Use CMD23 If card supports CMD23:
1959 * For SD card use the value read from SCR register
1960 * For emmc by default use CMD23.
1961 * Also as per SDCC spec always use CMD23 to stop
1962 * multiblock read/write if UHS (Ultra High Speed) is
1963 * enabled
1964 */
1965 if (MMC_CARD_SD(card))
1966 cmd.cmd23_support = dev->card.scr.cmd23_support;
1967 else
1968 cmd.cmd23_support = 0x1;
1969
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001970 cmd.data_present = 0x1;
1971 cmd.data.data_ptr = src;
1972 cmd.data.num_blocks = num_blocks;
1973
1974 /* send command */
1975 mmc_ret = sdhci_send_command(&dev->host, &cmd);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001976
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001977 /* For multi block write failures send stop command */
1978 if (mmc_ret && num_blocks > 1)
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001979 {
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001980 return mmc_stop_command(dev);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001981 }
1982
Channagoud Kadabia9b74782014-04-09 16:35:16 -07001983 /*
1984 * Response contains 32 bit Card status.
1985 * Parse the errors & provide relevant information
1986 */
1987 return mmc_parse_response(cmd.resp[0]);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001988}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001989
1990/*
1991 * Send the erase group start address using CMD35
1992 */
1993static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1994{
1995 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001996 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001997
1998 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1999
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002000 if (MMC_CARD_MMC(card))
2001 cmd.cmd_index = CMD35_ERASE_GROUP_START;
2002 else
2003 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
2004
vijay kumar1129e4e2014-03-28 11:24:48 +05302005 /*
2006 * Standard emmc cards use byte mode addressing
2007 * convert the block address to byte address before
2008 * sending the command
2009 */
2010 if (card->type == MMC_TYPE_STD_MMC)
2011 cmd.argument = erase_start * card->block_size;
2012 else
2013 cmd.argument = erase_start;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002014 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2015 cmd.resp_type = SDHCI_CMD_RESP_R1;
2016
2017 /* send command */
2018 if (sdhci_send_command(&dev->host, &cmd))
2019 return 1;
2020
2021 /*
2022 * CMD35 on failure returns address out of range error
2023 */
2024 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2025 {
2026 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
2027 return 1;
2028 }
2029
2030 return 0;
2031}
2032
2033/*
2034 * Send the erase group end address using CMD36
2035 */
2036static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
2037{
2038 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002039 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002040
2041 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2042
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002043 if (MMC_CARD_MMC(card))
2044 cmd.cmd_index = CMD36_ERASE_GROUP_END;
2045 else
2046 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
2047
vijay kumar1129e4e2014-03-28 11:24:48 +05302048 /*
2049 * Standard emmc cards use byte mode addressing
2050 * convert the block address to byte address before
2051 * sending the command
2052 */
2053 if (card->type == MMC_TYPE_STD_MMC)
2054 cmd.argument = erase_end * card->block_size;
2055 else
2056 cmd.argument = erase_end;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002057 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2058 cmd.resp_type = SDHCI_CMD_RESP_R1;
2059
2060 /* send command */
2061 if (sdhci_send_command(&dev->host, &cmd))
2062 return 1;
2063
2064 /*
2065 * CMD3 on failure returns address out of range error
2066 */
2067 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2068 {
2069 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
2070 return 1;
2071 }
2072
2073 return 0;
2074}
2075
2076/*
2077 * Send the erase CMD38, to erase the selected erase groups
2078 */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002079static uint32_t mmc_send_erase(struct mmc_device *dev, uint64_t erase_timeout)
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002080{
2081 struct mmc_command cmd;
2082 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002083 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002084
2085 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2086
2087 cmd.cmd_index = CMD38_ERASE;
2088 cmd.argument = 0x00000000;
2089 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2090 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002091 cmd.cmd_timeout = erase_timeout;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002092
2093 /* send command */
2094 if (sdhci_send_command(&dev->host, &cmd))
2095 return 1;
2096
2097 do
2098 {
2099 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2100 {
2101 dprintf(CRITICAL, "Failed to get card status after erase\n");
2102 return 1;
2103 }
2104 /* Check if the response of erase command has eras skip status set */
2105 if (status & MMC_R1_WP_ERASE_SKIP)
2106 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
2107
2108 retry++;
2109 udelay(1000);
2110 if (retry == MMC_MAX_CARD_STAT_RETRY)
2111 {
2112 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
2113 return 1;
2114 }
2115 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2116
2117
2118 return 0;
2119}
2120
2121
2122/*
2123 * Function: mmc sdhci erase
2124 * Arg : mmc device structure, block address and length
2125 * Return : 0 on Success, non zero on failure
2126 * Flow : Fill in the command structure & send the command
2127 */
2128uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
2129{
2130 uint32_t erase_unit_sz = 0;
2131 uint32_t erase_start;
2132 uint32_t erase_end;
2133 uint32_t blk_end;
2134 uint32_t num_erase_grps;
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002135 uint64_t erase_timeout = 0;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002136 struct mmc_card *card;
2137
2138
2139 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002140
2141 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002142 * Calculate the erase unit size,
2143 * 1. Based on emmc 4.5 spec for emmc card
2144 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002145 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002146 if (MMC_CARD_MMC(card))
2147 {
2148 /*
2149 * Calculate the erase unit size as per the emmc specification v4.5
2150 */
2151 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2152 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2153 else
2154 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2155 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002156 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002157 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2158
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002159
2160 /* Convert length in blocks */
2161 len = len / MMC_BLK_SZ;
2162
2163 if (len < erase_unit_sz)
2164 {
2165 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2166 return 1;
2167 }
2168
2169 /* Calculate erase groups based on the length in blocks */
2170 num_erase_grps = len / erase_unit_sz;
2171
2172 /* Start address of the erase range */
2173 erase_start = blk_addr;
2174
2175 /* Last address of the erase range */
2176 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2177
2178 /* Boundary check for overlap */
2179 blk_end = blk_addr + len;
2180
2181 if (erase_end > blk_end)
2182 {
2183 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2184 erase_end -= erase_unit_sz;
2185 }
2186
2187 /* Send CMD35 for erase group start */
2188 if (mmc_send_erase_grp_start(dev, erase_start))
2189 {
2190 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2191 return 1;
2192 }
2193
2194 /* Send CMD36 for erase group end */
2195 if (mmc_send_erase_grp_end(dev, erase_end))
2196 {
2197 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2198 return 1;
2199 }
2200
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002201 /*
2202 * As per emmc 4.5 spec section 7.4.27, calculate the erase timeout
Channagoud Kadabi7491e6c2014-12-02 15:42:11 -08002203 * erase_timeout = 300ms * ERASE_TIMEOUT_MULT * num_erase_grps
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002204 */
vijay kumar488e4842015-08-21 20:37:29 +05302205 if (MMC_CARD_MMC(card))
2206 erase_timeout = (300 * 1000 * card->ext_csd[MMC_ERASE_TIMEOUT_MULT] * num_erase_grps);
2207 else
2208 erase_timeout = (300 * 1000 * num_erase_grps);
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002209
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002210 /* Send CMD38 to perform erase */
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002211 if (mmc_send_erase(dev, erase_timeout))
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002212 {
2213 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2214 return 1;
2215 }
Channagoud Kadabie86a40b2014-03-12 17:48:51 -07002216
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002217 return 0;
2218}
2219
2220/*
2221 * Function: mmc get wp status
2222 * Arg : mmc device structure, block address and buffer for getting wp status
2223 * Return : 0 on Success, 1 on Failure
2224 * Flow : Get the WP group status by sending CMD31
2225 */
2226uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2227{
2228 struct mmc_command cmd;
2229
2230 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2231
2232 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2233 cmd.argument = addr;
2234 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2235 cmd.resp_type = SDHCI_CMD_RESP_R1;
2236 cmd.trans_mode = SDHCI_MMC_READ;
2237 cmd.data_present = 0x1;
2238 cmd.data.data_ptr = wp_status;
2239 cmd.data.num_blocks = 0x1;
2240 cmd.data.blk_sz = 0x8;
2241
2242 if (sdhci_send_command(&dev->host, &cmd))
2243 {
2244 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2245 return 1;
2246 }
2247
2248 return 0;
2249}
2250
2251/*
2252 * Function: mmc set/clear WP on user area
2253 * Arg : mmc device structure, block address,len, & flag to set or clear
2254 * Return : 0 on success, 1 on failure
2255 * Flow : Function to set/clear power on write protect on user area
2256 */
2257
2258uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2259{
2260 struct mmc_command cmd;
vijay kumar7420baa2014-05-02 12:01:49 +05302261 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002262 uint32_t wp_grp_size;
2263 uint32_t status;
2264 uint32_t num_wp_grps;
2265 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002266 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002267 uint32_t i;
2268
2269 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2270
2271 /* Convert len into blocks */
2272 len = len / MMC_BLK_SZ;
vijay kumar697dbfd2014-04-24 17:12:49 +05302273 wp_grp_size = dev->card.wp_grp_size;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002274
2275 /* Disable PERM WP */
2276 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2277
2278 if (ret)
2279 {
2280 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2281 return ret;
2282 }
2283
2284 /* Read the default values for user WP */
2285 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2286
2287 if (ret)
2288 {
2289 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2290 return ret;
2291 }
2292
2293 /* Check if user power on WP is disabled or perm WP is enabled */
2294 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2295 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2296 {
2297 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2298 return 1;
2299 }
2300
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002301 if (len < wp_grp_size)
2302 {
2303 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2304 return 1;
2305 }
2306
2307 /* Set power on USER WP */
2308 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2309
2310 if (ret)
2311 {
2312 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2313 return ret;
2314 }
2315
2316 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2317
2318 if (set_clr)
2319 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2320 else
2321 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2322
2323 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2324 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2325
2326 for(i = 0; i < num_wp_grps; i++)
2327 {
vijay kumar7420baa2014-05-02 12:01:49 +05302328 /*
2329 * Standard emmc cards use byte mode addressing
2330 * convert the block address to byte address before
2331 * sending the command
2332 */
2333 if (card->type == MMC_TYPE_STD_MMC)
2334 cmd.argument = (addr + (i * wp_grp_size)) * card->block_size;
2335 else
2336 cmd.argument = addr + (i * wp_grp_size);
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002337
2338 if (sdhci_send_command(&dev->host, &cmd))
2339 return 1;
2340
2341 /* CMD28/CMD29 On failure returns address out of range error */
2342 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2343 {
2344 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2345 return 1;
2346 }
2347
2348 /* Check the card status */
2349 do
2350 {
2351 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2352 {
2353 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2354 return 1;
2355 }
2356
2357 /* Time out for WP command */
2358 retry++;
2359 udelay(1000);
2360 if (retry == MMC_MAX_CARD_STAT_RETRY)
2361 {
2362 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2363 return 1;
2364 }
2365 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2366
2367 }
2368
2369 return 0;
2370}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002371
2372/* Function to put the mmc card to sleep */
2373void mmc_put_card_to_sleep(struct mmc_device *dev)
2374{
2375 struct mmc_command cmd = {0};
2376 struct mmc_card *card = &dev->card;
2377
2378 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2379 cmd.argument = 0x00000000;
2380 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2381 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2382
2383 /* send command */
2384 if(sdhci_send_command(&dev->host, &cmd))
2385 {
2386 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2387 return;
2388 }
vijay kumarb01d64c2015-08-21 20:37:29 +05302389 if(MMC_CARD_MMC(card)){
2390 /*CMD5 is reserved in SD card */
2391 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2392 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2393 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2394 cmd.resp_type = SDHCI_CMD_RESP_R1B;
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002395
vijay kumarb01d64c2015-08-21 20:37:29 +05302396 /* send command */
2397 if(sdhci_send_command(&dev->host, &cmd))
2398 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2399 }
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002400}
Channagoud Kadabi31d648c2015-01-29 12:59:00 -08002401
2402/*
2403 * Switch the partition access type to rpmb or default
2404 */
2405static uint32_t mmc_sdhci_switch_part(struct mmc_device *dev, uint32_t type)
2406{
2407 uint32_t part_access;
2408 uint32_t ret;
2409
2410 /* Clear the partition access */
2411 part_access = dev->card.ext_csd[MMC_PARTITION_CONFIG] & ~PARTITION_ACCESS_MASK;
2412 part_access |= type;
2413
2414 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_ACCESS_WRITE, MMC_PARTITION_CONFIG, part_access);
2415
2416 if (ret)
2417 {
2418 dprintf(CRITICAL, "Failed to switch partition to type: %u\n", type);
2419 return 1;
2420 }
2421
2422 dev->card.ext_csd[MMC_PARTITION_CONFIG] = part_access;
2423 return 0;
2424}
2425
2426static uint32_t mmc_sdhci_set_blk_cnt(struct mmc_device *dev, uint32_t blk_cnt, uint32_t rel_write)
2427{
2428 struct mmc_command cmd = {0};
2429
2430 cmd.cmd_index = CMD23_SET_BLOCK_COUNT;
2431 cmd.argument = blk_cnt & 0x0000ffff;
2432 cmd.argument |= rel_write;
2433 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2434 cmd.resp_type = SDHCI_CMD_RESP_R1;
2435
2436 if (sdhci_send_command(&dev->host, &cmd))
2437 {
2438 dprintf(CRITICAL, "Set block count failed: %s\n", __func__);
2439 return 1;
2440 }
2441
2442 return 0;
2443}
2444
2445uint32_t mmc_sdhci_rpmb_send(struct mmc_device *dev, struct mmc_command *cmd)
2446{
2447 int i;
2448 uint32_t retry = 5;
2449 uint32_t status;
2450 uint32_t rel_write = 0;
2451 uint32_t ret = 1;
2452
2453 ASSERT(cmd);
2454
2455 /* 1. Set the partition type to rpmb */
2456 if (mmc_sdhci_switch_part(dev, PART_ACCESS_RPMB))
2457 return 1;
2458
2459 for (i = 0; i < MAX_RPMB_CMDS; i++)
2460 {
2461 if (!cmd[i].cmd_index)
2462 break;
2463
2464 if (cmd[i].write_flag == true)
2465 rel_write = BIT(31);
2466 else
2467 rel_write = 0;
2468
2469 /* 2. Set the block count using cmd23 */
2470 if (mmc_sdhci_set_blk_cnt(dev, cmd[i].data.num_blocks, rel_write))
2471 goto err;
2472
2473 /* 3. Send the command */
2474 if (sdhci_send_command(&dev->host, &cmd[i]))
2475 goto err;
2476 do
2477 {
2478 /* 4. Poll for card status to ensure rpmb operation completeness */
2479 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2480 {
2481 dprintf(CRITICAL, "Failed to get card status after rpmb operations\n");
2482 goto err;
2483 }
2484
2485 retry--;
2486 udelay(500);
2487 if (!retry)
2488 {
2489 dprintf(CRITICAL, "Card status check timed out after rpmb operations\n");
2490 goto err;
2491 }
2492 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2493 }
2494
2495 /* If we reach here, that means success */
2496 ret = 0;
2497
2498err:
2499 /* 5. Switch the partition back to default type */
2500 if (mmc_sdhci_switch_part(dev, PART_ACCESS_DEFAULT))
2501 ret = 1;
2502
2503 return ret;
2504}