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Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
2 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 */
28
29#include <string.h>
30#include <stdlib.h>
31#include <debug.h>
32#include <reg.h>
33#include <mmc_sdhci.h>
34#include <sdhci.h>
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070035#include <sdhci_msm.h>
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070036#include <partition_parser.h>
37#include <platform/iomap.h>
38#include <platform/timer.h>
39
40extern void clock_init_mmc(uint32_t);
41extern void clock_config_mmc(uint32_t, uint32_t);
42
43/* data access time unit in ns */
44static const uint32_t taac_unit[] =
45{
46 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
47};
48
49/* data access time value x 10 */
50static const uint32_t taac_value[] =
51{
52 0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
53};
54
55/* data transfer rate in kbit/s */
56static const uint32_t xfer_rate_unit[] =
57{
58 100, 1000, 10000, 100000, 0, 0, 0, 0
59};
60
61/* data transfer rate value x 10*/
62static const uint32_t xfer_rate_value[] =
63{
64 0, 10, 12, 13, 15, 20, 26, 30, 35, 40, 45, 52, 55, 60, 70, 80
65};
66
67/*
68 * Function: mmc decode and save csd
69 * Arg : Card structure & raw csd
70 * Return : 0 on Success, 1 on Failure
71 * Flow : Decodes CSD response received from the card.
72 * Note that we have defined only few of the CSD elements
73 * in csd structure. We'll only decode those values.
74 */
75static uint32_t mmc_decode_and_save_csd(struct mmc_card *card)
76{
77 uint32_t mmc_sizeof = 0;
78 uint32_t mmc_unit = 0;
79 uint32_t mmc_value = 0;
80 uint32_t mmc_temp = 0;
81 uint32_t *raw_csd = card->raw_csd;
82
83 struct mmc_csd mmc_csd;
84
85 mmc_sizeof = sizeof(uint32_t) * 8;
86
87 mmc_csd.cmmc_structure = UNPACK_BITS(raw_csd, 126, 2, mmc_sizeof);
88
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -070089 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -070090 /* Parse CSD according to SD card spec. */
91
92 /* CSD register is little bit differnet for CSD version 2.0 High
93 * Capacity and CSD version 1.0/2.0 Standard memory cards.
94 * In Version 2.0 some of the fields have fixed values and it's
95 * not necessary for host to refer these fields in CSD sent by
96 * card
97 */
98
99 if (mmc_csd.cmmc_structure == 1) {
100 /* CSD Version 2.0 */
101 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
102 /* Fixed value is 9 = 2^9 = 512 */
103 mmc_csd.write_blk_len = 512;
104 /* Fixed value is 9 = 512 */
105 mmc_csd.read_blk_len = 512;
106 /* Fixed value: 010b */
107 mmc_csd.r2w_factor = 0x2;
108 /* Not there in version 2.0 */
109 mmc_csd.c_size_mult = 0;
110 mmc_csd.c_size = UNPACK_BITS(raw_csd, 48, 22, mmc_sizeof);
111 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
112 * 100;
113
114 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
115 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
116 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
117 / 10;
118
119 mmc_csd.erase_blk_len = 1;
120 mmc_csd.read_blk_misalign = 0;
121 mmc_csd.write_blk_misalign = 0;
122 mmc_csd.read_blk_partial = 0;
123 mmc_csd.write_blk_partial = 0;
124
125 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
126 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
127 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
128 xfer_rate_unit[mmc_unit]) / 10;
129
130 mmc_csd.wp_grp_size = 0x0;
131 mmc_csd.wp_grp_enable = 0x0;
132 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
133 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
134
135 /* Calculate the card capcity */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700136 card->capacity = (unsigned long long) (1 + mmc_csd.c_size) * 512 * 1024;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700137 } else {
138 /* CSD Version 1.0 */
139 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
140
141 mmc_temp = UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
142 mmc_csd.write_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
143 (1 << mmc_temp) : 512;
144
145 mmc_temp = UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
146 mmc_csd.read_blk_len = (mmc_temp > 8 && mmc_temp < 12) ?
147 (1 << mmc_temp) : 512;
148
149 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
150 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
151 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit])
152 / 10;
153
154 mmc_unit = UNPACK_BITS(raw_csd, 96, 3, mmc_sizeof);
155 mmc_value = UNPACK_BITS(raw_csd, 99, 4, mmc_sizeof);
156 mmc_csd.tran_speed = (xfer_rate_value[mmc_value] *
157 xfer_rate_unit[mmc_unit]) / 10;
158
159 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof)
160 * 100;
161
162 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
163 mmc_csd.sector_size = UNPACK_BITS(raw_csd, 39, 7, mmc_sizeof) + 1;
164
165 mmc_csd.erase_blk_len = UNPACK_BITS(raw_csd, 46, 1, mmc_sizeof);
166 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
167 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
168 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
169 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
170
171 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
172 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
173 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 7, mmc_sizeof);
174 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
175 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
176 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
177
178 /* Calculate the card capacity */
179 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700180 card->capacity = (unsigned long long)mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700181 }
182 } else {
183 /* Parse CSD according to MMC card spec. */
184 mmc_csd.spec_vers = UNPACK_BITS(raw_csd, 122, 4, mmc_sizeof);
185 mmc_csd.card_cmd_class = UNPACK_BITS(raw_csd, 84, 12, mmc_sizeof);
186 mmc_csd.write_blk_len = 1 << UNPACK_BITS(raw_csd, 22, 4, mmc_sizeof);
187 mmc_csd.read_blk_len = 1 << UNPACK_BITS(raw_csd, 80, 4, mmc_sizeof);
188 mmc_csd.r2w_factor = UNPACK_BITS(raw_csd, 26, 3, mmc_sizeof);
189 mmc_csd.c_size_mult = UNPACK_BITS(raw_csd, 47, 3, mmc_sizeof);
190 mmc_csd.c_size = UNPACK_BITS(raw_csd, 62, 12, mmc_sizeof);
191 mmc_csd.nsac_clk_cycle = UNPACK_BITS(raw_csd, 104, 8, mmc_sizeof) * 100;
192
193 mmc_unit = UNPACK_BITS(raw_csd, 112, 3, mmc_sizeof);
194 mmc_value = UNPACK_BITS(raw_csd, 115, 4, mmc_sizeof);
195 mmc_csd.taac_ns = (taac_value[mmc_value] * taac_unit[mmc_unit]) / 10;
196
197 mmc_csd.read_blk_misalign = UNPACK_BITS(raw_csd, 77, 1, mmc_sizeof);
198 mmc_csd.write_blk_misalign = UNPACK_BITS(raw_csd, 78, 1, mmc_sizeof);
199 mmc_csd.read_blk_partial = UNPACK_BITS(raw_csd, 79, 1, mmc_sizeof);
200 mmc_csd.write_blk_partial = UNPACK_BITS(raw_csd, 21, 1, mmc_sizeof);
201
202 /* Ignore -- no use of this value. */
203 mmc_csd.tran_speed = 0x00;
204
205 mmc_csd.erase_grp_size = UNPACK_BITS(raw_csd, 42, 5, mmc_sizeof);
206 mmc_csd.erase_grp_mult = UNPACK_BITS(raw_csd, 37, 5, mmc_sizeof);
207 mmc_csd.wp_grp_size = UNPACK_BITS(raw_csd, 32, 5, mmc_sizeof);
208 mmc_csd.wp_grp_enable = UNPACK_BITS(raw_csd, 31, 1, mmc_sizeof);
209 mmc_csd.perm_wp = UNPACK_BITS(raw_csd, 13, 1, mmc_sizeof);
210 mmc_csd.temp_wp = UNPACK_BITS(raw_csd, 12, 1, mmc_sizeof);
211
212 /* Calculate the card capcity */
213 if (mmc_csd.c_size != 0xFFF) {
214 /* For cards less than or equal to 2GB */
215 mmc_temp = (1 << (mmc_csd.c_size_mult + 2)) * (mmc_csd.c_size + 1);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700216 card->capacity = (unsigned long long) mmc_temp * mmc_csd.read_blk_len;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700217 } else {
218 /* For cards greater than 2GB, Ext CSD register's SEC_COUNT
219 * is used to calculate the size.
220 */
221 uint64_t sec_count;
222
223 sec_count = (card->ext_csd[MMC_SEC_COUNT4] << MMC_SEC_COUNT4_SHIFT)
224 | (card->ext_csd[MMC_SEC_COUNT3] << MMC_SEC_COUNT3_SHIFT)
225 | (card->ext_csd[MMC_SEC_COUNT2] << MMC_SEC_COUNT2_SHIFT)
226 | card->ext_csd[MMC_SEC_COUNT1];
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700227 card->capacity = sec_count * MMC_BLK_SZ;
228 }
229 }
230
231 /* save the information in card structure */
232 memcpy((struct mmc_csd *)&card->csd,(struct mmc_csd *)&mmc_csd,
233 sizeof(struct mmc_csd));
234
235 dprintf(SPEW, "Decoded CSD fields:\n");
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700236 dprintf(SPEW, "cmmc_structure: %u\n", mmc_csd.cmmc_structure);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700237 dprintf(SPEW, "card_cmd_class: %x\n", mmc_csd.card_cmd_class);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700238 dprintf(SPEW, "write_blk_len: %u\n", mmc_csd.write_blk_len);
239 dprintf(SPEW, "read_blk_len: %u\n", mmc_csd.read_blk_len);
240 dprintf(SPEW, "r2w_factor: %u\n", mmc_csd.r2w_factor);
241 dprintf(SPEW, "sector_size: %u\n", mmc_csd.sector_size);
242 dprintf(SPEW, "c_size_mult:%u\n", mmc_csd.c_size_mult);
243 dprintf(SPEW, "c_size: %u\n", mmc_csd.c_size);
244 dprintf(SPEW, "nsac_clk_cycle: %u\n", mmc_csd.nsac_clk_cycle);
245 dprintf(SPEW, "taac_ns: %u\n", mmc_csd.taac_ns);
246 dprintf(SPEW, "tran_speed: %u kbps\n", mmc_csd.tran_speed);
247 dprintf(SPEW, "erase_blk_len: %u\n", mmc_csd.erase_blk_len);
248 dprintf(SPEW, "read_blk_misalign: %u\n", mmc_csd.read_blk_misalign);
249 dprintf(SPEW, "write_blk_misalign: %u\n", mmc_csd.write_blk_misalign);
250 dprintf(SPEW, "read_blk_partial: %u\n", mmc_csd.read_blk_partial);
251 dprintf(SPEW, "write_blk_partial: %u\n", mmc_csd.write_blk_partial);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700252 dprintf(SPEW, "Card Capacity: %llu Bytes\n", card->capacity);
253
254 return 0;
255}
256
257/*
258 * Function: mmc decode & save cid
259 * Arg : card structure & raw cid
260 * Return : 0 on Success, 1 on Failure
261 * Flow : Decode CID sent by the card.
262 */
263static uint32_t mmc_decode_and_save_cid(struct mmc_card *card,
264 uint32_t *raw_cid)
265{
266 struct mmc_cid mmc_cid;
267 uint32_t mmc_sizeof = 0;
268 int i = 0;
269
270 if (!raw_cid) {
271 return 1;
272 }
273
274 mmc_sizeof = sizeof(uint32_t) * 8;
275
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700276 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700277 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
278 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
279
280 for (i = 0; i < 5; i++) {
281 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid,
282 (104 - 8 * (i + 1)),
283 8,
284 mmc_sizeof);
285 }
286 mmc_cid.pnm[5] = 0;
287 mmc_cid.pnm[6] = 0;
288
289 mmc_cid.prv = UNPACK_BITS(raw_cid, 56, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700290 mmc_cid.psn = UNPACK_BITS(raw_cid, 24, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700291 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
292 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 8, mmc_sizeof);
293 mmc_cid.year += 2000;
294 } else {
295 mmc_cid.mid = UNPACK_BITS(raw_cid, 120, 8, mmc_sizeof);
296 mmc_cid.oid = UNPACK_BITS(raw_cid, 104, 16, mmc_sizeof);
297
298 for (i = 0; i < 6; i++) {
299 mmc_cid.pnm[i] = (uint8_t)UNPACK_BITS(raw_cid, (104 - 8 * (i + 1)),
300 8, mmc_sizeof);
301 }
302 mmc_cid.pnm[6] = 0;
303
304 mmc_cid.prv = UNPACK_BITS(raw_cid, 48, 8, mmc_sizeof);
David Ng571b8c32013-07-30 19:17:42 -0700305 mmc_cid.psn = UNPACK_BITS(raw_cid, 16, 32, mmc_sizeof);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700306 mmc_cid.month = UNPACK_BITS(raw_cid, 8, 4, mmc_sizeof);
307 mmc_cid.year = UNPACK_BITS(raw_cid, 12, 4, mmc_sizeof);
308 mmc_cid.year += 1997;
309 }
310
311 /* save it in card database */
312 memcpy((struct mmc_cid *)&card->cid,
313 (struct mmc_cid *)&mmc_cid, sizeof(struct mmc_cid));
314
315 dprintf(SPEW, "Decoded CID fields:\n");
316 dprintf(SPEW, "Manufacturer ID: %x\n", mmc_cid.mid);
317 dprintf(SPEW, "OEM ID: 0x%x\n", mmc_cid.oid);
318 dprintf(SPEW, "Product Name: %s\n", mmc_cid.pnm);
319 dprintf(SPEW, "Product revision: %d.%d\n", (mmc_cid.prv >> 4),
320 (mmc_cid.prv & 0xF));
321 dprintf(SPEW, "Product serial number: %X\n", mmc_cid.psn);
322 dprintf(SPEW, "Manufacturing date: %d %d\n", mmc_cid.month, mmc_cid.year);
323
324 return 0;
325}
326
327/*
328 * Function: mmc reset cards
329 * Arg : host structure
330 * Return : 0 on Success, 1 on Failure
331 * Flow : Reset all the cards to idle condition (CMD 0)
332 */
333static uint8_t mmc_reset_card(struct sdhci_host *host)
334{
335 struct mmc_command cmd;
336
337 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
338
339 cmd.cmd_index = CMD0_GO_IDLE_STATE;
340 cmd.argument = 0;
341 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
342 cmd.resp_type = SDHCI_CMD_RESP_NONE;
343
344 /* send command */
345 return sdhci_send_command(host, &cmd);
346}
347
348/*
349 * Function: mmc operations command
350 * Arg : host & card structure
351 * Return : 0 on Success, 1 on Failure
352 * Flow : Send CMD1 to know whether the card supports host VDD profile or not.
353 */
354static uint32_t mmc_send_op_cond(struct sdhci_host *host, struct mmc_card *card)
355{
356 struct mmc_command cmd;
357 uint32_t mmc_resp = 0;
358 uint32_t mmc_ret = 0;
359 uint32_t mmc_retry = 0;
360
361 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
362
363 /* CMD1 format:
364 * [31] Busy bit
365 * [30:29] Access mode
366 * [28:24] reserved
367 * [23:15] 2.7-3.6
368 * [14:8] 2.0-2.6
369 * [7] 1.7-1.95
370 * [6:0] reserved
371 */
372
373 cmd.cmd_index = CMD1_SEND_OP_COND;
374 cmd.argument = card->ocr;
375 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
376 cmd.resp_type = SDHCI_CMD_RESP_R3;
377
378 do {
379 mmc_ret = sdhci_send_command(host, &cmd);
380 if (mmc_ret)
381 return mmc_ret;
382
383 /* Command returned success, now it's time to examine response */
384 mmc_resp = cmd.resp[0];
385
386 /* Check the response for busy status */
387 if (!(mmc_resp & MMC_OCR_BUSY)) {
388 mmc_retry++;
389 mdelay(1);
390 continue;
391 } else
392 break;
393 } while (mmc_retry < MMC_MAX_COMMAND_RETRY);
394
395 /* If we reached here after max retries, we failed to get OCR */
396 if (mmc_retry == MMC_MAX_COMMAND_RETRY && !(mmc_resp & MMC_OCR_BUSY)) {
397 dprintf(CRITICAL, "Card has busy status set. Init did not complete\n");
398 return 1;
399 }
400
401 /* Response contains card's ocr. Update card's information */
402 card->ocr = mmc_resp;
403
404 if (mmc_resp & MMC_OCR_SEC_MODE)
405 card->type = MMC_TYPE_MMCHC;
406 else
407 card->type = MMC_TYPE_STD_MMC;
408
409 return 0;
410}
411
412/*
413 * Function: mmc send cid
414 * Arg : host & card structure
415 * Return : 0 on Success, 1 on Failure
416 * Flow : Request any card to send its uniquie card identification
417 * (CID) number (CMD2).
418 */
419static uint32_t mmc_all_send_cid(struct sdhci_host *host, struct mmc_card *card)
420{
421 struct mmc_command cmd;
422 uint32_t mmc_ret = 0;
423
424 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
425
426 /* CMD2 Format:
427 * [31:0] stuff bits
428 */
429 cmd.cmd_index = CMD2_ALL_SEND_CID;
430 cmd.argument = 0;
431 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
432 cmd.resp_type = SDHCI_CMD_RESP_R2;
433
434 /* send command */
435 mmc_ret = sdhci_send_command(host, &cmd);
436 if (mmc_ret) {
437 return mmc_ret;
438 }
439
440 /* Response contains card's 128 bits CID register */
441 mmc_ret = mmc_decode_and_save_cid(card, cmd.resp);
442 if (mmc_ret) {
443 return mmc_ret;
444 }
445
446 return 0;
447}
448
449/*
450 * Function: mmc send relative address
451 * Arg : host & card structure
452 * Return : 0 on Success, 1 on Failure
453 * Flow : Ask card to send it's relative card address (RCA).
454 * This RCA number is shorter than CID and is used by
455 * the host to address the card in future (CMD3)
456 */
457static uint32_t mmc_send_relative_address(struct sdhci_host *host,
458 struct mmc_card *card)
459{
460 struct mmc_command cmd;
461 uint32_t mmc_ret = 0;
462
463 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
464
465 /* CMD3 Format:
466 * [31:0] stuff bits
467 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700468 if (MMC_CARD_SD(card)) {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700469 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
470 cmd.argument = 0;
471 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
472 cmd.resp_type = SDHCI_CMD_RESP_R6;
473
474 /* send command */
475 mmc_ret = sdhci_send_command(host, &cmd);
476 if (mmc_ret)
477 return mmc_ret;
478
479 /* For sD, card will send RCA. Store it */
480 card->rca = (cmd.resp[0] >> 16);
481 } else {
482 cmd.cmd_index = CMD3_SEND_RELATIVE_ADDR;
483 cmd.argument = (MMC_RCA << 16);
484 card->rca = (cmd.argument >> 16);
485 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
486 cmd.resp_type = SDHCI_CMD_RESP_R6;
487
488 /* send command */
489 mmc_ret = sdhci_send_command(host, &cmd);
490 if (mmc_ret)
491 return mmc_ret;
492 }
493
494 return 0;
495}
496
497/*
498 * Function: mmc send csd
499 * Arg : host, card structure & o/p arg to store csd
500 * Return : 0 on Success, 1 on Failure
501 * Flow : Requests card to send it's CSD register's contents. (CMD9)
502 */
503static uint32_t mmc_send_csd(struct sdhci_host *host, struct mmc_card *card)
504{
505 struct mmc_command cmd;
506 uint32_t mmc_arg = 0;
507 uint32_t mmc_ret = 0;
508
509 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
510
511 /* CMD9 Format:
512 * [31:16] RCA
513 * [15:0] stuff bits
514 */
515 mmc_arg |= card->rca << 16;
516
517 cmd.cmd_index = CMD9_SEND_CSD;
518 cmd.argument = mmc_arg;
519 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
520 cmd.resp_type = SDHCI_CMD_RESP_R2;
521
522 /* send command */
523 mmc_ret = sdhci_send_command(host, &cmd);
524 if (mmc_ret)
525 return mmc_ret;
526
527 /* response contains the card csd */
528 memcpy(card->raw_csd, cmd.resp, sizeof(cmd.resp));
529
530 return 0;
531}
532
533/*
534 * Function: mmc select card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700535 * Arg : host, card structure
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700536 * Return : 0 on Success, 1 on Failure
537 * Flow : Selects a card by sending CMD7 to the card with its RCA.
538 * If RCA field is set as 0 ( or any other address ),
539 * the card will be de-selected. (CMD7)
540 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700541static uint32_t mmc_select_card(struct sdhci_host *host, struct mmc_card *card)
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700542{
543 struct mmc_command cmd;
544 uint32_t mmc_arg = 0;
545 uint32_t mmc_ret = 0;
546
547 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
548
549 /* CMD7 Format:
550 * [31:16] RCA
551 * [15:0] stuff bits
552 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700553 mmc_arg |= card->rca << 16;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700554
555 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
556 cmd.argument = mmc_arg;
557 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
558
559 /* If we are deselecting card, we do not get response */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -0700560 if (card->rca) {
561 if (MMC_CARD_SD(card))
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700562 cmd.resp_type = SDHCI_CMD_RESP_R1B;
563 else
564 cmd.resp_type = SDHCI_CMD_RESP_R1;
565 } else
566 cmd.resp_type = SDHCI_CMD_RESP_NONE;
567
568 /* send command */
569 mmc_ret = sdhci_send_command(host, &cmd);
570 if (mmc_ret)
571 return mmc_ret;
572
573 return 0;
574}
575
576/*
577 * Function: mmc set block len
578 * Arg : host, card structure & block length
579 * Return : 0 on Success, 1 on Failure
580 * Flow : Send command to set block length.
581 */
582static uint32_t mmc_set_block_len(struct sdhci_host *host,
583 struct mmc_card *card,
584 uint32_t block_len)
585{
586 struct mmc_command cmd;
587 uint32_t mmc_ret = 0;
588
589 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
590
591 /* CMD16 Format:
592 * [31:0] block length
593 */
594
595 cmd.cmd_index = CMD16_SET_BLOCKLEN;
596 cmd.argument = block_len;
597 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
598 cmd.resp_type = SDHCI_CMD_RESP_R1;
599
600 /* send command */
601 mmc_ret = sdhci_send_command(host, &cmd);
602 if (mmc_ret)
603 return mmc_ret;
604
605 /*
606 * If blocklength is larger than 512 bytes,
607 * the card sets BLOCK_LEN_ERROR bit.
608 */
609 if (cmd.resp[0] & MMC_R1_BLOCK_LEN_ERR) {
610 dprintf(CRITICAL, "The block length is not supported by the card\n");
611 return 1;
612 }
613
614 return 0;
615}
616
617/*
618 * Function: mmc get card status
619 * Arg : host, card structure & o/p argument card status
620 * Return : 0 on Success, 1 on Failure
621 * Flow : Get the current status of the card
622 */
623static uint32_t mmc_get_card_status(struct sdhci_host *host,
624 struct mmc_card *card, uint32_t *status)
625{
626 struct mmc_command cmd;
627 uint32_t mmc_ret = 0;
628
629 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
630
631 /* CMD13 Format:
632 * [31:16] RCA
633 * [15:0] stuff bits
634 */
635 cmd.cmd_index = CMD13_SEND_STATUS;
636 cmd.argument = card->rca << 16;
637 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
638 cmd.resp_type = SDHCI_CMD_RESP_R1;
639
640 /* send command */
641 mmc_ret = sdhci_send_command(host, &cmd);
642 if (mmc_ret)
643 return mmc_ret;
644
645 /* Checking ADDR_OUT_OF_RANGE error in CMD13 response */
646 if ((cmd.resp[0] >> 31) & 0x01)
647 return 1;
648
649 *status = cmd.resp[0];
650 return 0;
651}
652
653/*
654 * Function: mmc get ext csd
655 * Arg : host, card structure & array to hold ext attributes
656 * Return : 0 on Success, 1 on Failure
657 * Flow : Send ext csd command & get the card attributes
658 */
659static uint32_t mmc_get_ext_csd(struct sdhci_host *host, struct mmc_card *card)
660{
661 struct mmc_command cmd;
662 uint32_t mmc_ret = 0;
663
664 card->ext_csd = memalign(CACHE_LINE, ROUNDUP(512, CACHE_LINE));
665
666 ASSERT(card->ext_csd);
667
668 memset(card->ext_csd, 0, sizeof(card->ext_csd));
669
670 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
671
672 /* CMD8 */
673 cmd.cmd_index = CMD8_SEND_EXT_CSD;
674 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
675 cmd.resp_type = SDHCI_CMD_RESP_R1;
676 cmd.data.data_ptr = card->ext_csd;
677 cmd.data.num_blocks = 1;
678 cmd.data_present = 0x1;
679 cmd.trans_mode = SDHCI_MMC_READ;
680
681 /* send command */
682 mmc_ret = sdhci_send_command(host, &cmd);
683 if (mmc_ret)
684 return mmc_ret;
685
686 return mmc_ret;
687}
688
689/*
690 * Function: mmc switch command
691 * Arg : Host, card structure, access mode, index & value to be set
692 * Return : 0 on Success, 1 on Failure
693 * Flow : Send switch command to the card to set the ext attribute @ index
694 */
695static uint32_t mmc_switch_cmd(struct sdhci_host *host, struct mmc_card *card,
696 uint32_t access, uint32_t index, uint32_t value)
697{
698
699 struct mmc_command cmd;
700 uint32_t mmc_ret = 0;
701 uint32_t mmc_status;
702
703 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
704
705 /* CMD6 Format:
706 * [31:26] set to 0
707 * [25:24] access
708 * [23:16] index
709 * [15:8] value
710 * [7:3] set to 0
711 * [2:0] cmd set
712 */
713 cmd.cmd_index = CMD6_SWITCH_FUNC;
714 cmd.argument |= (access << 24);
715 cmd.argument |= (index << 16);
716 cmd.argument |= (value << 8);
717 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
718 cmd.resp_type = SDHCI_CMD_RESP_R1B;
719
720 mmc_ret = sdhci_send_command(host, &cmd);
721 if (mmc_ret) {
722 dprintf(CRITICAL, "CMD6 send failed\n");
723 return mmc_ret;
724 }
725
726 /* Check if the card completed the switch command processing */
727 mmc_ret = mmc_get_card_status(host, card, &mmc_status);
728 if (mmc_ret) {
729 dprintf(CRITICAL, "Get card status failed\n");
730 return mmc_ret;
731 }
732
733 if (MMC_CARD_STATUS(mmc_status) != MMC_TRAN_STATE) {
734 dprintf(CRITICAL, "Switch cmd failed. Card not in tran state\n");
735 mmc_ret = 1;
736 }
737
738 if (mmc_status & MMC_SWITCH_FUNC_ERR_FLAG) {
739 dprintf(CRITICAL, "Switch cmd failed. Switch Error.\n");
740 mmc_ret = 1;
741 }
742
743 return mmc_ret;
744}
745
746/*
747 * Function: mmc set bus width
748 * Arg : Host, card structure & width
749 * Return : 0 on Success, 1 on Failure
750 * Flow : Send switch command to set bus width
751 */
752static uint32_t mmc_set_bus_width(struct sdhci_host *host,
753 struct mmc_card *card,
754 uint32_t width)
755{
756 uint32_t mmc_ret = 0;
757
758 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
759 MMC_EXT_MMC_BUS_WIDTH, width);
760
761 if (mmc_ret) {
762 dprintf(CRITICAL, "Switch cmd failed\n");
763 return mmc_ret;
764 }
765
766 return 0;
767}
768
769
770/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700771 * Function: mmc card supports hs400 mode
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700772 * Arg : None
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700773 * Return : 1 if hs400 mode is supported, 0 otherwise
774 * Flow : Check the ext csd attributes of the card
775 */
776static uint8_t mmc_card_supports_hs400_mode(struct mmc_card *card)
777{
778 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS400_MODE)
779 return 1;
780 else
781 return 0;
782}
783
784/*
785 * Function: mmc card supports hs200 mode
786 * Arg : None
787 * Return : 1 if HS200 mode is supported, 0 otherwise
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700788 * Flow : Check the ext csd attributes of the card
789 */
790static uint8_t mmc_card_supports_hs200_mode(struct mmc_card *card)
791{
792 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_HS200_MODE)
793 return 1;
794 else
795 return 0;
796}
797
798/*
799 * Function: mmc card supports ddr mode
800 * Arg : None
801 * Return : 1 if DDR mode is supported, 0 otherwise
802 * Flow : Check the ext csd attributes of the card
803 */
804static uint8_t mmc_card_supports_ddr_mode(struct mmc_card *card)
805{
806 if (card->ext_csd[MMC_DEVICE_TYPE] & MMC_HS_DDR_MODE)
807 return 1;
808 else
809 return 0;
810}
811
812/*
813 * Function : Enable HS200 mode
814 * Arg : Host, card structure and bus width
815 * Return : 0 on Success, 1 on Failure
816 * Flow :
817 * - Set the bus width to 4/8 bit SDR as supported by the target & host
818 * - Set the HS_TIMING on ext_csd 185 for the card
819 */
820static uint32_t mmc_set_hs200_mode(struct sdhci_host *host,
821 struct mmc_card *card, uint32_t width)
822{
823 uint32_t mmc_ret = 0;
824
825 /* Set 4/8 bit SDR bus width */
826 mmc_ret = mmc_set_bus_width(host, card, width);
827 if (mmc_ret) {
828 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
829 card->rca);
830 return mmc_ret;
831 }
832
833 /* Setting HS200 in HS_TIMING using EXT_CSD (CMD6) */
834 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS200_TIMING);
835
836 if (mmc_ret) {
837 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
838 return mmc_ret;
839 }
840
Channagoud Kadabi1dc6aab2013-11-20 12:46:15 -0800841 /* Enable SDR104 mode in controller */
842 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
843
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700844 /* Run the clock @ 400 Mhz */
845 if (mmc_card_supports_hs400_mode(card))
846 {
847 clock_config_mmc(host->msm_host->slot, SDHCI_CLK_400MHZ);
848 /* Save the timing value, before changing the clock */
849 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
850 }
851 else
852 {
853 /* Save the timing value, before changing the clock */
854 MMC_SAVE_TIMING(host, MMC_HS200_TIMING);
855 }
856
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700857 /* Execute Tuning for hs200 mode */
858 if ((mmc_ret = sdhci_msm_execute_tuning(host, width)))
859 dprintf(CRITICAL, "Tuning for hs200 failed\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700860
861 return mmc_ret;
862}
863
864/*
865 * Function: mmc set ddr mode
866 * Arg : Host & card structure
867 * Return : 0 on Success, 1 on Failure
868 * Flow : Set bus width for ddr mode & set controller in DDR mode
869*/
870static uint8_t mmc_set_ddr_mode(struct sdhci_host *host, struct mmc_card *card)
871{
872 uint8_t mmc_ret = 0;
873
874 /* Set width for 8 bit DDR mode by default */
875 mmc_ret = mmc_set_bus_width(host, card, DATA_DDR_BUS_WIDTH_8BIT);
876
877 if (mmc_ret) {
878 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
879 card->rca);
880 return mmc_ret;
881 }
882
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700883 /* Save the timing value, before changing the clock */
884 MMC_SAVE_TIMING(host, SDHCI_DDR50_MODE);
885
886 /* Set the DDR mode in controller */
887 sdhci_set_uhs_mode(host, SDHCI_DDR50_MODE);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700888
889 return 0;
890}
891
892/*
893 * Function: mmc set high speed interface
894 * Arg : Host & card structure
895 * Return : None
896 * Flow : Sets the sdcc clock & clock divider in the host controller
897 * Adjust the interface speed to optimal speed
898 */
899static uint32_t mmc_set_hs_interface(struct sdhci_host *host,
900 struct mmc_card *card)
901{
902 uint32_t mmc_ret = 0;
903
904 /* Setting HS_TIMING in EXT_CSD (CMD6) */
905 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE,
906 MMC_EXT_MMC_HS_TIMING, MMC_HS_TIMING);
907
908 if (mmc_ret) {
909 dprintf(CRITICAL, "Switch cmd returned failure %d\n", __LINE__);
910 return mmc_ret;
911 }
912
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700913 /* Save the timing value, before changing the clock */
914 MMC_SAVE_TIMING(host, SDHCI_SDR25_MODE);
915
916 /* Set the SDR25 mode in controller */
917 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
918
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -0700919 return 0;
920}
921
922/*
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -0700923 * Function : Enable HS400 mode
924 * Arg : Host, card structure and bus width
925 * Return : 0 on Success, 1 on Failure
926 * Flow :
927 * - Set the bus width to 8 bit DDR
928 * - Set the HS_TIMING on ext_csd 185 for the card
929 */
930uint32_t mmc_set_hs400_mode(struct sdhci_host *host,
931 struct mmc_card *card, uint32_t width)
932{
933 uint32_t mmc_ret = 0;
934
935 /*
936 * Emmc 5.0 spec does not allow changing to hs400 mode directly
937 * Need to follow the sequence to change to hs400 mode
938 * 1. Enable HS200 mode, perform tuning
939 * 2. Change to high speed mode
940 * 3. Enable DDR mode
941 * 4. Enable HS400 mode & execute tuning
942 */
943
944 /* HS400 mode is supported only in DDR 8-bit */
945 if (width != DATA_BUS_WIDTH_8BIT)
946 {
947 dprintf(CRITICAL, "Bus width is not 8-bit, cannot switch to hs400: %u\n", width);
948 return 1;
949 }
950
951 /* 1.Enable HS200 mode */
952 mmc_ret = mmc_set_hs200_mode(host, card, width);
953
954 if (mmc_ret)
955 {
956 dprintf(CRITICAL, "Failure Setting HS200 mode %s\t%d\n",__func__, __LINE__);
957 return mmc_ret;
958 }
959
960 /* 2. Enable High speed mode */
961 /* This is needed to set the clock to a low value &
962 * so that we can switch to hs_timing --> 0x1 */
963 /* Save the timing value, before changing the clock */
964 MMC_SAVE_TIMING(host, SDHCI_SDR12_MODE);
965 sdhci_set_uhs_mode(host, SDHCI_SDR12_MODE);
966
967 /* 3. Set HS_TIMING to 0x1 */
968 mmc_ret = mmc_set_hs_interface(host, card);
969 if (mmc_ret)
970 {
971 dprintf(CRITICAL, "Error adjusting interface speed!:%s\t%d\n", __func__, __LINE__);
972 return mmc_ret;
973 }
974
975 /*4. Enable DDR mode */
976 mmc_ret = mmc_set_ddr_mode(host, card);
977 if (mmc_ret)
978 {
979 dprintf(CRITICAL, "Failure setting DDR mode:%s\t%d\n", __func__, __LINE__);
980 return mmc_ret;
981 }
982
983 /*5. Set hs400 timing */
984 mmc_ret = mmc_switch_cmd(host, card, MMC_ACCESS_WRITE, MMC_EXT_MMC_HS_TIMING, MMC_HS400_TIMING);
985
986 if (mmc_ret)
987 {
988 dprintf(CRITICAL, "Switch cmd returned failure %s\t%d\n",__func__, __LINE__);
989 return mmc_ret;
990 }
991
992 /* 6. Enable SDR104 mode in controller */
993 /* Save the timing value, before changing the clock */
994 MMC_SAVE_TIMING(host, MMC_HS400_TIMING);
995 sdhci_set_uhs_mode(host, SDHCI_SDR104_MODE);
996
997 /* 7. Execute Tuning for hs400 mode */
998 if ((mmc_ret = sdhci_msm_execute_tuning(host, width)))
999 dprintf(CRITICAL, "Tuning for hs400 failed\n");
1000
1001 return mmc_ret;
1002}
1003
1004/*
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001005 * Function: mmc_host_init
1006 * Arg : mmc device structure
1007 * Return : 0 on success, 1 on Failure
1008 * Flow : Initialize the host contoller
1009 * Set the clock rate to 400 KHZ for init
1010 */
1011static uint8_t mmc_host_init(struct mmc_device *dev)
1012{
1013 uint8_t mmc_ret = 0;
1014
1015 struct sdhci_host *host;
1016 struct mmc_config_data *cfg;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001017 struct sdhci_msm_data *data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001018
1019 event_t sdhc_event;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001020
1021 host = &dev->host;
1022 cfg = &dev->config;
1023
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001024 event_init(&sdhc_event, false, EVENT_FLAG_AUTOUNSIGNAL);
1025
1026 host->base = cfg->sdhc_base;
1027 host->sdhc_event = &sdhc_event;
1028
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001029 data = (struct sdhci_msm_data *) malloc(sizeof(struct sdhci_msm_data));
1030 ASSERT(data);
1031
1032 data->sdhc_event = &sdhc_event;
1033 data->pwrctl_base = cfg->pwrctl_base;
1034 data->pwr_irq = cfg->pwr_irq;
1035 data->slot = cfg->slot;
1036
1037 host->msm_host = data;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001038
Channagoud Kadabi4b2f9672013-08-08 17:44:03 -07001039 /* Initialize any clocks needed for SDC controller */
1040 clock_init_mmc(cfg->slot);
1041
1042 clock_config_mmc(cfg->slot, cfg->max_clk_rate);
1043
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001044 /*
1045 * MSM specific sdhc init
1046 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001047 sdhci_msm_init(host, data);
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001048
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001049 /*
1050 * Initialize the controller, read the host capabilities
1051 * set power on mode
1052 */
1053 sdhci_init(host);
1054
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001055 /* Setup initial freq to 400KHz */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001056 mmc_ret = sdhci_clk_supply(host, SDHCI_CLK_400KHZ);
1057
1058 return mmc_ret;
1059}
1060
1061/*
1062 * Function: mmc identify card
1063 * Arg : host & card structure
1064 * Return : 0 on Success, 1 on Failure
1065 * Flow : Performs card identification process:
1066 * 1. Get card's unique identification number (CID)
1067 * 2. Get(for sd)/set (for mmc) relative card address (RCA)
1068 * 3. Select the card to put it in TRAN state
1069 */
1070static uint32_t mmc_identify_card(struct sdhci_host *host, struct mmc_card *card)
1071{
1072 uint32_t mmc_return = 0;
1073 uint32_t raw_csd[4];
1074
1075 /* Ask card to send its unique card identification (CID) number (CMD2) */
1076 mmc_return = mmc_all_send_cid(host, card);
1077 if (mmc_return) {
1078 dprintf(CRITICAL,"Failure getting card's CID number!\n");
1079 return mmc_return;
1080 }
1081
1082 /* Ask card to send a relative card address (RCA) (CMD3) */
1083 mmc_return = mmc_send_relative_address(host, card);
1084 if (mmc_return) {
1085 dprintf(CRITICAL, "Failure getting card's RCA!\n");
1086 return mmc_return;
1087 }
1088
1089 /* Get card's CSD register (CMD9) */
1090 mmc_return = mmc_send_csd(host, card);
1091 if (mmc_return) {
1092 dprintf(CRITICAL,"Failure getting card's CSD information!\n");
1093 return mmc_return;
1094 }
1095
1096 /* Select the card (CMD7) */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001097 mmc_return = mmc_select_card(host, card);
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001098 if (mmc_return) {
1099 dprintf(CRITICAL, "Failure selecting the Card with RCA: %x\n",card->rca);
1100 return mmc_return;
1101 }
1102
1103 /* Set the card status as active */
1104 card->status = MMC_STATUS_ACTIVE;
1105
1106 return 0;
1107}
1108
1109/*
1110 * Function: mmc_reset_card_and_send_op
1111 * Arg : Host & Card structure
1112 * Return : 0 on Success, 1 on Failure
1113 * Flow : Routine to initialize MMC card. It resets a card to idle state,
1114 * verify operating voltage and set the card in ready state.
1115 */
1116static uint32_t mmc_reset_card_and_send_op(struct sdhci_host *host, struct mmc_card *card)
1117{
1118 uint32_t mmc_return = 0;
1119
1120 /* 1. Card Reset - CMD0 */
1121 mmc_return = mmc_reset_card(host);
1122 if (mmc_return) {
1123 dprintf(CRITICAL, "Failure resetting MMC cards!\n");
1124 return mmc_return;
1125 }
1126
1127 /* 2. Card Initialization process */
1128
1129 /*
1130 * Send CMD1 to identify and reject cards that do not match host's VDD range
1131 * profile. Cards sends its OCR register in response.
1132 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001133
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001134 mmc_return = mmc_send_op_cond(host, card);
1135
1136 /* OCR is not received, init could not complete */
1137 if (mmc_return) {
1138 dprintf(CRITICAL, "Failure getting OCR response from MMC Card\n");
1139 return mmc_return;
1140 }
1141
1142 return 0;
1143}
1144
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001145static uint32_t mmc_send_app_cmd(struct sdhci_host *host, struct mmc_card *card)
1146{
1147 struct mmc_command cmd = {0};
1148
1149 cmd.cmd_index = CMD55_APP_CMD;
1150 cmd.argument = (card->rca << 16);
1151 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1152 cmd.resp_type = SDHCI_CMD_RESP_R1;
1153
1154 if (sdhci_send_command(host, &cmd))
1155 {
1156 dprintf(CRITICAL, "Failed Sending CMD55\n");
1157 return 1;
1158 }
1159 return 0;
1160}
1161
1162uint32_t mmc_sd_card_init(struct sdhci_host *host, struct mmc_card *card)
1163{
1164 uint8_t i;
1165 uint32_t mmc_ret;
1166 struct mmc_command cmd;
1167
1168 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1169
1170 /* Use the SD card RCA 0x0 during init */
1171 card->rca = SD_CARD_RCA;
1172
1173 /* Send CMD8 for voltage check*/
1174 for (i = 0 ;i < SD_CMD8_MAX_RETRY; i++)
1175 {
1176 cmd.cmd_index = CMD8_SEND_IF_COND;
1177 cmd.argument = MMC_SD_HC_VOLT_SUPPLIED;
1178 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1179 cmd.resp_type = SDHCI_CMD_RESP_R7;
1180
1181 if (sdhci_send_command(host, &cmd))
1182 {
1183 dprintf(CRITICAL, "The response for CMD8 does not match the supplied value\n");
1184 return 1;
1185 }
1186 else
1187 {
1188 /* If the command response echos the voltage back */
1189 if (cmd.resp[0] == MMC_SD_HC_VOLT_SUPPLIED)
1190 break;
1191 }
1192 /* As per SDCC the spec try for max three times with
1193 * 1 ms delay
1194 */
1195 mdelay(1);
1196 }
1197
1198 if (i == SD_CMD8_MAX_RETRY && (cmd.resp[0] != MMC_SD_HC_VOLT_SUPPLIED))
1199 {
1200 dprintf(CRITICAL, "Error: CMD8 response timed out\n");
1201 return 1;
1202 }
1203
1204 /* Send ACMD41 for OCR */
1205 for (i = 0; i < SD_ACMD41_MAX_RETRY; i++)
1206 {
1207 /* Send APP_CMD before ACMD41*/
1208 if (mmc_send_app_cmd(host, card))
1209 {
1210 dprintf(CRITICAL, "Failed sending App command\n");
1211 return 1;
1212 }
1213
1214 /* APP_CMD is successful, send ACMD41 now */
1215 cmd.cmd_index = ACMD41_SEND_OP_COND;
1216 cmd.argument = MMC_SD_OCR | MMC_SD_HC_HCS;
1217 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1218 cmd.resp_type = SDHCI_CMD_RESP_R3;
1219
1220 if (sdhci_send_command(host, &cmd))
1221 {
1222 dprintf(CRITICAL, "Failure sending ACMD41\n");
1223 return 1;
1224 }
1225 else
1226 {
1227 if (cmd.resp[0] & MMC_SD_DEV_READY)
1228 {
1229 if (cmd.resp[0] & (1 << 30))
1230 card->type = MMC_CARD_TYPE_SDHC;
1231 else
1232 card->type = MMC_CARD_TYPE_STD_SD;
1233
1234 break;
1235 }
1236 }
1237 /*
1238 * As per SDCC spec try for max 1 second
1239 */
1240 mdelay(50);
1241 }
1242
1243 if (i == SD_ACMD41_MAX_RETRY && !(cmd.resp[0] & MMC_SD_DEV_READY))
1244 {
1245 dprintf(CRITICAL, "Error: ACMD41 response timed out\n");
1246 return 1;
1247 }
1248
1249 return 0;
1250}
1251
1252/*
1253 * Function to read SD card information from SD status
1254 */
1255static uint32_t mmc_sd_get_card_ssr(struct sdhci_host *host, struct mmc_card *card)
1256{
1257 BUF_DMA_ALIGN(raw_sd_status, 64);
1258 struct mmc_command cmd = {0};
1259 uint32_t sd_status[16];
1260 uint32_t *status = sd_status;
1261 uint32_t au_size;
1262 int i;
1263 int j;
1264
1265 if (mmc_send_app_cmd(host, card))
1266 {
1267 dprintf(CRITICAL, "Failed sending App command\n");
1268 return 1;
1269 }
1270
1271 cmd.cmd_index = ACMD13_SEND_SD_STATUS;
1272 cmd.argument = 0x0;
1273 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1274 cmd.resp_type = SDHCI_CMD_RESP_R2;
1275 cmd.trans_mode = SDHCI_MMC_READ;
1276 cmd.data_present = 0x1;
1277 cmd.data.data_ptr = raw_sd_status;
1278 cmd.data.num_blocks = 0x1;
1279 cmd.data.blk_sz = 0x40;
1280
1281 /* send command */
1282 if (sdhci_send_command(host, &cmd))
1283 return 1;
1284
1285 memcpy(sd_status, raw_sd_status, sizeof(sd_status));
1286
1287 for (i = 15, j = 0; i >=0 ; i--, j++)
1288 sd_status[i] = swap_endian32(sd_status[j]);
1289
1290 au_size = UNPACK_BITS(status, MMC_SD_AU_SIZE_BIT, MMC_SD_AU_SIZE_LEN, 32);
1291 /* Card AU size in sectors */
1292 card->ssr.au_size = 1 << (au_size + 4);
1293 card->ssr.num_aus = UNPACK_BITS(status, MMC_SD_ERASE_SIZE_BIT, MMC_SD_ERASE_SIZE_LEN, 32);
1294
1295 return 0;
1296}
1297
1298/*
1299 * Function to read the SD CARD configuration register
1300 */
1301static uint32_t mmc_sd_get_card_scr(struct sdhci_host *host, struct mmc_card *card)
1302{
1303 BUF_DMA_ALIGN(scr_resp, 8);
1304 struct mmc_command cmd = {0};
1305 uint32_t raw_scr[2];
1306
1307 /* Now read the SCR register */
1308 /* Send APP_CMD before ACMD51*/
1309 if (mmc_send_app_cmd(host, card))
1310 {
1311 dprintf(CRITICAL, "Failed sending App command\n");
1312 return 1;
1313 }
1314
1315 cmd.cmd_index = ACMD51_READ_CARD_SCR;
1316 cmd.argument = 0x0;
1317 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1318 cmd.resp_type = SDHCI_CMD_RESP_R1;
1319 cmd.trans_mode = SDHCI_MMC_READ;
1320 cmd.data_present = 0x1;
1321 cmd.data.data_ptr = scr_resp;
1322 cmd.data.num_blocks = 0x1;
1323 cmd.data.blk_sz = 0x8;
1324
1325 /* send command */
1326 if (sdhci_send_command(host, &cmd))
1327 return 1;
1328
1329 memcpy(raw_scr, scr_resp, sizeof(raw_scr));
1330
1331 card->raw_scr[0] = swap_endian32(raw_scr[0]);
1332 card->raw_scr[1] = swap_endian32(raw_scr[1]);
1333
1334 /*
1335 * Parse & Populate the SCR data as per sdcc spec
1336 */
1337 card->scr.bus_widths = (card->raw_scr[0] & SD_SCR_BUS_WIDTH_MASK) >> SD_SCR_BUS_WIDTH;
1338 card->scr.cmd23_support = (card->raw_scr[0] & SD_SCR_CMD23_SUPPORT);
1339 card->scr.sd_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC_MASK) >> SD_SCR_SD_SPEC;
1340 card->scr.sd3_spec = (card->raw_scr[0] & SD_SCR_SD_SPEC3_MASK) >> SD_SCR_SD_SPEC3;
1341
1342 return 0;
1343}
1344
1345/*
1346 * Function: mmc_set_sd_bus_width
1347 * Arg : host, device structure & width
1348 * Return : 0 on Success, 1 on Failure
1349 * Flow : Set the bus width for the card
1350 */
1351uint32_t mmc_sd_set_bus_width(struct sdhci_host *host, struct mmc_card *card, uint8_t width)
1352{
1353 struct mmc_command cmd = {0};
1354
1355 /* Send APP_CMD before ACMD6*/
1356 if (mmc_send_app_cmd(host, card))
1357 {
1358 dprintf(CRITICAL, "Failed sending App command\n");
1359 return 1;
1360 }
1361
1362 cmd.cmd_index = ACMD6_SET_BUS_WIDTH;
1363 cmd.argument = (width == DATA_BUS_WIDTH_4BIT) ? (1<<1) : 0;
1364 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1365 cmd.resp_type = SDHCI_CMD_RESP_R1;
1366
1367 /* send command */
1368 if (sdhci_send_command(host, &cmd))
1369 return 1;
1370
1371 return 0;
1372}
1373
1374uint32_t mmc_sd_set_hs(struct sdhci_host *host, struct mmc_card *card)
1375{
1376 struct mmc_command cmd = {0};
1377 BUF_DMA_ALIGN(switch_resp, 64);
1378
1379 cmd.cmd_index = CMD6_SWITCH_FUNC;
1380 cmd.argument = MMC_SD_SWITCH_HS;
1381 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1382 cmd.resp_type = SDHCI_CMD_RESP_R1;
1383 cmd.trans_mode = SDHCI_MMC_READ;
1384 cmd.data_present = 0x1;
1385 cmd.data.data_ptr = switch_resp;
1386 cmd.data.num_blocks = 0x1;
1387 cmd.data.blk_sz = 0x40;
1388
1389 /* send command */
1390 if (sdhci_send_command(host, &cmd))
1391 return 1;
1392
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001393 /* Set the SDR25 mode in controller*/
1394 sdhci_set_uhs_mode(host, SDHCI_SDR25_MODE);
1395
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001396 return 0;
1397}
1398
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001399/*
1400 * Function: mmc_init_card
1401 * Arg : mmc device structure
1402 * Return : 0 on Success, 1 on Failure
1403 * Flow : Performs initialization and identification of eMMC cards connected
1404 * to the host.
1405 */
1406
1407static uint32_t mmc_card_init(struct mmc_device *dev)
1408{
1409 uint32_t mmc_return = 0;
1410 uint32_t status;
1411 uint8_t bus_width = 0;
1412
1413 struct sdhci_host *host;
1414 struct mmc_card *card;
1415 struct mmc_config_data *cfg;
1416
1417 host = &dev->host;
1418 card = &dev->card;
1419 cfg = &dev->config;
1420
1421 /* Initialize MMC card structure */
1422 card->status = MMC_STATUS_INACTIVE;
1423
1424 /* TODO: Get the OCR params from target */
1425 card->ocr = MMC_OCR_27_36 | MMC_OCR_SEC_MODE;
1426
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001427 /* Initialize the internal MMC */
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001428 mmc_return = mmc_reset_card_and_send_op(host, card);
1429 if (mmc_return)
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001430 {
1431 dprintf(CRITICAL, "MMC card failed to respond, try for SD card\n");
1432 /* Reset the card & get the OCR */
1433 mmc_return = mmc_sd_card_init(host, card);
1434 if (mmc_return)
1435 {
1436 dprintf(CRITICAL, "Failed to initialize SD card\n");
1437 return mmc_return;
1438 }
1439 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001440
1441 /* Identify (CMD2, CMD3 & CMD9) and select the card (CMD7) */
1442 mmc_return = mmc_identify_card(host, card);
1443 if (mmc_return)
1444 return mmc_return;
1445
1446 /* set interface speed */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001447 if (MMC_CARD_SD(card))
1448 {
1449 mmc_return = mmc_sd_set_hs(host, card);
1450 if (mmc_return)
1451 {
1452 dprintf(CRITICAL, "Failed to set HS for SD card\n");
1453 return mmc_return;
1454 }
1455 }
1456 else
1457 {
1458 mmc_return = mmc_set_hs_interface(host, card);
1459 if (mmc_return) {
1460 dprintf(CRITICAL, "Error adjusting interface speed!\n");
1461 return mmc_return;
1462 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001463 }
1464
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001465 /* Now get the extended CSD for the card */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001466 if (MMC_CARD_MMC(card))
1467 {
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001468 /* For MMC cards, also get the extended csd */
1469 mmc_return = mmc_get_ext_csd(host, card);
1470
1471 if (mmc_return) {
1472 dprintf(CRITICAL, "Failure getting card's ExtCSD information!\n");
1473 return mmc_return;
1474 }
1475 }
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001476 else
1477 {
1478 /*Read SCR for sd card */
1479 if (mmc_sd_get_card_scr(host, card))
1480 {
1481 dprintf(CRITICAL, "Failure getting card's SCR register\n");
1482 return 1;
1483 }
1484 /* Read SSR for the SD card */
1485 if (mmc_sd_get_card_ssr(host, card))
1486 {
1487 dprintf(CRITICAL, "Failed to get SSR from the card\n");
1488 return 1;
1489 }
1490 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001491
1492 /* Decode and save the CSD register */
1493 mmc_return = mmc_decode_and_save_csd(card);
1494 if (mmc_return) {
1495 dprintf(CRITICAL, "Failure decoding card's CSD information!\n");
1496 return mmc_return;
1497 }
1498
1499
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001500 if (MMC_CARD_MMC(card))
1501 {
1502 /* Set the bus width based on host, target capbilities */
1503 if (cfg->bus_width == DATA_BUS_WIDTH_8BIT && host->caps.bus_width_8bit)
1504 bus_width = DATA_BUS_WIDTH_8BIT;
1505 /*
1506 * Host contoller by default supports 4 bit & 1 bit mode.
1507 * No need to check for host support here
1508 */
1509 else if (cfg->bus_width == DATA_BUS_WIDTH_4BIT)
1510 bus_width = DATA_BUS_WIDTH_4BIT;
1511 else
1512 bus_width = DATA_BUS_WIDTH_1BIT;
1513
1514 /* Set 4/8 bit SDR bus width in controller */
1515 mmc_return = sdhci_set_bus_width(host, bus_width);
1516
1517 if (mmc_return) {
1518 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
1519 return 1;
1520 }
1521
1522 /* Enable high speed mode in the follwing order:
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001523 * 1. HS400 mode if supported by host & card
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001524 * 1. HS200 mode if supported by host & card
1525 * 2. DDR mode host, if supported by host & card
1526 * 3. Use normal speed mode with supported bus width
1527 */
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001528 if (mmc_card_supports_hs400_mode(card) && host->caps.sdr104_support)
1529 {
1530 mmc_return = mmc_set_hs400_mode(host, card, bus_width);
1531 if (mmc_return)
1532 {
1533 dprintf(CRITICAL, "Failure to set HS400 mode for Card(RCA:%x)\n",
1534 card->rca);
1535 return mmc_return;
1536 }
1537 }
1538 else if (mmc_card_supports_hs200_mode(card) && host->caps.sdr104_support)
1539 {
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001540 mmc_return = mmc_set_hs200_mode(host, card, bus_width);
1541
1542 if (mmc_return) {
1543 dprintf(CRITICAL, "Failure to set HS200 mode for Card(RCA:%x)\n",
1544 card->rca);
1545 return mmc_return;
1546 }
1547 } else if (mmc_card_supports_ddr_mode(card) && host->caps.ddr_support) {
1548 mmc_return = mmc_set_ddr_mode(host, card);
1549
1550 if (mmc_return) {
1551 dprintf(CRITICAL, "Failure to set DDR mode for Card(RCA:%x)\n",
1552 card->rca);
1553 return mmc_return;
1554 }
1555 } else {
1556 /* Set 4/8 bit bus width for the card */
1557 mmc_return = mmc_set_bus_width(host, card, bus_width);
1558 if (mmc_return) {
1559 dprintf(CRITICAL, "Failure to set wide bus for Card(RCA:%x)\n",
1560 card->rca);
1561 return mmc_return;
1562 }
1563 }
1564 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001565 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001566 {
1567 /* Check the supported bus width for the card from SCR register */
1568 if (card->scr.bus_widths & SD_SCR_WIDTH_4BIT)
1569 bus_width = DATA_BUS_WIDTH_4BIT;
1570 else
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001571 bus_width = DATA_BUS_WIDTH_1BIT;
1572
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001573 mmc_return = mmc_sd_set_bus_width(host, card, bus_width);
1574 if (mmc_return)
1575 {
1576 dprintf(CRITICAL, "Failed to set bus width for the card\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001577 return mmc_return;
1578 }
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001579
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001580 /* Set bit SDR bus width in controller */
1581 mmc_return = sdhci_set_bus_width(host, bus_width);
1582 if (mmc_return)
1583 {
1584 dprintf(CRITICAL, "Failed to set bus width for host controller\n");
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001585 return mmc_return;
1586 }
1587 }
1588
1589
1590 /* Verify TRAN state after changing speed and bus width */
1591 mmc_return = mmc_get_card_status(host, card, &status);
1592 if (mmc_return)
1593 return mmc_return;
1594
1595 if (MMC_CARD_STATUS(status) != MMC_TRAN_STATE)
1596 mmc_return = 1;
1597
Channagoud Kadabi96c629e2013-09-10 14:21:30 -07001598 card->block_size = MMC_BLK_SZ;
1599
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001600 return mmc_return;
1601}
1602
1603/*
1604 * Function: mmc display csd
1605 * Arg : None
1606 * Return : None
1607 * Flow : Displays the csd information
1608 */
1609static void mmc_display_csd(struct mmc_card *card)
1610{
1611 dprintf(SPEW, "erase_grpsize: %d\n", card->csd.erase_grp_size);
1612 dprintf(SPEW, "erase_grpmult: %d\n", card->csd.erase_grp_mult);
1613 dprintf(SPEW, "wp_grpsize: %d\n", card->csd.wp_grp_size);
1614 dprintf(SPEW, "wp_grpen: %d\n", card->csd.wp_grp_enable);
1615 dprintf(SPEW, "perm_wp: %d\n", card->csd.perm_wp);
1616 dprintf(SPEW, "temp_wp: %d\n", card->csd.temp_wp);
1617}
1618
1619/*
1620 * Function: mmc_init
1621 * Arg : MMC configuration data
1622 * Return : Pointer to mmc device
1623 * Flow : Entry point to MMC boot process
1624 * Initialize the sd host controller
1625 * Initialize the mmc card
1626 * Set the clock & high speed mode
1627 */
1628struct mmc_device *mmc_init(struct mmc_config_data *data)
1629{
1630 uint8_t mmc_ret = 0;
1631 struct mmc_device *dev;
1632
1633 dev = (struct mmc_device *) malloc (sizeof(struct mmc_device));
1634
1635 if (!dev) {
1636 dprintf(CRITICAL, "Error allocating mmc device\n");
1637 return NULL;
1638 }
1639
1640 ASSERT(data);
1641
1642 memcpy((void*)&dev->config, (void*)data, sizeof(struct mmc_config_data));
1643
1644 memset((struct mmc_card *)&dev->card, 0, sizeof(struct mmc_card));
1645
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001646 /* Initialize the host & clock */
1647 dprintf(SPEW, " Initializing MMC host data structure and clock!\n");
1648
1649 mmc_ret = mmc_host_init(dev);
1650 if (mmc_ret) {
1651 dprintf(CRITICAL, "Error Initializing MMC host : %u\n", mmc_ret);
1652 return NULL;
1653 }
1654
1655 /* Initialize and identify cards connected to host */
1656 mmc_ret = mmc_card_init(dev);
1657 if (mmc_ret) {
1658 dprintf(CRITICAL, "Failed detecting MMC/SDC @ slot%d\n",
1659 dev->config.slot);
1660 return NULL;
1661 }
1662
1663 dprintf(INFO, "Done initialization of the card\n");
1664
1665 mmc_display_csd(&dev->card);
1666
1667 return dev;
1668}
1669
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001670static uint32_t mmc_parse_response(uint32_t resp)
1671{
1672 /* Trying to write beyond card capacity */
1673 if (resp & MMC_R1_ADDR_OUT_OF_RANGE) {
1674 dprintf(CRITICAL, "Attempting to read or write beyond the Device capacity\n");
1675 return 1;
1676 }
1677
1678 /* Misaligned address not matching block length */
1679 if (resp & MMC_R1_ADDR_ERR) {
1680 dprintf(CRITICAL, "The misaligned address did not match the block length used\n");
1681 return 1;
1682 }
1683
1684 /* Invalid block length */
1685 if (resp & MMC_R1_BLOCK_LEN_ERR) {
1686 dprintf(CRITICAL, "The transferred bytes does not match the block length\n");
1687 return 1;
1688 }
1689
1690 /* Tried to program write protected block */
1691 if (resp & MMC_R1_WP_VIOLATION) {
1692 dprintf(CRITICAL, "Attempt to program a write protected block\n");
1693 return 1;
1694 }
1695
1696 /* card controller error */
1697 if (resp & MMC_R1_CC_ERROR) {
1698 dprintf(CRITICAL, "Device error occurred, which is not related to the host command\n");
1699 return 1;
1700 }
1701
1702 /* Generic error */
1703 if (resp & MMC_R1_GENERIC_ERR) {
1704 dprintf(CRITICAL, "A generic Device error\n");
1705 return 1;
1706 }
1707
1708 /* Finally check for card in TRAN state */
1709 if (MMC_CARD_STATUS(resp) != MMC_TRAN_STATE) {
1710 dprintf(CRITICAL, "MMC card is not in TRAN state\n");
1711 return 1;
1712 }
1713
1714 return 0;
1715}
1716
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001717/*
1718 * Function: mmc sdhci read
1719 * Arg : mmc device structure, block address, number of blocks & destination
1720 * Return : 0 on Success, non zero on success
1721 * Flow : Fill in the command structure & send the command
1722 */
1723uint32_t mmc_sdhci_read(struct mmc_device *dev, void *dest,
1724 uint64_t blk_addr, uint32_t num_blocks)
1725{
1726 uint32_t mmc_ret = 0;
1727 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001728 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001729
1730 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1731
1732 /* CMD17/18 Format:
1733 * [31:0] Data Address
1734 */
1735 if (num_blocks == 1)
1736 cmd.cmd_index = CMD17_READ_SINGLE_BLOCK;
1737 else
1738 cmd.cmd_index = CMD18_READ_MULTIPLE_BLOCK;
1739
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001740 /*
1741 * Standard emmc cards use byte mode addressing
1742 * convert the block address to byte address before
1743 * sending the command
1744 */
1745 if (card->type == MMC_TYPE_STD_MMC)
1746 cmd.argument = blk_addr * card->block_size;
1747 else
1748 cmd.argument = blk_addr;
1749
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001750 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1751 cmd.resp_type = SDHCI_CMD_RESP_R1;
1752 cmd.trans_mode = SDHCI_MMC_READ;
1753 cmd.data_present = 0x1;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001754
1755 /* Use CMD23 If card supports CMD23:
1756 * For SD card use the value read from SCR register
1757 * For emmc by default use CMD23.
1758 * Also as per SDCC spec always use CMD23 to stop
1759 * multiblock read/write if UHS (Ultra High Speed) is
1760 * enabled
1761 */
1762 if (MMC_CARD_SD(card))
1763 cmd.cmd23_support = dev->card.scr.cmd23_support;
1764 else
1765 cmd.cmd23_support = 0x1;
1766
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001767 cmd.data.data_ptr = dest;
1768 cmd.data.num_blocks = num_blocks;
1769
1770 /* send command */
1771 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1772 if (mmc_ret) {
1773 return mmc_ret;
1774 }
1775
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001776 /* Response contains 32 bit Card status.
1777 * Parse the errors & provide relevant information */
1778 if ((mmc_ret = mmc_parse_response(cmd.resp[0])))
1779 {
1780 dprintf(CRITICAL,"MMC Read failed, found errors in card response: %s\t%d\n", __func__, __LINE__);
1781 return mmc_ret;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001782 }
1783
1784 return mmc_ret;
1785}
1786
1787/*
1788 * Function: mmc sdhci write
1789 * Arg : mmc device structure, block address, number of blocks & source
1790 * Return : 0 on Success, non zero on success
1791 * Flow : Fill in the command structure & send the command
1792 */
1793uint32_t mmc_sdhci_write(struct mmc_device *dev, void *src,
1794 uint64_t blk_addr, uint32_t num_blocks)
1795{
1796 uint32_t mmc_ret = 0;
1797 struct mmc_command cmd;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001798 struct mmc_card *card = &dev->card;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001799
1800 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1801
1802 /* CMD24/25 Format:
1803 * [31:0] Data Address
1804 */
1805
1806 if (num_blocks == 1)
1807 cmd.cmd_index = CMD24_WRITE_SINGLE_BLOCK;
1808 else
1809 cmd.cmd_index = CMD25_WRITE_MULTIPLE_BLOCK;
1810
Channagoud Kadabi7e72e632013-12-20 11:17:45 -08001811 /*
1812 * Standard emmc cards use byte mode addressing
1813 * convert the block address to byte address before
1814 * sending the command
1815 */
1816 if (card->type == MMC_TYPE_STD_MMC)
1817 cmd.argument = blk_addr * card->block_size;
1818 else
1819 cmd.argument = blk_addr;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001820 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1821 cmd.resp_type = SDHCI_CMD_RESP_R1;
1822 cmd.trans_mode = SDHCI_MMC_WRITE;
Channagoud Kadabi9b8f8fc2013-07-26 12:02:49 -07001823
1824 /* Use CMD23 If card supports CMD23:
1825 * For SD card use the value read from SCR register
1826 * For emmc by default use CMD23.
1827 * Also as per SDCC spec always use CMD23 to stop
1828 * multiblock read/write if UHS (Ultra High Speed) is
1829 * enabled
1830 */
1831 if (MMC_CARD_SD(card))
1832 cmd.cmd23_support = dev->card.scr.cmd23_support;
1833 else
1834 cmd.cmd23_support = 0x1;
1835
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001836 cmd.data_present = 0x1;
1837 cmd.data.data_ptr = src;
1838 cmd.data.num_blocks = num_blocks;
1839
1840 /* send command */
1841 mmc_ret = sdhci_send_command(&dev->host, &cmd);
1842 if (mmc_ret)
1843 return mmc_ret;
1844
Channagoud Kadabi14fd2052013-10-17 18:00:50 -07001845 /* Response contains 32 bit Card status.
1846 * Parse the errors & provide relevant information */
1847 if ((mmc_ret = mmc_parse_response(cmd.resp[0])))
1848 {
1849 dprintf(CRITICAL,"MMC Write failed, found errors in card response: %s\t%d\n", __func__, __LINE__);
1850 return mmc_ret;
Channagoud Kadabiec0f7f72013-03-11 15:21:36 -07001851 }
1852
1853 return mmc_ret;
1854}
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001855
1856/*
1857 * Send the erase group start address using CMD35
1858 */
1859static uint32_t mmc_send_erase_grp_start(struct mmc_device *dev, uint32_t erase_start)
1860{
1861 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001862 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001863
1864 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1865
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001866 if (MMC_CARD_MMC(card))
1867 cmd.cmd_index = CMD35_ERASE_GROUP_START;
1868 else
1869 cmd.cmd_index = CMD32_ERASE_WR_BLK_START;
1870
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001871 cmd.argument = erase_start;
1872 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1873 cmd.resp_type = SDHCI_CMD_RESP_R1;
1874
1875 /* send command */
1876 if (sdhci_send_command(&dev->host, &cmd))
1877 return 1;
1878
1879 /*
1880 * CMD35 on failure returns address out of range error
1881 */
1882 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
1883 {
1884 dprintf(CRITICAL, "Address for CMD35 is out of range\n");
1885 return 1;
1886 }
1887
1888 return 0;
1889}
1890
1891/*
1892 * Send the erase group end address using CMD36
1893 */
1894static uint32_t mmc_send_erase_grp_end(struct mmc_device *dev, uint32_t erase_end)
1895{
1896 struct mmc_command cmd;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001897 struct mmc_card *card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001898
1899 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1900
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001901 if (MMC_CARD_MMC(card))
1902 cmd.cmd_index = CMD36_ERASE_GROUP_END;
1903 else
1904 cmd.cmd_index = CMD33_ERASE_WR_BLK_END;
1905
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001906 cmd.argument = erase_end;
1907 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1908 cmd.resp_type = SDHCI_CMD_RESP_R1;
1909
1910 /* send command */
1911 if (sdhci_send_command(&dev->host, &cmd))
1912 return 1;
1913
1914 /*
1915 * CMD3 on failure returns address out of range error
1916 */
1917 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
1918 {
1919 dprintf(CRITICAL, "Address for CMD36 is out of range\n");
1920 return 1;
1921 }
1922
1923 return 0;
1924}
1925
1926/*
1927 * Send the erase CMD38, to erase the selected erase groups
1928 */
1929static uint32_t mmc_send_erase(struct mmc_device *dev)
1930{
1931 struct mmc_command cmd;
1932 uint32_t status;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07001933 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001934
1935 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
1936
1937 cmd.cmd_index = CMD38_ERASE;
1938 cmd.argument = 0x00000000;
1939 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
1940 cmd.resp_type = SDHCI_CMD_RESP_R1B;
1941
1942 /* send command */
1943 if (sdhci_send_command(&dev->host, &cmd))
1944 return 1;
1945
1946 do
1947 {
1948 if (mmc_get_card_status(&dev->host, &dev->card, &status))
1949 {
1950 dprintf(CRITICAL, "Failed to get card status after erase\n");
1951 return 1;
1952 }
1953 /* Check if the response of erase command has eras skip status set */
1954 if (status & MMC_R1_WP_ERASE_SKIP)
1955 dprintf(CRITICAL, "Write Protect set for the region, only partial space was erased\n");
1956
1957 retry++;
1958 udelay(1000);
1959 if (retry == MMC_MAX_CARD_STAT_RETRY)
1960 {
1961 dprintf(CRITICAL, "Card status check timed out after sending erase command\n");
1962 return 1;
1963 }
1964 } while(!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
1965
1966
1967 return 0;
1968}
1969
1970
1971/*
1972 * Function: mmc sdhci erase
1973 * Arg : mmc device structure, block address and length
1974 * Return : 0 on Success, non zero on failure
1975 * Flow : Fill in the command structure & send the command
1976 */
1977uint32_t mmc_sdhci_erase(struct mmc_device *dev, uint32_t blk_addr, uint64_t len)
1978{
1979 uint32_t erase_unit_sz = 0;
1980 uint32_t erase_start;
1981 uint32_t erase_end;
1982 uint32_t blk_end;
1983 uint32_t num_erase_grps;
1984 uint32_t *out;
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001985 struct mmc_card *card;
1986
1987
1988 card = &dev->card;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001989
1990 /*
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001991 * Calculate the erase unit size,
1992 * 1. Based on emmc 4.5 spec for emmc card
1993 * 2. Use SD Card Status info for SD cards
Channagoud Kadabi003171e2013-05-29 15:21:12 -07001994 */
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07001995 if (MMC_CARD_MMC(card))
1996 {
1997 /*
1998 * Calculate the erase unit size as per the emmc specification v4.5
1999 */
2000 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2001 erase_unit_sz = (MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE]) / MMC_BLK_SZ;
2002 else
2003 erase_unit_sz = (dev->card.csd.erase_grp_size + 1) * (dev->card.csd.erase_grp_mult + 1);
2004 }
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002005 else
Channagoud Kadabi4d13b2c2013-06-18 12:43:29 -07002006 erase_unit_sz = dev->card.ssr.au_size * dev->card.ssr.num_aus;
2007
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002008
2009 /* Convert length in blocks */
2010 len = len / MMC_BLK_SZ;
2011
2012 if (len < erase_unit_sz)
2013 {
2014 dprintf(CRITICAL, "Requested length is less than min erase group size\n");
2015 return 1;
2016 }
2017
2018 /* Calculate erase groups based on the length in blocks */
2019 num_erase_grps = len / erase_unit_sz;
2020
2021 /* Start address of the erase range */
2022 erase_start = blk_addr;
2023
2024 /* Last address of the erase range */
2025 erase_end = blk_addr + ((num_erase_grps - 1) * erase_unit_sz);
2026
2027 /* Boundary check for overlap */
2028 blk_end = blk_addr + len;
2029
2030 if (erase_end > blk_end)
2031 {
2032 dprintf(CRITICAL, "The erase group overlaps the max requested for erase\n");
2033 erase_end -= erase_unit_sz;
2034 }
2035
2036 /* Send CMD35 for erase group start */
2037 if (mmc_send_erase_grp_start(dev, erase_start))
2038 {
2039 dprintf(CRITICAL, "Failed to send erase grp start address\n");
2040 return 1;
2041 }
2042
2043 /* Send CMD36 for erase group end */
2044 if (mmc_send_erase_grp_end(dev, erase_end))
2045 {
2046 dprintf(CRITICAL, "Failed to send erase grp end address\n");
2047 return 1;
2048 }
2049
2050 /* Send CMD38 to perform erase */
2051 if (mmc_send_erase(dev))
2052 {
2053 dprintf(CRITICAL, "Failed to erase the specified partition\n");
2054 return 1;
2055 }
2056 return 0;
2057}
2058
2059/*
2060 * Function: mmc get wp status
2061 * Arg : mmc device structure, block address and buffer for getting wp status
2062 * Return : 0 on Success, 1 on Failure
2063 * Flow : Get the WP group status by sending CMD31
2064 */
2065uint32_t mmc_get_wp_status(struct mmc_device *dev, uint32_t addr, uint8_t *wp_status)
2066{
2067 struct mmc_command cmd;
2068
2069 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2070
2071 cmd.cmd_index = CMD31_SEND_WRITE_PROT_TYPE;
2072 cmd.argument = addr;
2073 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2074 cmd.resp_type = SDHCI_CMD_RESP_R1;
2075 cmd.trans_mode = SDHCI_MMC_READ;
2076 cmd.data_present = 0x1;
2077 cmd.data.data_ptr = wp_status;
2078 cmd.data.num_blocks = 0x1;
2079 cmd.data.blk_sz = 0x8;
2080
2081 if (sdhci_send_command(&dev->host, &cmd))
2082 {
2083 dprintf(CRITICAL, "Failed to get status of write protect bits\n");
2084 return 1;
2085 }
2086
2087 return 0;
2088}
2089
2090/*
2091 * Function: mmc set/clear WP on user area
2092 * Arg : mmc device structure, block address,len, & flag to set or clear
2093 * Return : 0 on success, 1 on failure
2094 * Flow : Function to set/clear power on write protect on user area
2095 */
2096
2097uint32_t mmc_set_clr_power_on_wp_user(struct mmc_device *dev, uint32_t addr, uint64_t len, uint8_t set_clr)
2098{
2099 struct mmc_command cmd;
2100 uint32_t wp_grp_size;
2101 uint32_t status;
2102 uint32_t num_wp_grps;
2103 uint32_t ret;
Channagoud Kadabi6d1751b2013-07-05 13:03:52 -07002104 uint32_t retry = 0;
Channagoud Kadabi003171e2013-05-29 15:21:12 -07002105 uint32_t i;
2106
2107 memset((struct mmc_command *)&cmd, 0, sizeof(struct mmc_command));
2108
2109 /* Convert len into blocks */
2110 len = len / MMC_BLK_SZ;
2111
2112 /* Disable PERM WP */
2113 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PERM_WP_DIS);
2114
2115 if (ret)
2116 {
2117 dprintf(CRITICAL, "Failed to Disable PERM WP\n");
2118 return ret;
2119 }
2120
2121 /* Read the default values for user WP */
2122 ret = mmc_get_ext_csd(&dev->host, &dev->card);
2123
2124 if (ret)
2125 {
2126 dprintf(CRITICAL, "Failed to read ext csd for the card\n");
2127 return ret;
2128 }
2129
2130 /* Check if user power on WP is disabled or perm WP is enabled */
2131 if ((dev->card.ext_csd[MMC_USR_WP] & MMC_US_PWR_WP_DIS)
2132 || (dev->card.ext_csd[MMC_USR_WP] & MMC_US_PERM_WP_EN))
2133 {
2134 dprintf(CRITICAL, "Power on protection is disabled, cannot be set\n");
2135 return 1;
2136 }
2137
2138 /* Calculate the wp grp size */
2139 if (dev->card.ext_csd[MMC_ERASE_GRP_DEF])
2140 wp_grp_size = MMC_HC_ERASE_MULT * dev->card.ext_csd[MMC_HC_ERASE_GRP_SIZE] / MMC_BLK_SZ;
2141 else
2142 wp_grp_size = (dev->card.csd.wp_grp_size + 1) * (dev->card.csd.erase_grp_size + 1) \
2143 * (dev->card.csd.erase_grp_mult + 1);
2144
2145
2146 if (len < wp_grp_size)
2147 {
2148 dprintf(CRITICAL, "Length is less than min WP size, WP was not set\n");
2149 return 1;
2150 }
2151
2152 /* Set power on USER WP */
2153 ret = mmc_switch_cmd(&dev->host, &dev->card, MMC_SET_BIT, MMC_USR_WP, MMC_US_PWR_WP_EN);
2154
2155 if (ret)
2156 {
2157 dprintf(CRITICAL, "Failed to set power on WP for user\n");
2158 return ret;
2159 }
2160
2161 num_wp_grps = ROUNDUP(len, wp_grp_size) / wp_grp_size;
2162
2163 if (set_clr)
2164 cmd.cmd_index = CMD28_SET_WRITE_PROTECT;
2165 else
2166 cmd.cmd_index = CMD29_CLEAR_WRITE_PROTECT;
2167
2168 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2169 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2170
2171 for(i = 0; i < num_wp_grps; i++)
2172 {
2173 cmd.argument = addr + (i * wp_grp_size);
2174
2175 if (sdhci_send_command(&dev->host, &cmd))
2176 return 1;
2177
2178 /* CMD28/CMD29 On failure returns address out of range error */
2179 if (MMC_ADDR_OUT_OF_RANGE(cmd.resp[0]))
2180 {
2181 dprintf(CRITICAL, "Address for CMD28/29 is out of range\n");
2182 return 1;
2183 }
2184
2185 /* Check the card status */
2186 do
2187 {
2188 if (mmc_get_card_status(&dev->host, &dev->card, &status))
2189 {
2190 dprintf(CRITICAL, "Failed to get card status afterapplying write protect\n");
2191 return 1;
2192 }
2193
2194 /* Time out for WP command */
2195 retry++;
2196 udelay(1000);
2197 if (retry == MMC_MAX_CARD_STAT_RETRY)
2198 {
2199 dprintf(CRITICAL, "Card status timed out after sending write protect command\n");
2200 return 1;
2201 }
2202 } while (!(status & MMC_READY_FOR_DATA) || (MMC_CARD_STATUS(status) == MMC_PROG_STATE));
2203
2204 }
2205
2206 return 0;
2207}
Channagoud Kadabi9e3c3b92013-06-18 18:32:32 -07002208
2209/* Function to put the mmc card to sleep */
2210void mmc_put_card_to_sleep(struct mmc_device *dev)
2211{
2212 struct mmc_command cmd = {0};
2213 struct mmc_card *card = &dev->card;
2214
2215 cmd.cmd_index = CMD7_SELECT_DESELECT_CARD;
2216 cmd.argument = 0x00000000;
2217 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2218 cmd.resp_type = SDHCI_CMD_RESP_NONE;
2219
2220 /* send command */
2221 if(sdhci_send_command(&dev->host, &cmd))
2222 {
2223 dprintf(CRITICAL, "card deselect error: %s\n", __func__);
2224 return;
2225 }
2226
2227 cmd.cmd_index = CMD5_SLEEP_AWAKE;
2228 cmd.argument = (card->rca << MMC_CARD_RCA_BIT) | MMC_CARD_SLEEP;
2229 cmd.cmd_type = SDHCI_CMD_TYPE_NORMAL;
2230 cmd.resp_type = SDHCI_CMD_RESP_R1B;
2231
2232 /* send command */
2233 if(sdhci_send_command(&dev->host, &cmd))
2234 dprintf(CRITICAL, "card sleep error: %s\n", __func__);
2235}