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zhaochened3bdfb2018-02-06 19:09:17 +08001/* Copyright (c) 2014-2018 The Linux Foundation. All rights reserved.
Channagoud Kadabied60a8b2014-06-27 15:35:09 -07002 *
3 * Redistribution and use in source and binary forms, with or without
4 * modification, are permitted provided that the following conditions are
5 * met:
6 * * Redistributions of source code must retain the above copyright
7 * notice, this list of conditions and the following disclaimer.
8 * * Redistributions in binary form must reproduce the above
9 * copyright notice, this list of conditions and the following
10 * disclaimer in the documentation and/or other materials provided
11 * with the distribution.
12 * * Neither the name of The Linux Foundation nor the names of its
13 * contributors may be used to endorse or promote products derived
14 * from this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
Sridhar Parasuram568e7a62015-08-06 13:16:02 -070021 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, nit
22 * PROCUREMENT OF
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070023 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
24 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
26 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
27 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 */
29
30#include <debug.h>
31#include <platform/iomap.h>
32#include <platform/irqs.h>
33#include <platform/gpio.h>
34#include <reg.h>
35#include <target.h>
36#include <platform.h>
37#include <dload_util.h>
38#include <uart_dm.h>
39#include <mmc.h>
40#include <spmi.h>
41#include <board.h>
42#include <smem.h>
43#include <baseband.h>
Sridhar Parasuramd75ade52015-03-09 15:45:16 -070044#include <regulator.h>
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070045#include <dev/keys.h>
46#include <pm8x41.h>
Vijay Kumar Pendotie1fff022016-05-04 13:04:32 +053047#include <pm8x41_hw.h>
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070048#include <crypto5_wrapper.h>
49#include <clock.h>
50#include <partition_parser.h>
51#include <scm.h>
52#include <platform/clock.h>
53#include <platform/gpio.h>
54#include <platform/timer.h>
55#include <stdlib.h>
56#include <ufs.h>
57#include <boot_device.h>
58#include <qmp_phy.h>
Channagoud Kadabi7d308202014-12-22 12:07:04 -080059#include <sdhci_msm.h>
60#include <qusb2_phy.h>
Sridhar Parasuram568e7a62015-08-06 13:16:02 -070061#include <secapp_loader.h>
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -080062#include <rpmb.h>
Sridhar Parasuram9f28f672015-03-17 15:40:47 -070063#include <rpm-glink.h>
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -070064#if ENABLE_WBC
65#include <pm_app_smbchg.h>
66#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070067
c_wufengf433f232015-09-21 15:21:21 +080068#if LONG_PRESS_POWER_ON
69#include <shutdown_detect.h>
70#endif
71
c_wufeng196210d2015-09-21 12:49:43 +080072#if PON_VIB_SUPPORT
73#include <vibrator.h>
74#define VIBRATE_TIME 250
75#endif
c_wufengf433f232015-09-21 15:21:21 +080076
Channagoud Kadabi9b28c0b2016-01-11 18:42:33 -080077#include <pm_smbchg_usb_chgpth.h>
78
zhaochened3bdfb2018-02-06 19:09:17 +080079#if MOUNT_EMMC_LE
80 #define ROOTFS_EMMC_PATH " root=/dev/mmcblk0p"
81#else
82 #define ROOTFS_EMMC_PATH " root=/dev/mmcblock0p"
83#endif
84
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -080085#define CE_INSTANCE 1
Channagoud Kadabi7edb9b42015-08-11 23:45:31 -070086#define CE_EE 0
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -080087#define CE_FIFO_SIZE 64
88#define CE_READ_PIPE 3
89#define CE_WRITE_PIPE 2
90#define CE_READ_PIPE_LOCK_GRP 0
91#define CE_WRITE_PIPE_LOCK_GRP 0
92#define CE_ARRAY_SIZE 20
93
Channagoud Kadabied60a8b2014-06-27 15:35:09 -070094#define PMIC_ARB_CHANNEL_NUM 0
95#define PMIC_ARB_OWNER_ID 0
96
Vijay Kumar Pendotie1fff022016-05-04 13:04:32 +053097#define SMBCHG_USB_RT_STS 0x21310
98#define SMBCHG_DC_RT_STS 0x21410
99#define USBIN_UV_RT_STS BIT(0)
100#define USBIN_OV_RT_STS BIT(1)
101#define DCIN_UV_RT_STS BIT(0)
102#define DCIN_OV_RT_STS BIT(1)
103
Channagoud Kadabi4021fa92015-11-03 16:35:26 -0800104enum
105{
106 FUSION_I2S_MTP = 1,
107 FUSION_SLIMBUS = 2,
108} mtp_subtype;
109
110enum
111{
112 FUSION_I2S_CDP = 2,
113} cdp_subtype;
114
Tanya Finkel619fc2a2016-08-16 14:11:26 +0300115static uint8_t flash_memory_slot = 0;
116static void set_sdc_power_ctrl();
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700117static uint32_t mmc_pwrctl_base[] =
118 { MSM_SDC1_BASE, MSM_SDC2_BASE };
119
120static uint32_t mmc_sdhci_base[] =
121 { MSM_SDC1_SDHCI_BASE, MSM_SDC2_SDHCI_BASE };
122
123static uint32_t mmc_sdc_pwrctl_irq[] =
124 { SDCC1_PWRCTL_IRQ, SDCC2_PWRCTL_IRQ };
125
126struct mmc_device *dev;
127struct ufs_dev ufs_device;
128
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700129void target_early_init(void)
130{
131#if WITH_DEBUG_UART
Channagoud Kadabi35503c42014-11-14 16:22:43 -0800132 uart_dm_init(8, 0, BLSP2_UART1_BASE);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700133#endif
134}
135
136/* Return 1 if vol_up pressed */
Amit Blay6a3e88b2015-06-23 22:25:06 +0300137int target_volume_up()
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700138{
lijuang2d2b8a02015-06-05 21:34:15 +0800139 static uint8_t first_time = 0;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700140 uint8_t status = 0;
141 struct pm8x41_gpio gpio;
142
lijuang2d2b8a02015-06-05 21:34:15 +0800143 if (!first_time) {
144 /* Configure the GPIO */
145 gpio.direction = PM_GPIO_DIR_IN;
146 gpio.function = 0;
147 gpio.pull = PM_GPIO_PULL_UP_30;
148 gpio.vin_sel = 2;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700149
lijuang2d2b8a02015-06-05 21:34:15 +0800150 pm8x41_gpio_config(2, &gpio);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700151
lijuang2d2b8a02015-06-05 21:34:15 +0800152 /* Wait for the pmic gpio config to take effect */
153 udelay(10000);
154
155 first_time = 1;
156 }
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700157
158 /* Get status of P_GPIO_5 */
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800159 pm8x41_gpio_get(2, &status);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700160
161 return !status; /* active low */
162}
163
164/* Return 1 if vol_down pressed */
165uint32_t target_volume_down()
166{
167 return pm8x41_resin_status();
168}
169
170static void target_keystatus()
171{
172 keys_init();
173
174 if(target_volume_down())
175 keys_post_event(KEY_VOLUMEDOWN, 1);
176
177 if(target_volume_up())
178 keys_post_event(KEY_VOLUMEUP, 1);
179}
180
181void target_uninit(void)
182{
183 if (platform_boot_dev_isemmc())
184 {
185 mmc_put_card_to_sleep(dev);
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700186 }
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800187
Mayank Grover2995f502017-09-12 19:19:20 +0530188#if VERIFIED_BOOT
Mayank Grover77c17d32017-10-26 12:13:21 +0530189 if (target_get_vb_version() >= VB_M &&
Mayank Grover2995f502017-09-12 19:19:20 +0530190 is_sec_app_loaded())
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800191 {
Sridhar Parasuram568e7a62015-08-06 13:16:02 -0700192 if (send_milestone_call_to_tz() < 0)
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800193 {
194 dprintf(CRITICAL, "Failed to unload App for rpmb\n");
195 ASSERT(0);
196 }
197 }
Mayank Grover2995f502017-09-12 19:19:20 +0530198#endif
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800199
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700200#if ENABLE_WBC
Channagoud Kadabi22165612015-07-22 14:04:37 -0700201 if (board_hardware_id() == HW_PLATFORM_MTP)
202 pm_appsbl_set_dcin_suspend(1);
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700203#endif
204
Channagoud Kadabi7edb9b42015-08-11 23:45:31 -0700205
206 if (crypto_initialized())
207 {
208 crypto_eng_cleanup();
209 clock_ce_disable(CE_INSTANCE);
210 }
211
Sridhar Parasuram9f28f672015-03-17 15:40:47 -0700212 /* Tear down glink channels */
213 rpm_glink_uninit();
214
Mayank Grover2995f502017-09-12 19:19:20 +0530215#if VERIFIED_BOOT
Mayank Grover77c17d32017-10-26 12:13:21 +0530216 if (target_get_vb_version() >= VB_M)
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800217 {
Mayank Grover2995f502017-09-12 19:19:20 +0530218 if (rpmb_uninit() < 0)
219 {
220 dprintf(CRITICAL, "RPMB uninit failed\n");
221 ASSERT(0);
222 }
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800223 }
Mayank Grover2995f502017-09-12 19:19:20 +0530224#endif
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800225
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700226}
227
228static void set_sdc_power_ctrl()
229{
Tanya Finkel619fc2a2016-08-16 14:11:26 +0300230 uint32_t reg = 0;
231 uint8_t clk = 0;
232 uint8_t cmd = 0;
233 uint8_t dat = 0;
234
235 if (flash_memory_slot == 0x1)
236 {
237 clk = TLMM_CUR_VAL_10MA;
238 cmd = TLMM_CUR_VAL_8MA;
239 dat = TLMM_CUR_VAL_8MA;
240 reg = SDC1_HDRV_PULL_CTL;
241 }
242 else if (flash_memory_slot == 0x2)
243 {
244 clk = TLMM_CUR_VAL_16MA;
245 cmd = TLMM_CUR_VAL_10MA;
246 dat = TLMM_CUR_VAL_10MA;
247 reg = SDC2_HDRV_PULL_CTL;
248 }
249
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700250 /* Drive strength configs for sdc pins */
251 struct tlmm_cfgs sdc1_hdrv_cfg[] =
252 {
Tanya Finkel619fc2a2016-08-16 14:11:26 +0300253 { SDC1_CLK_HDRV_CTL_OFF, clk, TLMM_HDRV_MASK, reg },
254 { SDC1_CMD_HDRV_CTL_OFF, cmd, TLMM_HDRV_MASK, reg },
255 { SDC1_DATA_HDRV_CTL_OFF, dat, TLMM_HDRV_MASK, reg },
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700256 };
257
258 /* Pull configs for sdc pins */
259 struct tlmm_cfgs sdc1_pull_cfg[] =
260 {
Tanya Finkel619fc2a2016-08-16 14:11:26 +0300261 { SDC1_CLK_PULL_CTL_OFF, TLMM_NO_PULL, TLMM_PULL_MASK, reg },
262 { SDC1_CMD_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, reg },
263 { SDC1_DATA_PULL_CTL_OFF, TLMM_PULL_UP, TLMM_PULL_MASK, reg },
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700264 };
265
266 struct tlmm_cfgs sdc1_rclk_cfg[] =
267 {
Tanya Finkel619fc2a2016-08-16 14:11:26 +0300268 { SDC1_RCLK_PULL_CTL_OFF, TLMM_PULL_DOWN, TLMM_PULL_MASK, reg },
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700269 };
270
271 /* Set the drive strength & pull control values */
272 tlmm_set_hdrive_ctrl(sdc1_hdrv_cfg, ARRAY_SIZE(sdc1_hdrv_cfg));
273 tlmm_set_pull_ctrl(sdc1_pull_cfg, ARRAY_SIZE(sdc1_pull_cfg));
274 tlmm_set_pull_ctrl(sdc1_rclk_cfg, ARRAY_SIZE(sdc1_rclk_cfg));
275}
276
c_wufengf433f232015-09-21 15:21:21 +0800277uint32_t target_is_pwrkey_pon_reason()
278{
279 uint8_t pon_reason = pm8950_get_pon_reason();
Vijay Kumar Pendotie1fff022016-05-04 13:04:32 +0530280
c_wufengf433f232015-09-21 15:21:21 +0800281 if (pm8x41_get_is_cold_boot() && ((pon_reason == KPDPWR_N) || (pon_reason == (KPDPWR_N|PON1))))
282 return 1;
Vijay Kumar Pendotie1fff022016-05-04 13:04:32 +0530283 else if (pon_reason == PON1)
284 {
285 /* DC charger is present or USB charger is present */
286 if (((USBIN_UV_RT_STS | USBIN_OV_RT_STS) & pm8x41_reg_read(SMBCHG_USB_RT_STS)) == 0 ||
287 ((DCIN_UV_RT_STS | DCIN_OV_RT_STS) & pm8x41_reg_read(SMBCHG_DC_RT_STS)) == 0)
288 return 0;
289 else
290 return 1;
291 }
c_wufengf433f232015-09-21 15:21:21 +0800292 else
293 return 0;
294}
295
296
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700297void target_sdc_init()
298{
299 struct mmc_config_data config = {0};
300
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700301 config.bus_width = DATA_BUS_WIDTH_8BIT;
302 config.max_clk_rate = MMC_CLK_192MHZ;
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800303 config.hs400_support = 1;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700304
305 /* Try slot 1*/
Tanya Finkel619fc2a2016-08-16 14:11:26 +0300306 flash_memory_slot = 1;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700307 config.slot = 1;
308 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
309 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
310 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
311
Tanya Finkel619fc2a2016-08-16 14:11:26 +0300312 /* Set drive strength & pull ctrl values */
313 set_sdc_power_ctrl();
314
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700315 if (!(dev = mmc_init(&config)))
316 {
317 /* Try slot 2 */
Tanya Finkel619fc2a2016-08-16 14:11:26 +0300318 flash_memory_slot = 2;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700319 config.slot = 2;
320 config.max_clk_rate = MMC_CLK_200MHZ;
321 config.sdhc_base = mmc_sdhci_base[config.slot - 1];
322 config.pwrctl_base = mmc_pwrctl_base[config.slot - 1];
323 config.pwr_irq = mmc_sdc_pwrctl_irq[config.slot - 1];
324
Tanya Finkel619fc2a2016-08-16 14:11:26 +0300325 /* Set drive strength & pull ctrl values */
326 set_sdc_power_ctrl();
327
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700328 if (!(dev = mmc_init(&config)))
329 {
330 dprintf(CRITICAL, "mmc init failed!");
331 ASSERT(0);
332 }
333 }
334}
335
336void *target_mmc_device()
337{
338 if (platform_boot_dev_isemmc())
339 return (void *) dev;
340 else
341 return (void *) &ufs_device;
342}
343
344void target_init(void)
345{
346 dprintf(INFO, "target_init()\n");
347
Sridhar Parasuram1d224322015-06-15 11:03:40 -0700348 pmic_info_populate();
349
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700350 spmi_init(PMIC_ARB_CHANNEL_NUM, PMIC_ARB_OWNER_ID);
351
Channagoud Kadabibb8f1f92015-04-27 11:14:45 -0700352 /* Initialize Glink */
353 rpm_glink_init();
354
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700355 target_keystatus();
356
c_wufengf433f232015-09-21 15:21:21 +0800357#if defined(LONG_PRESS_POWER_ON) || defined(PON_VIB_SUPPORT)
358 switch(board_hardware_id())
359 {
360 case HW_PLATFORM_QRD:
361#if LONG_PRESS_POWER_ON
362 shutdown_detect();
363#endif
c_wufeng196210d2015-09-21 12:49:43 +0800364#if PON_VIB_SUPPORT
365 vib_timed_turn_on(VIBRATE_TIME);
366#endif
c_wufengf433f232015-09-21 15:21:21 +0800367 break;
368 }
369#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700370
371 if (target_use_signed_kernel())
372 target_crypto_init_params();
373
374 platform_read_boot_config();
375
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800376#ifdef MMC_SDHCI_SUPPORT
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700377 if (platform_boot_dev_isemmc())
378 {
379 target_sdc_init();
380 }
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800381#endif
382#ifdef UFS_SUPPORT
383 if (!platform_boot_dev_isemmc())
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700384 {
385 ufs_device.base = UFS_BASE;
386 ufs_init(&ufs_device);
387 }
Sridhar Parasuram50b9d962015-02-12 11:28:09 -0800388#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700389
390 /* Storage initialization is complete, read the partition table info */
Channagoud Kadabi58a273b2015-02-10 12:56:22 -0800391 mmc_read_partition_table(0);
Channagoud Kadabi2bab29b2015-02-11 13:26:03 -0800392
Channagoud Kadabi1171d8d2015-07-30 19:12:44 -0700393#if ENABLE_WBC
394 /* Look for battery voltage and make sure we have enough to bootup
395 * Otherwise initiate battery charging
396 * Charging should happen as early as possible, any other driver
397 * initialization before this should consider the power impact
398 */
Channagoud Kadabi25fd8ce2015-08-19 14:45:08 -0700399 switch(board_hardware_id())
400 {
401 case HW_PLATFORM_MTP:
402 case HW_PLATFORM_FLUID:
lijuang0e98add2015-11-10 10:40:27 +0800403 case HW_PLATFORM_QRD:
Parth Dixit550ddf32016-11-28 17:00:29 +0530404 if(target_is_pmi_enabled())
405 pm_appsbl_chg_check_weak_battery_status(1);
Channagoud Kadabi25fd8ce2015-08-19 14:45:08 -0700406 break;
407 default:
408 /* Charging not supported */
409 break;
410 };
Channagoud Kadabi1171d8d2015-07-30 19:12:44 -0700411#endif
412
Mayank Grover2995f502017-09-12 19:19:20 +0530413#if VERIFIED_BOOT
Mayank Grover77c17d32017-10-26 12:13:21 +0530414 if (VB_M <= target_get_vb_version())
Sridhar Parasuram568e7a62015-08-06 13:16:02 -0700415 {
Mayank Grover2995f502017-09-12 19:19:20 +0530416 /* Initialize Qseecom */
417 if (qseecom_init() < 0)
418 {
419 dprintf(CRITICAL, "Failed to initialize qseecom\n");
420 ASSERT(0);
421 }
Sridhar Parasuram568e7a62015-08-06 13:16:02 -0700422
Mayank Grover2995f502017-09-12 19:19:20 +0530423 /* Start Qseecom */
424 if (qseecom_tz_init() < 0)
425 {
426 dprintf(CRITICAL, "Failed to start qseecom\n");
427 ASSERT(0);
428 }
Sridhar Parasuram568e7a62015-08-06 13:16:02 -0700429
Mayank Grover2995f502017-09-12 19:19:20 +0530430 if (rpmb_init() < 0)
431 {
432 dprintf(CRITICAL, "RPMB init failed\n");
433 ASSERT(0);
434 }
Sridhar Parasuram568e7a62015-08-06 13:16:02 -0700435
Mayank Grover2995f502017-09-12 19:19:20 +0530436 /*
437 * Load the sec app for first time
438 */
439 if (load_sec_app() < 0)
440 {
441 dprintf(CRITICAL, "Failed to load App for verified\n");
442 ASSERT(0);
443 }
Sridhar Parasuramc61ecc22015-09-22 13:53:31 -0700444 }
Mayank Grover2995f502017-09-12 19:19:20 +0530445#endif
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700446}
447
448unsigned board_machtype(void)
449{
450 return LINUX_MACHTYPE_UNKNOWN;
451}
452
453/* Detect the target type */
454void target_detect(struct board_data *board)
455{
456 /* This is filled from board.c */
457}
458
Dhaval Patelb95039c2015-03-16 11:14:06 -0700459static uint8_t splash_override;
460/* Returns 1 if target supports continuous splash screen. */
461int target_cont_splash_screen()
462{
463 uint8_t splash_screen = 0;
Channagoud Kadabi25fd8ce2015-08-19 14:45:08 -0700464 if(!splash_override && !pm_appsbl_charging_in_progress()) {
Dhaval Patelb95039c2015-03-16 11:14:06 -0700465 switch(board_hardware_id())
466 {
467 case HW_PLATFORM_SURF:
468 case HW_PLATFORM_MTP:
469 case HW_PLATFORM_FLUID:
feifanz76fe6482015-09-02 15:25:16 +0800470 case HW_PLATFORM_QRD:
Kuogee Hsiehb976dfc2015-08-28 13:21:30 -0700471 case HW_PLATFORM_LIQUID:
Siddharth Zaveriacaacc32015-12-12 15:10:33 -0500472 case HW_PLATFORM_DRAGON:
473 case HW_PLATFORM_ADP:
Dhaval Patelb95039c2015-03-16 11:14:06 -0700474 dprintf(SPEW, "Target_cont_splash=1\n");
475 splash_screen = 1;
476 break;
477 default:
478 dprintf(SPEW, "Target_cont_splash=0\n");
479 splash_screen = 0;
480 }
481 }
482 return splash_screen;
483}
484
485void target_force_cont_splash_disable(uint8_t override)
486{
487 splash_override = override;
488}
489
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700490/* Detect the modem type */
491void target_baseband_detect(struct board_data *board)
492{
493 uint32_t platform;
Channagoud Kadabi4021fa92015-11-03 16:35:26 -0800494 uint32_t platform_hardware;
495 uint32_t platform_subtype;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700496
497 platform = board->platform;
Channagoud Kadabi4021fa92015-11-03 16:35:26 -0800498 platform_hardware = board->platform_hw;
499 platform_subtype = board->platform_subtype;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700500
Channagoud Kadabi4021fa92015-11-03 16:35:26 -0800501 if (platform_hardware == HW_PLATFORM_SURF)
502 {
503 if (platform_subtype == FUSION_I2S_CDP)
504 board->baseband = BASEBAND_MDM;
505 }
506 else if (platform_hardware == HW_PLATFORM_MTP)
507 {
508 if (platform_subtype == FUSION_I2S_MTP ||
509 platform_subtype == FUSION_SLIMBUS)
510 board->baseband = BASEBAND_MDM;
511 }
512 /*
513 * Special case if MDM is not set look for chip info to decide
514 * platform subtype
515 */
516 if (board->baseband != BASEBAND_MDM)
517 {
518 switch(platform) {
519 case APQ8096:
Channagoud Kadabiee2b65e2016-01-11 19:10:29 -0800520 case APQ8096AU:
521 case APQ8096SG:
Channagoud Kadabi99d23702015-02-02 20:52:17 -0800522 board->baseband = BASEBAND_APQ;
Channagoud Kadabi4021fa92015-11-03 16:35:26 -0800523 break;
524 case MSM8996:
Channagoud Kadabiee2b65e2016-01-11 19:10:29 -0800525 case MSM8996SG:
526 case MSM8996AU:
527 case MSM8996L:
528 board->baseband = BASEBAND_MSM;
Channagoud Kadabi4021fa92015-11-03 16:35:26 -0800529 break;
530 default:
531 dprintf(CRITICAL, "Platform type: %u is not supported\n",platform);
532 ASSERT(0);
533 };
534 }
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700535}
Channagoud Kadabi4021fa92015-11-03 16:35:26 -0800536
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700537unsigned target_baseband()
538{
539 return board_baseband();
540}
541
542void target_serialno(unsigned char *buf)
543{
544 unsigned int serialno;
545 if (target_is_emmc_boot()) {
546 serialno = mmc_get_psn();
547 snprintf((char *)buf, 13, "%x", serialno);
548 }
549}
550
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700551int emmc_recovery_init(void)
552{
553 return _emmc_recovery_init();
554}
555
556void target_usb_phy_reset()
557{
558 usb30_qmp_phy_reset();
559 qusb2_phy_reset();
560}
561
Tanya Finkel77318e02016-05-17 14:20:59 +0300562void target_usb_phy_sec_reset()
563{
564 qusb2_phy_reset();
565}
566
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700567target_usb_iface_t* target_usb30_init()
568{
569 target_usb_iface_t *t_usb_iface;
570
571 t_usb_iface = calloc(1, sizeof(target_usb_iface_t));
572 ASSERT(t_usb_iface);
573
Tanya Finkel77318e02016-05-17 14:20:59 +0300574
575 /* for SBC we use secondary port */
576 if (board_hardware_id() == HW_PLATFORM_SBC)
577 {
578 /* secondary port have no QMP phy,use only QUSB2 phy that have only reset */
579 t_usb_iface->phy_init = NULL;
580 t_usb_iface->phy_reset = target_usb_phy_sec_reset;
581 t_usb_iface->clock_init = clock_usb20_init;
582 } else {
583 t_usb_iface->phy_init = usb30_qmp_phy_init;
584 t_usb_iface->phy_reset = target_usb_phy_reset;
585 t_usb_iface->clock_init = clock_usb30_init;
586 }
587
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700588 t_usb_iface->vbus_override = 1;
589
590 return t_usb_iface;
591}
592
593/* identify the usb controller to be used for the target */
594const char * target_usb_controller()
595{
596 return "dwc";
597}
598
599uint32_t target_override_pll()
600{
Channagoud Kadabi1e5144b2015-04-28 17:15:05 -0700601 if (board_soc_version() >= 0x20000)
602 return 0;
603 else
604 return 1;
Channagoud Kadabied60a8b2014-06-27 15:35:09 -0700605}
606
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -0800607crypto_engine_type board_ce_type(void)
608{
Channagoud Kadabi7edb9b42015-08-11 23:45:31 -0700609 return CRYPTO_ENGINE_TYPE_HW;
Channagoud Kadabi4a870cf2015-01-21 10:39:01 -0800610}
611
612/* Set up params for h/w CE. */
613void target_crypto_init_params()
614{
615 struct crypto_init_params ce_params;
616
617 /* Set up base addresses and instance. */
618 ce_params.crypto_instance = CE_INSTANCE;
619 ce_params.crypto_base = MSM_CE_BASE;
620 ce_params.bam_base = MSM_CE_BAM_BASE;
621
622 /* Set up BAM config. */
623 ce_params.bam_ee = CE_EE;
624 ce_params.pipes.read_pipe = CE_READ_PIPE;
625 ce_params.pipes.write_pipe = CE_WRITE_PIPE;
626 ce_params.pipes.read_pipe_grp = CE_READ_PIPE_LOCK_GRP;
627 ce_params.pipes.write_pipe_grp = CE_WRITE_PIPE_LOCK_GRP;
628
629 /* Assign buffer sizes. */
630 ce_params.num_ce = CE_ARRAY_SIZE;
631 ce_params.read_fifo_size = CE_FIFO_SIZE;
632 ce_params.write_fifo_size = CE_FIFO_SIZE;
633
634 /* BAM is initialized by TZ for this platform.
635 * Do not do it again as the initialization address space
636 * is locked.
637 */
638 ce_params.do_bam_init = 0;
639
640 crypto_init_params(&ce_params);
641}
Channagoud Kadabi083290f2015-03-13 14:18:38 -0700642
643unsigned target_pause_for_battery_charge(void)
644{
645 uint8_t pon_reason = pm8x41_get_pon_reason();
646 uint8_t is_cold_boot = pm8x41_get_is_cold_boot();
Channagoud Kadabi9b28c0b2016-01-11 18:42:33 -0800647 pm_smbchg_usb_chgpth_pwr_pth_type charger_path = PM_SMBCHG_USB_CHGPTH_PWR_PATH__INVALID;
648 dprintf(INFO, "%s : pon_reason is %d cold_boot:%d charger path: %d\n", __func__,
649 pon_reason, is_cold_boot, charger_path);
Channagoud Kadabi083290f2015-03-13 14:18:38 -0700650 /* In case of fastboot reboot,adb reboot or if we see the power key
651 * pressed we do not want go into charger mode.
652 * fastboot reboot is warm boot with PON hard reset bit not set
653 * adb reboot is a cold boot with PON hard reset bit set
654 */
Channagoud Kadabi9b28c0b2016-01-11 18:42:33 -0800655 pm_smbchg_get_charger_path(1, &charger_path);
Channagoud Kadabi083290f2015-03-13 14:18:38 -0700656 if (is_cold_boot &&
657 (!(pon_reason & HARD_RST)) &&
658 (!(pon_reason & KPDPWR_N)) &&
Channagoud Kadabi9b28c0b2016-01-11 18:42:33 -0800659 ((pon_reason & PON1)) &&
660 ((charger_path == PM_SMBCHG_USB_CHGPTH_PWR_PATH__DC_CHARGER) ||
661 (charger_path == PM_SMBCHG_USB_CHGPTH_PWR_PATH__USB_CHARGER)))
662
Channagoud Kadabi083290f2015-03-13 14:18:38 -0700663 return 1;
664 else
665 return 0;
666}
Channagoud Kadabi23edc0c2015-03-27 18:31:32 -0700667
lijuang395b5e62015-11-19 17:39:44 +0800668int set_download_mode(enum reboot_reason mode)
Channagoud Kadabi23edc0c2015-03-27 18:31:32 -0700669{
670 int ret = 0;
671 ret = scm_dload_mode(mode);
672
673 return ret;
674}
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700675
Channagoud Kadabi65b518d2015-08-05 16:17:14 -0700676void pmic_reset_configure(uint8_t reset_type)
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700677{
Vamshi Krishna B V49ffb8d2018-03-07 12:56:27 +0530678 uint8_t sec_pmic_reset_type = reset_type;
679
680 /* use shutdown for non-core pmic's on hard_reset */
681 if (reset_type == PON_PSHOLD_HARD_RESET)
682 sec_pmic_reset_type = PON_PSHOLD_SHUTDOWN;
683
684 /* Confiure primary pmic PM8996 */
685 pm8996_reset_configure(0, reset_type);
686
687 /* Confiure secondary pmic PMI8996 */
688 pm8996_reset_configure(2, sec_pmic_reset_type);
689
690 /* Check if third pmic PM8004 present */
691 if ((board_pmic_target(2) & 0xff) == 0xC)
692 {
693 /* Confiure PM8004 */
694 pm8996_reset_configure(4, reset_type);
695
696 /* Check if fourth pmic PMK8001 present */
697 if ((board_pmic_target(3) & 0xff) == 0x12)
698 pm8996_reset_configure(6, sec_pmic_reset_type);
699 }
700 else if ((board_pmic_target(2) & 0xff) == 0x12)
701 {
702 /* check and configure if third pmic is PMK8001 */
703 pm8996_reset_configure(6, sec_pmic_reset_type);
704 }
Channagoud Kadabiffc4b902015-06-25 23:14:27 -0700705}
lijuang3606df82015-09-02 21:14:43 +0800706
707uint32_t target_get_pmic()
708{
709 return PMIC_IS_PMI8996;
710}
Channagoud Kadabi85c7ec32016-01-28 23:09:21 -0800711
712int target_update_cmdline(char *cmdline)
713{
714 uint32_t platform_id = board_platform_id();
715 int len = 0;
716 if (platform_id == APQ8096SG || platform_id == MSM8996SG)
717 {
718 strlcpy(cmdline, " fpsimd.fpsimd_settings=0", TARGET_MAX_CMDLNBUF);
719 len = strlen (cmdline);
Prasad Sodagudid76d1802016-05-03 23:18:14 +0530720
721 /* App settings are not required for other than v1.0 SoC */
722 if (board_soc_version() > 0x10000) {
723 strlcpy(cmdline + len, " app_setting.use_app_setting=0", TARGET_MAX_CMDLNBUF - len);
724 len = strlen (cmdline);
725 }
Channagoud Kadabi85c7ec32016-01-28 23:09:21 -0800726 }
727
728 return len;
729}
anisha agarwalebc52bc2016-07-08 15:50:00 -0700730
731#if _APPEND_CMDLINE
732int get_target_boot_params(const char *cmdline, const char *part, char **buf)
733{
734 int system_ptn_index = -1;
735 unsigned int lun = 0;
736 char lun_char_base = 'a', lun_char_limit = 'h';
737
738 /*allocate buflen for largest possible string*/
zhaochened3bdfb2018-02-06 19:09:17 +0800739 uint32_t buflen = strlen(ROOTFS_EMMC_PATH) + sizeof(int) + 1; /*1 character for null termination*/
anisha agarwalebc52bc2016-07-08 15:50:00 -0700740
741 if (!cmdline || !part ) {
742 dprintf(CRITICAL, "WARN: Invalid input param\n");
743 return -1;
744 }
745
746 system_ptn_index = partition_get_index(part);
747 if (system_ptn_index == -1)
748 {
749 dprintf(CRITICAL,"Unable to find partition %s\n",part);
750 return -1;
751 }
752
753 *buf = (char *)malloc(buflen);
754 if(!(*buf)) {
755 dprintf(CRITICAL,"Unable to allocate memory for boot params\n");
756 return -1;
757 }
758
759 /*
760 * check if cmdline contains "root="/"" at the beginning of buffer or
761 * " root="/"ubi.mtd" in the middle of buffer.
762 */
763 if ((strncmp(cmdline," root=",strlen(" root=")) == 0) ||
764 strstr(cmdline, " root="))
765 dprintf(DEBUG, "DEBUG: cmdline has root=\n");
766 else
767 {
768 if (platform_boot_dev_isemmc()) {
zhaochened3bdfb2018-02-06 19:09:17 +0800769 snprintf(*buf, buflen, ROOTFS_EMMC_PATH"%d",
anisha agarwalebc52bc2016-07-08 15:50:00 -0700770 system_ptn_index + 1);
771 } else {
772 lun = partition_get_lun(system_ptn_index);
773 if ((lun_char_base + lun) > lun_char_limit) {
774 dprintf(CRITICAL, "lun value exceeds limit\n");
775 return -1;
776 }
777 snprintf(*buf, buflen, " root=/dev/sd%c%d",
778 lun_char_base + lun,
779 partition_get_index_in_lun(part, lun));
780 }
781 }
782 /*in success case buf will be freed in the calling function of this*/
783 return 0;
784}
785#endif