Duy Truong | f3ac7b3 | 2013-02-13 01:07:28 -0800 | [diff] [blame^] | 1 | /* Copyright (c) 2012, The Linux Foundation. All rights reserved. |
Deepa Dinamani | c2a9b36 | 2012-02-23 15:15:54 -0800 | [diff] [blame] | 2 | * |
| 3 | * Redistribution and use in source and binary forms, with or without |
| 4 | * modification, are permitted provided that the following conditions are |
| 5 | * met: |
| 6 | * * Redistributions of source code must retain the above copyright |
| 7 | * notice, this list of conditions and the following disclaimer. |
| 8 | * * Redistributions in binary form must reproduce the above |
| 9 | * copyright notice, this list of conditions and the following |
| 10 | * disclaimer in the documentation and/or other materials provided |
| 11 | * with the distribution. |
Duy Truong | f3ac7b3 | 2013-02-13 01:07:28 -0800 | [diff] [blame^] | 12 | * * Neither the name of The Linux Foundation nor the names of its |
Deepa Dinamani | c2a9b36 | 2012-02-23 15:15:54 -0800 | [diff] [blame] | 13 | * contributors may be used to endorse or promote products derived |
| 14 | * from this software without specific prior written permission. |
| 15 | * |
| 16 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 17 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT |
| 19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS |
| 20 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| 21 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| 22 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR |
| 23 | * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, |
| 24 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE |
| 25 | * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN |
| 26 | * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
| 28 | |
| 29 | #ifndef __SPMI_H |
| 30 | #define __SPMI_H |
| 31 | |
| 32 | #define SPMI_MSM8974_MASTER_ID 0 |
| 33 | |
| 34 | #define SPMI_GENI_REG(x) (SPMI_GENI_BASE + (x)) |
| 35 | #define SPMI_GENI_CFG_REG_BASE SPMI_GENI_REG(0x100) |
| 36 | #define SPMI_GENI_CFG_RAM_BASE SPMI_GENI_REG(0x200) |
| 37 | |
| 38 | #define SPMI_GENI_CFG_REGn(x) (SPMI_GENI_CFG_REG_BASE + 4 * (x)) |
| 39 | #define SPMI_GENI_CFG_RAM_REGn(x) (SPMI_GENI_CFG_RAM_BASE + 4 * (x)) |
| 40 | |
| 41 | #define SPMI_GENI_CLK_CTRL_REG SPMI_GENI_REG(0x00) |
| 42 | #define SPMI_GENI_OUTPUT_CTRL_REG SPMI_GENI_REG(0x10) |
| 43 | #define SPMI_GENI_FORCE_DEFAULT_REG SPMI_GENI_REG(0x0C) |
| 44 | #define SPMI_MID_REG SPMI_GENI_REG(0xF00) |
| 45 | #define SPMI_CFG_REG SPMI_GENI_REG(0xF04) |
| 46 | #define SPMI_SEC_DISABLE_REG SPMI_GENI_REG(0xF08) |
| 47 | |
| 48 | #define SPMI_GENI_IRQ_ENABLE (SPMI_GENI_BASE + 0x24) |
| 49 | #define SPMI_GENI_IRQ_CLEAR (SPMI_GENI_BASE + 0x28) |
| 50 | #define SPMI_GENI_TX_FIFO_BASE (SPMI_GENI_BASE + 0x40) |
| 51 | #define SPMI_GENI_RX_FIFO_BASE (SPMI_GENI_BASE + 0x80) |
| 52 | |
| 53 | #define SPMI_GENI_TX_FIFOn(x) (SPMI_GENI_TX_FIFO_BASE + 4 * (x)) |
| 54 | #define SPMI_GENI_RX_FIFOn(x) (SPMI_GENI_RX_FIFO_BASE + 4 * (x)) |
| 55 | |
| 56 | #define PMIC_ARB_CHNLn_CMD0(x) (SPMI_BASE + 0xF800 + (x) * 0x80) |
| 57 | #define PMIC_ARB_CMD_OPCODE_SHIFT 27 |
| 58 | #define PMIC_ARB_CMD_PRIORITY_SHIFT 26 |
| 59 | #define PMIC_ARB_CMD_SLAVE_ID_SHIFT 20 |
| 60 | #define PMIC_ARB_CMD_ADDR_SHIFT 12 |
| 61 | #define PMIC_ARB_CMD_ADDR_OFFSET_SHIFT 4 |
| 62 | #define PMIC_ARB_CMD_BYTE_CNT_SHIFT 0 |
| 63 | |
| 64 | #define PMIC_ARB_CHNLn_CONFIG(x) (SPMI_BASE + 0xF804 + (x) * 0x80) |
| 65 | #define PMIC_ARB_CHNLn_STATUS(x) (SPMI_BASE + 0xF808 + (x) * 0x80) |
| 66 | #define PMIC_ARB_CHNLn_WDATA(x, n) (SPMI_BASE + 0xF810 + \ |
| 67 | (x) * 0x80 + (n) * 4) |
| 68 | #define PMIC_ARB_CHNLn_RDATA(x,n) (SPMI_BASE + 0xF818 + \ |
| 69 | (x) * 0x80 + (n) * 4) |
| 70 | |
| 71 | /* PIC Registers */ |
| 72 | #define SPMI_PIC_OWNERm_ACC_STATUSn(m, n) (SPMI_PIC_BASE + 32 * (m) + 4 * (n)) |
| 73 | #define SPMI_PIC_ACC_ENABLEn(n) (SPMI_PIC_BASE + 0x200 + 4 * (n)) |
| 74 | #define SPMI_PIC_IRQ_STATUSn(n) (SPMI_PIC_BASE + 0x600 + 0x4 * (n)) |
| 75 | #define SPMI_PIC_IRQ_CLEARn(n) (SPMI_PIC_BASE + 0xA00 + 0x4 * (n)) |
| 76 | |
| 77 | /* SPMI Commands */ |
| 78 | #define SPMI_CMD_EXT_REG_WRTIE_LONG 0x00 |
| 79 | #define SPMI_CMD_EXT_REG_READ_LONG 0x01 |
| 80 | #define SPMI_CMD_EXT_REG_READ_LONG_DELAYED 0x02 |
| 81 | #define SPMI_CMD_TRANSFER_BUS_OWNERSHIP 0x03 |
| 82 | |
| 83 | /* The commands below are not yet supported */ |
| 84 | #define SPMI_CMD_RESET 0x04 |
| 85 | #define SPMI_CMD_SLEEP 0x05 |
| 86 | #define SPMI_CMD_SHUTDOWN 0x06 |
| 87 | #define SPMI_CMD_WAKEUP 0x07 |
| 88 | #define SPMI_CMD_EXT_REG_WRITE 0x08 |
| 89 | #define SPMI_CMD_EXT_REG_READ 0x09 |
| 90 | #define SPMI_CMD_REG_WRITE 0x0A |
| 91 | #define SPMI_CMD_REG_READ 0x0B |
| 92 | #define SPMI_CMD_REG_0_WRITE 0x0C |
| 93 | #define SPMI_CMD_AUTH 0x0D |
| 94 | #define SPMI_CMD_MASTER_WRITE 0x0E |
| 95 | #define SPMI_CMD_MASTER_READ 0x0F |
| 96 | #define SPMI_CMD_DEV_DESC_BLK_MASTER_READ 0x10 |
| 97 | #define SPMI_CMD_DEV_DESC_BLK_SLAVE_READ 0x11 |
| 98 | |
| 99 | enum spmi_geni_cmd_return_value{ |
| 100 | SPMI_CMD_DONE, |
| 101 | SMPI_CMD_DENIED, |
| 102 | SPMI_CMD_FAILURE, |
| 103 | SPMI_ILLEGAL_CMD, |
| 104 | SPMI_CMD_OVERRUN = 6, |
| 105 | SPMI_TX_FIFO_RD_ERR, |
| 106 | SPMI_TX_FIFO_WR_ERR, |
| 107 | SPMI_RX_FIFO_RD_ERR, |
| 108 | SPMI_RX_FIFO_WR_ERR |
| 109 | }; |
| 110 | |
| 111 | enum pmic_arb_chnl_return_values{ |
| 112 | PMIC_ARB_CMD_DONE, |
| 113 | PMIC_ARB_CMD_FAILURE, |
| 114 | PMIC_ARB_CMD_DENIED, |
| 115 | PMIC_ARB_CMD_DROPPED, |
| 116 | }; |
| 117 | |
| 118 | struct pmic_arb_cmd{ |
| 119 | uint8_t opcode; |
| 120 | uint8_t priority; |
| 121 | uint8_t slave_id; |
| 122 | uint8_t address; |
| 123 | uint8_t offset; |
| 124 | uint8_t byte_cnt; |
| 125 | }; |
| 126 | |
| 127 | struct pmic_arb_param{ |
| 128 | uint8_t *buffer; |
| 129 | uint8_t size; |
| 130 | }; |
| 131 | |
| 132 | typedef void (*spmi_callback)(); |
| 133 | |
| 134 | void spmi_init(uint32_t, uint32_t); |
| 135 | unsigned int pmic_arb_write_cmd(struct pmic_arb_cmd *cmd, |
| 136 | struct pmic_arb_param *param); |
| 137 | unsigned int pmic_arb_read_cmd(struct pmic_arb_cmd *cmd, |
| 138 | struct pmic_arb_param *param); |
| 139 | |
| 140 | #endif |