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gerrit-public.fairphone.software / kernel / lk / refs/tags/FP3-REL-Q.3.A.0136 / platform / msm_shared / mipi_dsi_autopll_20nm.c
  1. f270235 platform: msm_shared: do phy reset as part of init sequence by Aravind Venkateswaran · 9 years ago
  2. c0766c8 target: add support to use DSI1 PLL to drive a display panel by Padmanabhan Komanduru · 9 years ago
  3. 34dda2a platform: msm_shared: add support to configure VCO range by Chandan Uddaraju · 9 years ago
  4. 6592e77 platform: msm_shared: use DSI pll1 powerdown sequence by Huaibin Yang · 9 years ago
  5. 90991f1 platform: msm_shared: add pll common block settings for pll 1 by Huaibin Yang · 9 years ago
  6. 7dfb85e platform: msm_shared: Use DSI PLL1 base defined in mipi structure by Jeevan Shriram · 9 years ago
  7. db0b2bf platform: msm_shared: Fix compilation warnings in display driver by Veera Sundaram Sankaran · 9 years ago
  8. 1d3115d platform: msm_shared: update PLL sequence for DSI 20nm by Jeevan Shriram · 9 years ago
  9. b151f30 platform: pll: Explicitly turn off DSI PLL 1 for 20nm PHY by Siddhartha Agrawal · 10 years ago
  10. ee8c9b3 platform: msm_shared: add 20nm DSI PHY and pll support by Dhaval Patel · 10 years ago