irqchip: spear_shirq: Reorder the spear320 ras blocks
Order the ras blocks in the order of interrupts not alphabetically.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/20140619212713.310591579@linutronix.de
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
diff --git a/drivers/irqchip/spear-shirq.c b/drivers/irqchip/spear-shirq.c
index f7c25a7..7ebb1a2 100644
--- a/drivers/irqchip/spear-shirq.c
+++ b/drivers/irqchip/spear-shirq.c
@@ -138,6 +138,19 @@
#define SPEAR320_INT_CLR_MASK_REG 0x04
#define SPEAR320_INT_ENB_MASK_REG 0x08
+static struct spear_shirq spear320_shirq_ras3 = {
+ .offset = 0,
+ .nr_irqs = 7,
+ .disabled = 1,
+ .regs = {
+ .enb_reg = SPEAR320_INT_ENB_MASK_REG,
+ .reset_to_enb = 1,
+ .status_reg = SPEAR320_INT_STS_MASK_REG,
+ .clear_reg = SPEAR320_INT_CLR_MASK_REG,
+ .reset_to_clear = 1,
+ },
+};
+
static struct spear_shirq spear320_shirq_ras1 = {
.offset = 7,
.nr_irqs = 3,
@@ -160,19 +173,6 @@
},
};
-static struct spear_shirq spear320_shirq_ras3 = {
- .offset = 0,
- .nr_irqs = 7,
- .disabled = 1,
- .regs = {
- .enb_reg = SPEAR320_INT_ENB_MASK_REG,
- .reset_to_enb = 1,
- .status_reg = SPEAR320_INT_STS_MASK_REG,
- .clear_reg = SPEAR320_INT_CLR_MASK_REG,
- .reset_to_clear = 1,
- },
-};
-
static struct spear_shirq spear320_shirq_intrcomm_ras = {
.offset = 11,
.nr_irqs = 11,