| commit | 0783a56087e9ecfae2f01f9662ff52081c5b5e25 | [log] [tgz] |
|---|---|---|
| author | Fabio Estevam <fabio.estevam@freescale.com> | Tue Aug 19 15:21:12 2014 -0300 |
| committer | Shawn Guo <shawn.guo@freescale.com> | Tue Sep 16 10:06:46 2014 +0800 |
| tree | da9719b2d2478b123e13aa1cf6ac0bd5b2d7cdaf | |
| parent | bad66c3ebdcdb4043bdcfe24ddab4802d5fc4327 [diff] |
ARM: clk-imx6sl: Select appropriate parents for LCDIF clocks PLL5 is well suited for being the parent of IMX6SL_CLK_LCDIF_PIX_SEL and PLL2_PFD for IMX6SL_CLK_LCDIF_AXI_SEL. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>