| commit | 0968a61918a9140d39959a318f796412354ec24d | [log] [tgz] |
|---|---|---|
| author | Vladimir Murzin <vladimir.murzin@arm.com> | Wed Nov 02 11:54:06 2016 +0000 |
| committer | Marc Zyngier <marc.zyngier@arm.com> | Tue Nov 29 09:14:48 2016 +0000 |
| tree | a1283ec6f25af67f03d48913cc9d3be99ce3ec65 | |
| parent | 328191c05ed72762c382bdb835607dd5bd56b0bc [diff] |
irqchip/gic-v3-its: Specialise readq and writeq accesses readq and writeq type of assessors are not supported in AArch32, so we need to specialise them and glue later with series of 32-bit accesses on AArch32 side. Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>