ARM: shmobile: use __iomem pointers for MMIO
ARM is moving to stricter checks on readl/write functions,
so we need to use the correct types everywhere.
This patch is a bit ugly for shmobile, which is the only platform
that just uses integer literals all over the place, but I can't
see a better way to do this.
Acked-by: Simon Horman <horms@verge.net.au>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: linux-sh@vger.kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 7f8da18..516ff7f 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -23,43 +23,43 @@
#include <linux/clkdev.h>
#include <mach/common.h>
-#define FRQCRA 0xe6150000
-#define FRQCRB 0xe6150004
-#define FRQCRD 0xe61500e4
-#define VCLKCR1 0xe6150008
-#define VCLKCR2 0xe615000C
-#define VCLKCR3 0xe615001C
-#define ZBCKCR 0xe6150010
-#define FLCKCR 0xe6150014
-#define SD0CKCR 0xe6150074
-#define SD1CKCR 0xe6150078
-#define SD2CKCR 0xe615007C
-#define FSIACKCR 0xe6150018
-#define FSIBCKCR 0xe6150090
-#define SUBCKCR 0xe6150080
-#define SPUACKCR 0xe6150084
-#define SPUVCKCR 0xe6150094
-#define MSUCKCR 0xe6150088
-#define HSICKCR 0xe615008C
-#define MFCK1CR 0xe6150098
-#define MFCK2CR 0xe615009C
-#define DSITCKCR 0xe6150060
-#define DSI0PCKCR 0xe6150064
-#define DSI1PCKCR 0xe6150068
+#define FRQCRA IOMEM(0xe6150000)
+#define FRQCRB IOMEM(0xe6150004)
+#define FRQCRD IOMEM(0xe61500e4)
+#define VCLKCR1 IOMEM(0xe6150008)
+#define VCLKCR2 IOMEM(0xe615000C)
+#define VCLKCR3 IOMEM(0xe615001C)
+#define ZBCKCR IOMEM(0xe6150010)
+#define FLCKCR IOMEM(0xe6150014)
+#define SD0CKCR IOMEM(0xe6150074)
+#define SD1CKCR IOMEM(0xe6150078)
+#define SD2CKCR IOMEM(0xe615007C)
+#define FSIACKCR IOMEM(0xe6150018)
+#define FSIBCKCR IOMEM(0xe6150090)
+#define SUBCKCR IOMEM(0xe6150080)
+#define SPUACKCR IOMEM(0xe6150084)
+#define SPUVCKCR IOMEM(0xe6150094)
+#define MSUCKCR IOMEM(0xe6150088)
+#define HSICKCR IOMEM(0xe615008C)
+#define MFCK1CR IOMEM(0xe6150098)
+#define MFCK2CR IOMEM(0xe615009C)
+#define DSITCKCR IOMEM(0xe6150060)
+#define DSI0PCKCR IOMEM(0xe6150064)
+#define DSI1PCKCR IOMEM(0xe6150068)
#define DSI0PHYCR 0xe615006C
#define DSI1PHYCR 0xe6150070
-#define PLLECR 0xe61500d0
-#define PLL0CR 0xe61500d8
-#define PLL1CR 0xe6150028
-#define PLL2CR 0xe615002c
-#define PLL3CR 0xe61500dc
-#define SMSTPCR0 0xe6150130
-#define SMSTPCR1 0xe6150134
-#define SMSTPCR2 0xe6150138
-#define SMSTPCR3 0xe615013c
-#define SMSTPCR4 0xe6150140
-#define SMSTPCR5 0xe6150144
-#define CKSCR 0xe61500c0
+#define PLLECR IOMEM(0xe61500d0)
+#define PLL0CR IOMEM(0xe61500d8)
+#define PLL1CR IOMEM(0xe6150028)
+#define PLL2CR IOMEM(0xe615002c)
+#define PLL3CR IOMEM(0xe61500dc)
+#define SMSTPCR0 IOMEM(0xe6150130)
+#define SMSTPCR1 IOMEM(0xe6150134)
+#define SMSTPCR2 IOMEM(0xe6150138)
+#define SMSTPCR3 IOMEM(0xe615013c)
+#define SMSTPCR4 IOMEM(0xe6150140)
+#define SMSTPCR5 IOMEM(0xe6150144)
+#define CKSCR IOMEM(0xe61500c0)
/* Fixed 32 KHz root clock from EXTALR pin */
static struct clk r_clk = {