| commit | 0b0f08028e4e2d69edbe4bb073af26cd17505a04 | [log] [tgz] |
|---|---|---|
| author | Chen-Yu Tsai <wens@csie.org> | Mon Oct 20 22:10:28 2014 +0800 |
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | Tue Oct 21 21:47:34 2014 +0200 |
| tree | 17aef4828848ef4c2e971e4482db5367664f2211 | |
| parent | 3b2bd70f03c75d37de791b65d574a31d1e2507b0 [diff] |
clk: sunxi: Add support for bus clock gates on Allwinner A80 SoC This adds the gate clocks for AHB/APB busses on the A80 SoC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>