driver:stmmac: Adjust time stamp increase for 0.465 ns accurate only when Time stamp binary rollover is set.
The synopsys spec says When TSCRLSSR is cleard, the rollover value of
sub-second register is 0x7FFFFFFF(0.465 ns per clock).
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
index def7e75..76ad214 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_hwtstamp.c
@@ -45,8 +45,8 @@
data = (1000000000ULL / 50000000);
/* 0.465ns accuracy */
- if (value & PTP_TCR_TSCTRLSSR)
- data = (data * 100) / 465;
+ if (!(value & PTP_TCR_TSCTRLSSR))
+ data = (data * 1000) / 465;
writel(data, ioaddr + PTP_SSIR);
}