tree 797186618cb16d1ddb3f42a1ac9c9d4f84bdc7c1
parent 87246b7567f7d1951bfcea29875523ef435c0ebf
author Paul Walmsley <paul@pwsan.com> 1233170862 -0700
committer Russell King <rmk+kernel@arm.linux.org.uk> 1234115440 +0000

[ARM] OMAP3 clock: add omap3_core_dpll_m2_set_rate()

Add the omap3_core_dpll_m2_set_rate() function to the OMAP3 clock code,
which calls into the SRAM function omap3_sram_configure_core_dpll() to
change the CORE DPLL M2 divider.  (SRAM code is necessary since rate changes
on clocks upstream from the SDRC can glitch SDRAM accesses.)

Use this function for the set_rate function pointer in the dpll3_m2_ck
struct clk.  With this function in place, PM/OPP code should be able to
alter SDRAM speed via code similar to:

      clk_set_rate(&dpll3_m2_ck, target_rate).

linux-omap source commit is 7f8b2b0f4fe52238c67d79dedcd2794dcef4dddd.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>