| commit | 0f2fa40e464c955e928979331625b5485c292bf0 | [log] [tgz] |
|---|---|---|
| author | Maxime Coquelin <maxime.coquelin@stericsson.com> | Wed Jan 23 11:27:58 2013 +0100 |
| committer | Linus Walleij <linus.walleij@linaro.org> | Mon Mar 18 13:49:58 2013 +0100 |
| tree | 670ea27813cf5b9fb5570d0ae6591253bdd51a2e | |
| parent | cca438b57e660c9a4a3216a69405b45ff00274e6 [diff] |
ARM: mach-ux500: enable 128KB way L2 cache on DB8540 DB8540 L2 was configured with 64KB way size, but it has 128KB as AP9540. Fix this by modifying ux500_l2x0_init() to use 128KB way size for all cpus in the x540 family. Signed-off-by: Maxime Coquelin <maxime.coquelin@stericsson.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>