tree ee767fd8fdfcddb785629c755866271aca08227c
parent d1c3ed669a2d452cacfb48c2d171a1f364dae2ed
author Narayanan <narayanan.gopalakrishnan@stericsson.com> 1315913422 +0530
committer Fabio Baltieri <fabio.baltieri@linaro.org> 1358157009 +0100

dmaengine: ste_dma40: reset priority bit for logical channels

This patch sets the SSCFG/SDCFG bit[7] PRI only for physical channel
requests with high priority.  For logical channels, this bit will be
zero.

Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com>
Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>