staging: comedi: s626: remove the uint16_t casts of the bit values
There are a number of uint16_t casts used in the #define's of the
constant bit field values as well as the calls to DEBIreplace().
These cause a number of sparse warnings of the type:
warning: cast truncates bits from constant value (ffff1cff becomes 1cff)
Remove all of the casts and change the types of the parameters to
DEBIreplace from uin16_t to unsigned int. This fixes all the warnings.
Mask the addr that is or'ed with DEBI_CMD_RDWORD then written to the
P_DEBICMD register as well as the val written to the P_DEBIAD register
with 0xffff. The addr and val are only 16-bits but the registers are
32-bits.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
diff --git a/drivers/staging/comedi/drivers/s626.c b/drivers/staging/comedi/drivers/s626.c
index 520a5cc..b03088b 100644
--- a/drivers/staging/comedi/drivers/s626.c
+++ b/drivers/staging/comedi/drivers/s626.c
@@ -239,12 +239,13 @@
* specifies bits that are to be preserved, wdata is new value to be
* or'd with the masked original.
*/
-static void DEBIreplace(struct comedi_device *dev, uint16_t addr, uint16_t mask,
- uint16_t wdata)
+static void DEBIreplace(struct comedi_device *dev, unsigned int addr,
+ unsigned int mask, unsigned int wdata)
{
struct s626_private *devpriv = dev->private;
unsigned int val;
+ addr &= 0xffff;
writel(DEBI_CMD_RDWORD | addr, devpriv->mmio + P_DEBICMD);
DEBItransfer(dev);
@@ -252,7 +253,7 @@
val = readl(devpriv->mmio + P_DEBIAD);
val &= mask;
val |= wdata;
- writel(val, devpriv->mmio + P_DEBIAD);
+ writel(val & 0xffff, devpriv->mmio + P_DEBIAD);
DEBItransfer(dev);
}
@@ -594,8 +595,8 @@
uint16_t value)
{
DEBIreplace(dev, k->MyCRB,
- (uint16_t) (~(CRBMSK_INTCTRL | CRBMSK_LATCHSRC)),
- (uint16_t) (value << CRBBIT_LATCHSRC));
+ ~(CRBMSK_INTCTRL | CRBMSK_LATCHSRC),
+ value << CRBBIT_LATCHSRC);
}
/* Write value into counter preload register. */
@@ -1815,13 +1816,13 @@
static void ResetCapFlags_A(struct comedi_device *dev, struct enc_private *k)
{
- DEBIreplace(dev, k->MyCRB, (uint16_t) (~CRBMSK_INTCTRL),
+ DEBIreplace(dev, k->MyCRB, ~CRBMSK_INTCTRL,
CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A);
}
static void ResetCapFlags_B(struct comedi_device *dev, struct enc_private *k)
{
- DEBIreplace(dev, k->MyCRB, (uint16_t) (~CRBMSK_INTCTRL),
+ DEBIreplace(dev, k->MyCRB, ~CRBMSK_INTCTRL,
CRBMSK_INTRESETCMD | CRBMSK_INTRESET_B);
}
@@ -1966,8 +1967,7 @@
/* While retaining CounterB and LatchSrc configurations, program the */
/* new counter operating mode. */
DEBIreplace(dev, k->MyCRA, CRAMSK_INDXSRC_B | CRAMSK_CLKSRC_B, cra);
- DEBIreplace(dev, k->MyCRB,
- (uint16_t) (~(CRBMSK_INTCTRL | CRBMSK_CLKENAB_A)), crb);
+ DEBIreplace(dev, k->MyCRB, ~(CRBMSK_INTCTRL | CRBMSK_CLKENAB_A), crb);
}
static void SetMode_B(struct comedi_device *dev, struct enc_private *k,
@@ -2028,8 +2028,7 @@
/* While retaining CounterA and LatchSrc configurations, program the */
/* new counter operating mode. */
- DEBIreplace(dev, k->MyCRA,
- (uint16_t) (~(CRAMSK_INDXSRC_B | CRAMSK_CLKSRC_B)), cra);
+ DEBIreplace(dev, k->MyCRA, ~(CRAMSK_INDXSRC_B | CRAMSK_CLKSRC_B), cra);
DEBIreplace(dev, k->MyCRB, CRBMSK_CLKENAB_A | CRBMSK_LATCHSRC, crb);
}
@@ -2038,17 +2037,15 @@
static void SetEnable_A(struct comedi_device *dev, struct enc_private *k,
uint16_t enab)
{
- DEBIreplace(dev, k->MyCRB,
- (uint16_t) (~(CRBMSK_INTCTRL | CRBMSK_CLKENAB_A)),
- (uint16_t) (enab << CRBBIT_CLKENAB_A));
+ DEBIreplace(dev, k->MyCRB, ~(CRBMSK_INTCTRL | CRBMSK_CLKENAB_A),
+ enab << CRBBIT_CLKENAB_A);
}
static void SetEnable_B(struct comedi_device *dev, struct enc_private *k,
uint16_t enab)
{
- DEBIreplace(dev, k->MyCRB,
- (uint16_t) (~(CRBMSK_INTCTRL | CRBMSK_CLKENAB_B)),
- (uint16_t) (enab << CRBBIT_CLKENAB_B));
+ DEBIreplace(dev, k->MyCRB, ~(CRBMSK_INTCTRL | CRBMSK_CLKENAB_B),
+ enab << CRBBIT_CLKENAB_B);
}
static uint16_t GetEnable_A(struct comedi_device *dev, struct enc_private *k)
@@ -2077,16 +2074,15 @@
static void SetLoadTrig_A(struct comedi_device *dev, struct enc_private *k,
uint16_t Trig)
{
- DEBIreplace(dev, k->MyCRA, (uint16_t) (~CRAMSK_LOADSRC_A),
- (uint16_t) (Trig << CRABIT_LOADSRC_A));
+ DEBIreplace(dev, k->MyCRA, ~CRAMSK_LOADSRC_A,
+ Trig << CRABIT_LOADSRC_A);
}
static void SetLoadTrig_B(struct comedi_device *dev, struct enc_private *k,
uint16_t Trig)
{
- DEBIreplace(dev, k->MyCRB,
- (uint16_t) (~(CRBMSK_LOADSRC_B | CRBMSK_INTCTRL)),
- (uint16_t) (Trig << CRBBIT_LOADSRC_B));
+ DEBIreplace(dev, k->MyCRB, ~(CRBMSK_LOADSRC_B | CRBMSK_INTCTRL),
+ Trig << CRBBIT_LOADSRC_B);
}
static uint16_t GetLoadTrig_A(struct comedi_device *dev, struct enc_private *k)
@@ -2110,12 +2106,12 @@
struct s626_private *devpriv = dev->private;
/* Reset any pending counter overflow or index captures. */
- DEBIreplace(dev, k->MyCRB, (uint16_t) (~CRBMSK_INTCTRL),
+ DEBIreplace(dev, k->MyCRB, ~CRBMSK_INTCTRL,
CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A);
/* Program counter interrupt source. */
DEBIreplace(dev, k->MyCRA, ~CRAMSK_INTSRC_A,
- (uint16_t) (IntSource << CRABIT_INTSRC_A));
+ IntSource << CRABIT_INTSRC_A);
/* Update MISC2 interrupt enable mask. */
devpriv->CounterIntEnabs =
diff --git a/drivers/staging/comedi/drivers/s626.h b/drivers/staging/comedi/drivers/s626.h
index 938dcd9..99cd57b 100644
--- a/drivers/staging/comedi/drivers/s626.h
+++ b/drivers/staging/comedi/drivers/s626.h
@@ -642,27 +642,27 @@
/* Bit field masks for CRA and CRB. */
-#define CRAMSK_INDXSRC_B ((uint16_t)(3 << CRABIT_INDXSRC_B))
-#define CRAMSK_CLKSRC_B ((uint16_t)(3 << CRABIT_CLKSRC_B))
-#define CRAMSK_INDXPOL_A ((uint16_t)(1 << CRABIT_INDXPOL_A))
-#define CRAMSK_LOADSRC_A ((uint16_t)(3 << CRABIT_LOADSRC_A))
-#define CRAMSK_CLKMULT_A ((uint16_t)(3 << CRABIT_CLKMULT_A))
-#define CRAMSK_INTSRC_A ((uint16_t)(3 << CRABIT_INTSRC_A))
-#define CRAMSK_CLKPOL_A ((uint16_t)(3 << CRABIT_CLKPOL_A))
-#define CRAMSK_INDXSRC_A ((uint16_t)(3 << CRABIT_INDXSRC_A))
-#define CRAMSK_CLKSRC_A ((uint16_t)(3 << CRABIT_CLKSRC_A))
+#define CRAMSK_INDXSRC_B (3 << CRABIT_INDXSRC_B)
+#define CRAMSK_CLKSRC_B (3 << CRABIT_CLKSRC_B)
+#define CRAMSK_INDXPOL_A (1 << CRABIT_INDXPOL_A)
+#define CRAMSK_LOADSRC_A (3 << CRABIT_LOADSRC_A)
+#define CRAMSK_CLKMULT_A (3 << CRABIT_CLKMULT_A)
+#define CRAMSK_INTSRC_A (3 << CRABIT_INTSRC_A)
+#define CRAMSK_CLKPOL_A (3 << CRABIT_CLKPOL_A)
+#define CRAMSK_INDXSRC_A (3 << CRABIT_INDXSRC_A)
+#define CRAMSK_CLKSRC_A (3 << CRABIT_CLKSRC_A)
-#define CRBMSK_INTRESETCMD ((uint16_t)(1 << CRBBIT_INTRESETCMD))
-#define CRBMSK_INTRESET_B ((uint16_t)(1 << CRBBIT_INTRESET_B))
-#define CRBMSK_INTRESET_A ((uint16_t)(1 << CRBBIT_INTRESET_A))
-#define CRBMSK_CLKENAB_A ((uint16_t)(1 << CRBBIT_CLKENAB_A))
-#define CRBMSK_INTSRC_B ((uint16_t)(3 << CRBBIT_INTSRC_B))
-#define CRBMSK_LATCHSRC ((uint16_t)(3 << CRBBIT_LATCHSRC))
-#define CRBMSK_LOADSRC_B ((uint16_t)(3 << CRBBIT_LOADSRC_B))
-#define CRBMSK_CLKMULT_B ((uint16_t)(3 << CRBBIT_CLKMULT_B))
-#define CRBMSK_CLKENAB_B ((uint16_t)(1 << CRBBIT_CLKENAB_B))
-#define CRBMSK_INDXPOL_B ((uint16_t)(1 << CRBBIT_INDXPOL_B))
-#define CRBMSK_CLKPOL_B ((uint16_t)(1 << CRBBIT_CLKPOL_B))
+#define CRBMSK_INTRESETCMD (1 << CRBBIT_INTRESETCMD)
+#define CRBMSK_INTRESET_B (1 << CRBBIT_INTRESET_B)
+#define CRBMSK_INTRESET_A (1 << CRBBIT_INTRESET_A)
+#define CRBMSK_CLKENAB_A (1 << CRBBIT_CLKENAB_A)
+#define CRBMSK_INTSRC_B (3 << CRBBIT_INTSRC_B)
+#define CRBMSK_LATCHSRC (3 << CRBBIT_LATCHSRC)
+#define CRBMSK_LOADSRC_B (3 << CRBBIT_LOADSRC_B)
+#define CRBMSK_CLKMULT_B (3 << CRBBIT_CLKMULT_B)
+#define CRBMSK_CLKENAB_B (1 << CRBBIT_CLKENAB_B)
+#define CRBMSK_INDXPOL_B (1 << CRBBIT_INDXPOL_B)
+#define CRBMSK_CLKPOL_B (1 << CRBBIT_CLKPOL_B)
#define CRBMSK_INTCTRL (CRBMSK_INTRESETCMD | CRBMSK_INTRESET_A | CRBMSK_INTRESET_B) /* Interrupt reset control bits. */
@@ -680,15 +680,15 @@
/* Bit field masks for standardized SETUP structure. */
-#define STDMSK_INTSRC ((uint16_t)(3 << STDBIT_INTSRC))
-#define STDMSK_LATCHSRC ((uint16_t)(3 << STDBIT_LATCHSRC))
-#define STDMSK_LOADSRC ((uint16_t)(3 << STDBIT_LOADSRC))
-#define STDMSK_INDXSRC ((uint16_t)(1 << STDBIT_INDXSRC))
-#define STDMSK_INDXPOL ((uint16_t)(1 << STDBIT_INDXPOL))
-#define STDMSK_CLKSRC ((uint16_t)(3 << STDBIT_CLKSRC))
-#define STDMSK_CLKPOL ((uint16_t)(1 << STDBIT_CLKPOL))
-#define STDMSK_CLKMULT ((uint16_t)(3 << STDBIT_CLKMULT))
-#define STDMSK_CLKENAB ((uint16_t)(1 << STDBIT_CLKENAB))
+#define STDMSK_INTSRC (3 << STDBIT_INTSRC)
+#define STDMSK_LATCHSRC (3 << STDBIT_LATCHSRC)
+#define STDMSK_LOADSRC (3 << STDBIT_LOADSRC)
+#define STDMSK_INDXSRC (1 << STDBIT_INDXSRC)
+#define STDMSK_INDXPOL (1 << STDBIT_INDXPOL)
+#define STDMSK_CLKSRC (3 << STDBIT_CLKSRC)
+#define STDMSK_CLKPOL (1 << STDBIT_CLKPOL)
+#define STDMSK_CLKMULT (3 << STDBIT_CLKMULT)
+#define STDMSK_CLKENAB (1 << STDBIT_CLKENAB)
struct bufferDMA {
dma_addr_t PhysicalBase;