| commit | 18cae6f7bb65bdb272f844525f7acd6d464a8541 | [log] [tgz] |
|---|---|---|
| author | Todd Fujinaka <todd.fujinaka@intel.com> | Thu May 08 23:20:24 2014 +0000 |
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | Tue May 27 02:10:44 2014 -0700 |
| tree | 1d67f8e748a8da0c2788a1f24f02d4a7c632b974 | |
| parent | c6f3148c5bcad2eb9ff1c700d6c79815173aed35 [diff] |
igb: remove redundant PHY power down register write One of the registers used to power down the PHY was found to be wrong (should be bit 2 not bit 1) on further inspection it was also found to be redundant. Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>