tree b32bcc4f66ac12f1a6c94d73a0ada36412cfa8a7
parent d1abc9a9aca06ceb795eb5405264eaafe016ec5c
author avisconti <armando.visconti@st.com> 1288033094 +0000
committer David S. Miller <davem@davemloft.net> 1288291674 -0700

stmmac: enable/disable rx/tx in the core with a single write.

This patch enables and disables the rx and tx bits in the MAC control reg
by using a single write operation.
This also solves a possible problem (spotted on SPEAr platforms) at 10Mbps
where two consecutive writes to a MAC control register can take more than
4 phy_clk cycles.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>