| commit | 1af5fa1b7e5ff8332f8a2ee3c5fb44d93b34868d | [log] [tgz] |
|---|---|---|
| author | Chris Wilson <chris@chris-wilson.co.uk> | Wed Sep 08 21:07:28 2010 +0100 |
| committer | Chris Wilson <chris@chris-wilson.co.uk> | Wed Sep 08 21:20:27 2010 +0100 |
| tree | 7839004c008fe526a8fe94edae350d137d3d640b | |
| parent | 2c9d97545914cc764786702f361a1f1c9bb8dfa9 [diff] |
drm/i915/dp: Flush the PLL register write before sleeping Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 27805a9..c7aa29b 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -883,6 +883,7 @@ dpa_ctl = I915_READ(DP_A); dpa_ctl |= DP_PLL_ENABLE; I915_WRITE(DP_A, dpa_ctl); + POSTING_READ(DP_A); udelay(200); }