| commit | 5524a67f3a4ad8625cab6a9b99419f747cea4c71 | [log] [tgz] |
|---|---|---|
| author | Wolfram Sang <wsa+renesas@sang-engineering.com> | Wed Mar 30 16:58:19 2016 +0200 |
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | Wed Apr 06 09:48:44 2016 +0200 |
| tree | d76ef60b2d40f5897debb7df022d0d913ce31f64 | |
| parent | 5d3927f655e58e644557a3dc8ee7af8884f59931 [diff] |
clk: renesas: r8a7795: add OSC and RINT clocks Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>