commit | 2c11b57a8a8d83ffa91aebb12c90488c8802e6f3 | [log] [tgz] |
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author | Shawn Guo <shawn.guo@linaro.org> | Thu Oct 31 10:35:40 2013 +0800 |
committer | Shawn Guo <shawn.guo@linaro.org> | Mon Nov 11 22:58:43 2013 +0800 |
tree | a3163627418de04d98d2a0ed2480624e248902e8 | |
parent | b6e23bb63f28f0a8ffa7cf9824fa48000c08f9b2 [diff] |
ARM: imx: improve mxc_restart() on the SRC bit writes The current comment in the code does not make it clear why the double writes on SRC bit is needed. Let's quote the errata to get it clear. Also, to ensure there are at least 2 writes happen in the same one 32kHz period, we actually need 3 writes. Let's add the third one. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>