tree eb073265e05a04aa1d2588bcc6e2d411f922bba2
parent f7bdb8b78a3d4b2f0ebd76e606ac6ca2925d7b02
author Alex Frid <afrid@nvidia.com> 1500978853 +0300
committer Stephen Boyd <sboyd@codeaurora.org> 1503529223 -0700

clk: tegra: Fix T210 PLLRE registration

Switched Tegra210 PLLRE registration to common PLL ops instead of special
PLLRE ops used on previous Tegra chips. The latter ops do not follow
chip specific PLL frequency table, and do not apply chip specific rate
calculation method.

Removed unnecessary default rate setting that duplicates h/w reset
state, and is overwritten by clock initialization, anyway.

Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>