| commit | 33707260422475385c6f33f526c71805a3dc5dab | [log] [tgz] |
|---|---|---|
| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | Wed Feb 08 09:28:15 2017 +1300 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Fri Feb 10 09:21:30 2017 -0800 |
| tree | 21b3410462e936969a96f5332a3cadc138350677 | |
| parent | 48239135dd3fd4c5e90ae74cba79d798a9792238 [diff] |
clk: mvebu: Expand mv98dx3236-core-clock support
The initial implementation in commit e120c17a70e5 ("clk: mvebu: support
for 98DX3236 SoC") hardcoded a fixed value for the main PLL frequency.
Port code from the Marvell supplied Linux kernel to support different
PLL frequencies and provide clock gating support.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>