spi: davinci: remove non-useful "clk_internal" platform data
The "clk_internal" platform data member which contols the
CLKMOD bit in Global Control Register 1 is not useful
since CLKMOD needs be set to 1 *always* to ensure master
mode operation.
Remove this platform data.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Tested-By: Michael Williamson <michael.williamson@criticallink.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 27ee870..c0c501a 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -412,7 +412,6 @@
static struct davinci_spi_platform_data dm355_spi0_pdata = {
.version = SPI_VERSION_1,
.num_chipselect = 2,
- .clk_internal = 1,
.cshold_bug = true,
};
static struct platform_device dm355_spi0_device = {
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 1e5012e..8b8204f 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -625,7 +625,6 @@
static struct davinci_spi_platform_data dm365_spi0_pdata = {
.version = SPI_VERSION_1,
.num_chipselect = 2,
- .clk_internal = 1,
};
static struct resource dm365_spi0_resources[] = {
diff --git a/arch/arm/mach-davinci/include/mach/spi.h b/arch/arm/mach-davinci/include/mach/spi.h
index b3ab7d0..1f8b786 100644
--- a/arch/arm/mach-davinci/include/mach/spi.h
+++ b/arch/arm/mach-davinci/include/mach/spi.h
@@ -29,7 +29,6 @@
struct davinci_spi_platform_data {
u8 version;
u8 num_chipselect;
- u8 clk_internal;
u8 intr_line;
u8 *chip_sel;
bool cshold_bug;
diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c
index 5fe2980..2e74fcd 100644
--- a/drivers/spi/davinci_spi.c
+++ b/drivers/spi/davinci_spi.c
@@ -927,14 +927,6 @@
}
}
- /* Clock internal */
- if (davinci_spi->pdata->clk_internal)
- set_io_bits(davinci_spi->base + SPIGCR1,
- SPIGCR1_CLKMOD_MASK);
- else
- clear_io_bits(davinci_spi->base + SPIGCR1,
- SPIGCR1_CLKMOD_MASK);
-
if (pdata->intr_line)
iowrite32(SPI_INTLVL_1, davinci_spi->base + SPILVL);
else
@@ -943,6 +935,7 @@
iowrite32(CS_DEFAULT, davinci_spi->base + SPIDEF);
/* master mode default */
+ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_CLKMOD_MASK);
set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_MASTER_MASK);
ret = spi_bitbang_start(&davinci_spi->bitbang);