ixgbe: Make queue pairs on single MSI-X interrupts
This patch pairs similar-numbered Rx and Tx queues onto a single
MSI-X vector. For example, Tx queue 0 and Rx queue 0's interrupt
with be ethX-RxTx-0. This allows for more efficient cleanup, since
fewer interrupts will be firing during device operation. It also
helps with a cleaner CPU affinity for IRQ affinity.
Signed-off-by: Peter P Waskiewicz Jr <peter.p.waskiewicz.jr@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
1 file changed