tree 51dd671dcc551fbfdedf544179413acd019dcf63
parent 56fd27b31f1a216623f285bb77b4bcb6129e84c2
author Rhyland Klein <rklein@nvidia.com> 1434662903 -0400
committer Thierry Reding <treding@nvidia.com> 1448039102 +0100

clk: tegra: pll: Don't unconditionally set LOCK flags

SoC specific drivers should define the appropriate flags for each
PLL rather than relying on the registration functions to automatically
set flags on their behalf. This will properly allow for changes between
SoC generations where flags might be different and allow sharing the
same logic functions.

Reviewed-by: Benson Leung <bleung@chromium.org>
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>