[MIPS] sc-rm7k.c cleanup
Use blast_scache_range, blast_inv_scache_range for rm7k scache routine.
Output code should be logically same.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/mm/sc-rm7k.c b/arch/mips/mm/sc-rm7k.c
index 9e8ff8b..3b6cc9b 100644
--- a/arch/mips/mm/sc-rm7k.c
+++ b/arch/mips/mm/sc-rm7k.c
@@ -9,6 +9,7 @@
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/mm.h>
+#include <linux/bitops.h>
#include <asm/addrspace.h>
#include <asm/bcache.h>
@@ -43,14 +44,7 @@
/* Catch bad driver code */
BUG_ON(size == 0);
- a = addr & ~(sc_lsize - 1);
- end = (addr + size - 1) & ~(sc_lsize - 1);
- while (1) {
- flush_scache_line(a); /* Hit_Writeback_Inv_SD */
- if (a == end)
- break;
- a += sc_lsize;
- }
+ blast_scache_range(addr, addr + size);
if (!rm7k_tcache_enabled)
return;
@@ -74,14 +68,7 @@
/* Catch bad driver code */
BUG_ON(size == 0);
- a = addr & ~(sc_lsize - 1);
- end = (addr + size - 1) & ~(sc_lsize - 1);
- while (1) {
- invalidate_scache_line(a); /* Hit_Invalidate_SD */
- if (a == end)
- break;
- a += sc_lsize;
- }
+ blast_inv_scache_range(addr, addr + size);
if (!rm7k_tcache_enabled)
return;
@@ -143,11 +130,17 @@
void __init rm7k_sc_init(void)
{
+ struct cpuinfo_mips *c = ¤t_cpu_data;
unsigned int config = read_c0_config();
if ((config & RM7K_CONF_SC))
return;
+ c->scache.linesz = sc_lsize;
+ c->scache.ways = 4;
+ c->scache.waybit= ffs(scache_size / c->scache.ways) - 1;
+ c->scache.waysize = scache_size / c->scache.ways;
+ c->scache.sets = scache_size / (c->scache.linesz * c->scache.ways);
printk(KERN_INFO "Secondary cache size %dK, linesize %d bytes.\n",
(scache_size >> 10), sc_lsize);