| commit | 3b79cd15bfc5f1ddb5e387310fa3dbb09b81b552 | [log] [tgz] |
|---|---|---|
| author | Liu Ying <Ying.Liu@freescale.com> | Wed Jul 03 15:29:06 2013 +0800 |
| committer | Shawn Guo <shawn.guo@linaro.org> | Mon Jul 15 08:28:08 2013 +0800 |
| tree | 85abb902178a907b7629dcf45f092f2ac305ec63 | |
| parent | ceac9b9214df539ca814a784c2af94f554bc78d4 [diff] |
ARM: i.MX6Q: correct emi_sel clock muxing The correct muxing for emi_sel clock should be 2b'00 - 396M PFD 2b'01 - PLL3 2b'10 - AXI clk root 2b'11 - 352M PFD This patch corrects the muxing in the clock driver. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>