tree 7b3b9e7f860491d72b6ad8a8cdc2b297b13e09e5
parent 3ddc97211cbb61a5f59882c26f8e3158c86e34bb
author Daniel Baluta <daniel.baluta@nxp.com> 1490108605 +0200
committer Mark Brown <broonie@kernel.org> 1490381586 +0000

ASoC: codec: wm8960: Relax bit clock computation

WM8960 derives bit clock from sysclock using BCLKDIV[3:0] of R8
clocking register (See WM8960 datasheet, page 71).

There are use cases, like this:
aplay -Dhw:0,0 -r 48000 -c 1 -f S20_3LE -t raw audio48k20b_3LE1c.pcm

where no BCLKDIV applied to sysclock can give us the exact requested
bitclk, so driver fails to configure clocking and aplay fails to run.

Fix this by relaxing bitclk computation, so that when no exact value
can be derived from sysclk pick the closest value greater than
expected bitclk.

Suggested-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Acked-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>