| commit | 3e37b005580b9db89d7f335e121d52d3bd58e234 | [log] [tgz] |
|---|---|---|
| author | Chunyan Zhang <chunyan.zhang@spreadtrum.com> | Thu Dec 07 20:57:10 2017 +0800 |
| committer | Stephen Boyd <sboyd@codeaurora.org> | Thu Dec 21 15:00:53 2017 -0800 |
| tree | 49012bb7f11db65920d47855a3a29cd8fac8ab9a | |
| parent | 4fcba55cc621795caee6ba3503dbe70d10e268b2 [diff] |
clk: sprd: add adjustable pll support Introduced a common adjustable pll clock driver for Spreadtrum SoCs. Signed-off-by: Chunyan Zhang <chunyan.zhang@spreadtrum.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>