tree 24399eb6afe56a9a213fab97f9d85c165e2a6d01
parent 6fa7aec1db07f43d3ad94122c3bd52647c81619e
author Durgadoss R <durgadoss.r@intel.com> 1423821782 +0530
committer Daniel Vetter <daniel.vetter@ffwll.ch> 1424775098 +0100

drm/i915: Enable eDP DRRS for CHV

This patch enables eDP DRRS for CHV by adding the
required IS_CHERRYVIEW() checks.
CHV uses the same register bit as VLV.

[Vandana]: Since CHV has 2 sets of M_N registers, it will follow the same code
path as gen < 8. Added CHV check in dp_set_m_n()

[Ram]: Rebased on top of previous patch modifications

Signed-off-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Vandana Kannan <vandana.kannan@intel.com>
Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>