tree b41934ae0bb5a4f9c615f86808abdb5cc2365b01
parent 06445994fece2ae458419fbadc1b2107336615d6
author Philipp Zabel <p.zabel@pengutronix.de> 1448917673 +0100
committer Philipp Zabel <p.zabel@pengutronix.de> 1462549660 +0200

clk: mediatek: Add hdmi_ref HDMI PHY PLL reference clock output

The configurable hdmi_ref output of the PLL block is derived from
the tvdpll_594m clock signal via a configurable PLL post-divider.
It is used as the PLL reference input to the HDMI PHY module.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>