| commit | 90e8d31c53890064962f1154405e1034be7ec9a1 | [log] [tgz] |
|---|---|---|
| author | Eugeni Dodonov <eugeni.dodonov@intel.com> | Thu Mar 29 12:32:35 2012 -0300 |
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | Mon Apr 09 18:04:04 2012 +0200 |
| tree | 6306c85da1d7f710eba351264cc582e177cef527 | |
| parent | ccf1c867ce049bf27a1f7172f1a91820b3ceb6e5 [diff] |
drm/i915: add LCPLL control registers Those are used to control the display core clock. v2: change the enable bit setting, spotted by Rodrigo Vivi. Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>