tree e8da1c61f5017b58d455b05fa10328fff5bc648d
parent e47ac37c01bd9bd840dbbbc57a6dc1ba1e49ccc0
author Mark Brown <broonie@opensource.wolfsonmicro.com> 1303752455 +0100
committer Mark Brown <broonie@opensource.wolfsonmicro.com> 1303814957 +0100

ASoC: Don't warn if the WM8962 SYSCLK FLL setting doesn't match reality

When bringing up audio low power modes boards may configure SYSCLK before
they actually start the FLL as we do much of the clocking setup prior to
the power up sequence.

Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Liam Girdwood <lrg@ti.com>