tree 53082aa1d585d8a9453d1f121b91bc86da1587bc
parent 77b0a4aa0732f1856aef85b8db085864e5971a14
parent b4626a7f489238a59f08f0b216e883bac07260d7
author Linus Torvalds <torvalds@linux-foundation.org> 1475604297 -0700
committer Linus Torvalds <torvalds@linux-foundation.org> 1475604297 -0700
mergetag object b4626a7f489238a59f08f0b216e883bac07260d7
 type commit
 tag clk-for-linus
 tagger Stephen Boyd <sboyd@codeaurora.org> 1475542998 -0700
 
 The core clk framework changes are small again. They're mostly minor fixes
 that weren't causing enough problems (or any problems when we're just
 clarifying things) to warrant sending outside the merge window. The
 majority of changes are in drivers for various SoCs. Full details
 are in the logs, but here's the summary.
 
 Core:
 
  - Better support for DeviceTree overlays with the addition of the
    CLK_OF_DECLARE_DRIVER macro. Now we won't probe a clk driver
    for a device node that matched during of_clk_init(), unless
    the driver uses CLK_OF_DECLARE_DRIVER instead of CLK_OF_DECLARE.
    This allows overlays to work cleanly for drivers that must probe
    before the device model is ready, and also after it's ready
    when an overlay is loaded.
 
  - Clarification in the code around how clk_hw pointers are returned
    from of clk providers
 
  - Proper migration of prepare/enable counts to parents when the
    clk tree is constructed
 
 New Drivers:
 
  - Socionext's UniPhier SoCs
  - Loongson1C
  - ZTE ZX296718
  - Qualcomm MDM9615
  - Amlogic GXBB AO clocks and resets
  - Broadcom BCM53573 ILP
  - Maxim MAX77620
 
 Updates:
 
  - Four Allwinner SoCs are migrated to the new style clk driver (A31, A31s,
    A23 and A33)
  - Exynos 5xxx audio and DRAM clks
  - Loongson1B AC97, DMA and NAND clks
  - Rockchip DDR clks and rk3399 driver tweaks
  - Renesas R-Car M3-W (r8a7796) SoC SDHI interface and Watchdog timer clks
  - Renasas R-Car H3 and M3-W CMT clks and RAVB+Thermal clks for M3-W
  - Amlogic GXBB MMC gate clks
  - at91 sama5d4 sckc
  - Removal of STiH415 and STiH416 clk support as the SoC is being removed
  - Rework of STiH4xx clk support for new style bindings
  - Continuation of driver migration to clk_hw based registration APIs
  - xgene PMD support
  - bcm2835 critical clk markings
  - ARM versatile ICST
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk framework updates from Stephen Boyd:
 "The core clk framework changes are small again. They're mostly minor
  fixes that weren't causing enough problems (or any problems when we're
  just clarifying things) to warrant sending outside the merge window.
  The majority of changes are in drivers for various SoCs. Full details
  are in the logs, but here's the summary.

  Core:

   - Better support for DeviceTree overlays with the addition of the
     CLK_OF_DECLARE_DRIVER macro. Now we won't probe a clk driver for a
     device node that matched during of_clk_init(), unless the driver
     uses CLK_OF_DECLARE_DRIVER instead of CLK_OF_DECLARE. This allows
     overlays to work cleanly for drivers that must probe before the
     device model is ready, and also after it's ready when an overlay is
     loaded.

   - Clarification in the code around how clk_hw pointers are returned
     from of clk providers

   - Proper migration of prepare/enable counts to parents when the clk
     tree is constructed

  New Drivers:

   - Socionext's UniPhier SoCs
   - Loongson1C
   - ZTE ZX296718
   - Qualcomm MDM9615
   - Amlogic GXBB AO clocks and resets
   - Broadcom BCM53573 ILP
   - Maxim MAX77620

 Updates:

   - Four Allwinner SoCs are migrated to the new style clk driver (A31,
     A31s, A23 and A33)
   - Exynos 5xxx audio and DRAM clks
   - Loongson1B AC97, DMA and NAND clks
   - Rockchip DDR clks and rk3399 driver tweaks
   - Renesas R-Car M3-W (r8a7796) SoC SDHI interface and Watchdog timer
     clks
   - Renasas R-Car H3 and M3-W CMT clks and RAVB+Thermal clks for M3-W
   - Amlogic GXBB MMC gate clks
   - at91 sama5d4 sckc
   - Removal of STiH415 and STiH416 clk support as the SoC is being
     removed
   - Rework of STiH4xx clk support for new style bindings
   - Continuation of driver migration to clk_hw based registration APIs
   - xgene PMD support
   - bcm2835 critical clk markings
   - ARM versatile ICST"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (199 commits)
  CLK: Add Loongson1C clock support
  clk: Loongson1: Make use of GENMASK
  clk: Loongson1: Update clocks of Loongson1B
  clk: Loongson1: Refactor Loongson1 clock
  clk: change the type of clk_hw_onecell_data.num to unsigned int
  clk: zx296718: register driver earlier with core_initcall
  clk: mvebu: dynamically allocate resources in Armada CP110 system controller
  clk: mvebu: fix setting unwanted flags in CP110 gate clock
  clk: nxp: clk-lpc32xx: Unmap region obtained by of_iomap
  clk: mediatek: clk-mt8173: Unmap region obtained by of_iomap
  clk: sunxi-ng: Fix reset offset for the A23 and A33
  clk: at91: sckc: optimize boot time
  clk: at91: Add sama5d4 sckc support
  clk: at91: move slow clock controller clocks to sckc.c
  clk: imx6: initialize GPU clocks
  clk: imx6: fix i.MX6DL clock tree to reflect reality
  clk: imx53: Add clocks configuration
  clk: uniphier: add clock data for UniPhier SoCs
  clk: uniphier: add core support code for UniPhier clock driver
  clk: bcm: Add driver for BCM53573 ILP clock
  ...