| commit | 582ffae852400264b189da7dca9a5212dd3dab01 | [log] [tgz] |
|---|---|---|
| author | Bjorn Helgaas <bhelgaas@google.com> | Tue Sep 05 12:58:03 2017 -0500 |
| committer | Bjorn Helgaas <bhelgaas@google.com> | Thu Sep 07 08:52:43 2017 -0500 |
| tree | 3afb28f05a2e8e99e39bae7dc0d21a8d0ab87441 | |
| parent | c7aca96aa48d59b08763452cf1881b7411876c59 [diff] |
PCI: xgene: Define XGENE_PCI_EXP_CAP and use generic PCI_EXP_RTCTL offset Apparently the PCIe capability is at address 0x40 in config space of X-Gene v1 Root Ports. Add a definition of that and use the generic PCI_EXP_RTCTL offset into the capability. No functional change intended. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>