parisc: Initialize PCI bridge cache line and default latency
PCI controllers and pci-pci bridges may have not been fully initialized
regarding cache line and defaul latency.
This partly reverts
commit 5f0e9b4 ("parisc: Remove unused pcibios_init_bus()")
Signed-off-by: Helge Deller <deller@gmx.de>
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index 42844c2..2ec2aef 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -790,8 +790,10 @@
/*
** P2PB's have no IRQs. ignore them.
*/
- if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI)
+ if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
+ pcibios_init_bridge(dev);
continue;
+ }
/* Adjust INTERRUPT_LINE for this dev */
iosapic_fixup_irq(ldev->iosapic_obj, dev);